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MNIST-FPGA-Accelarator

Description

This is a project for accelerating MNIST classification using FPGA pynq board. We implemented streaming architecture using 1-bit quantization. As a result, our hardware is currently about 10x faster than using numpy for MNIST classification.

Hierarchy

src: vivado HLS source code for main hardware

MNIST-accelerator-comparison.ipynb: An example for comparing the speed of hardware and numpy

preprocess.ipynb: with this file, you can preprocess weights or preprocess dataset for specific batch size

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