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Merge branch 'main' into interconnect-gen Code.Analysis #603: Commit c5bfab9 pushed by Tin4r
May 15, 2024 07:03 51m 57s interconnect-gen
interconnect-gen
May 15, 2024 07:03 51m 57s
Merge branch 'main' into interconnect-gen Check.Build #602: Commit c5bfab9 pushed by Tin4r
May 15, 2024 07:03 26m 35s interconnect-gen
interconnect-gen
May 15, 2024 07:03 26m 35s
remove mirrored_ prefix from bus and port names Code.Analysis #602: Commit 36b9d25 pushed by Tin4r
May 13, 2024 12:14 52m 54s interconnect-gen
interconnect-gen
May 13, 2024 12:14 52m 54s
remove mirrored_ prefix from bus and port names Check.Build #601: Commit 36b9d25 pushed by Tin4r
May 13, 2024 12:14 27m 48s interconnect-gen
interconnect-gen
May 13, 2024 12:14 27m 48s
configuration file and parser Check.Build #600: Commit 10bd7a5 pushed by Tin4r
May 13, 2024 11:20 27m 3s interconnect-gen
interconnect-gen
May 13, 2024 11:20 27m 3s
configuration file and parser Code.Analysis #601: Commit 10bd7a5 pushed by Tin4r
May 13, 2024 11:20 52m 22s interconnect-gen
interconnect-gen
May 13, 2024 11:20 52m 22s
[CORRECTIVE] Fixed abstraction definition port existence check to acc… Code.Analysis #600: Commit 10fe340 pushed by teuhom
May 3, 2024 10:03 51m 21s main
main
May 3, 2024 10:03 51m 21s
[CORRECTIVE] Fixed abstraction definition port existence check to acc… Check.Build #599: Commit 10fe340 pushed by teuhom
May 3, 2024 10:03 28m 9s main
main
May 3, 2024 10:03 28m 9s
[CORRECTIVE] Fix HW design crash due to opaque bridge checks. Check.Build #598: Commit b36de06 pushed by hagantsa
May 2, 2024 10:29 28m 12s main
main
May 2, 2024 10:29 28m 12s
[CORRECTIVE] Fix HW design crash due to opaque bridge checks. Code.Analysis #599: Commit b36de06 pushed by hagantsa
May 2, 2024 10:29 52m 27s main
main
May 2, 2024 10:29 52m 27s
[ADDITIVE] Update master-slave path search to also look for opaque br… Check.Build #597: Commit df3c931 pushed by hagantsa
May 2, 2024 09:55 27m 8s main
main
May 2, 2024 09:55 27m 8s
[ADDITIVE] Update master-slave path search to also look for opaque br… Code.Analysis #598: Commit df3c931 pushed by hagantsa
May 2, 2024 09:55 50m 7s main
main
May 2, 2024 09:55 50m 7s
replace parameter ids with values in physical port bounds Code.Analysis #597: Commit 41b6194 pushed by Tin4r
April 29, 2024 09:42 51m 33s interconnect-gen
interconnect-gen
April 29, 2024 09:42 51m 33s
replace parameter ids with values in physical port bounds Check.Build #596: Commit 41b6194 pushed by Tin4r
April 29, 2024 09:42 27m 48s interconnect-gen
interconnect-gen
April 29, 2024 09:42 27m 48s
[ADDITIVE] Add 2022 help pages for bus interface, catalog, hw design Code.Analysis #596: Commit e7be0cc pushed by hagantsa
April 25, 2024 11:52 51m 34s main
main
April 25, 2024 11:52 51m 34s
[ADDITIVE] Add 2022 help pages for bus interface, catalog, hw design Check.Build #595: Commit e7be0cc pushed by hagantsa
April 25, 2024 11:52 26m 43s main
main
April 25, 2024 11:52 26m 43s
[ADDITIVE] Update release files Code.Analysis #595: Commit 81c2b8c pushed by hagantsa
April 23, 2024 13:57 51m 52s v3.13.2
v3.13.2
April 23, 2024 13:57 51m 52s
[ADDITIVE] Update release files Check.Build #594: Commit 81c2b8c pushed by hagantsa
April 23, 2024 13:57 27m 57s v3.13.2
v3.13.2
April 23, 2024 13:57 27m 57s
[ADDITIVE] Update release files Code.Analysis #594: Commit 81c2b8c pushed by hagantsa
April 23, 2024 13:04 52m 6s main
main
April 23, 2024 13:04 52m 6s
[ADDITIVE] Update release files Check.Build #593: Commit 81c2b8c pushed by hagantsa
April 23, 2024 13:04 29m 49s main
main
April 23, 2024 13:04 29m 49s
Merge branch 'main' into interconnect-gen Code.Analysis #593: Commit 750b0b6 pushed by Tin4r
April 23, 2024 09:48 53m 0s interconnect-gen
interconnect-gen
April 23, 2024 09:48 53m 0s
Merge branch 'main' into interconnect-gen Check.Build #592: Commit 750b0b6 pushed by Tin4r
April 23, 2024 09:48 27m 34s interconnect-gen
interconnect-gen
April 23, 2024 09:48 27m 34s
fixed rst and clk port generation Code.Analysis #592: Commit 7d66bee pushed by Tin4r
April 23, 2024 09:47 52m 59s interconnect-gen
interconnect-gen
April 23, 2024 09:47 52m 59s
fixed rst and clk port generation Check.Build #591: Commit 7d66bee pushed by Tin4r
April 23, 2024 09:47 28m 2s interconnect-gen
interconnect-gen
April 23, 2024 09:47 28m 2s
Added reset and clock interface generation Code.Analysis #591: Commit d6eed7c pushed by Tin4r
April 22, 2024 13:39 53m 6s interconnect-gen
interconnect-gen
April 22, 2024 13:39 53m 6s