From d6eb43f3336d024c1d608ea4a54b202900b21d38 Mon Sep 17 00:00:00 2001
From: Jerzy Kasenberg <jerzy@apache.org>
Date: Sat, 25 May 2024 23:44:04 +0200
Subject: [PATCH] hw/bsp: Fix Watchdog interval for STM32 BSPs

Default value 30s is out of range for all STM32 devices.

This sets WATCHDOG_INTERVAL to maximum correct value that
depends on LSI_VALUE for each MCU.

Additionally static assert is added to hal_watchdog.c
that checks if WATCHDOG_INTERVAL value does not exceed range.
---
 hw/bsp/ada_feather_stm32f405/syscfg.yml      | 1 +
 hw/bsp/b-l072z-lrwan1/syscfg.yml             | 1 +
 hw/bsp/b-l475e-iot01a/syscfg.yml             | 1 +
 hw/bsp/black_vet6/syscfg.yml                 | 1 +
 hw/bsp/bluepill/syscfg.yml                   | 1 +
 hw/bsp/nucleo-f030r8/syscfg.yml              | 1 +
 hw/bsp/nucleo-f072rb/syscfg.yml              | 1 +
 hw/bsp/nucleo-f103rb/syscfg.yml              | 1 +
 hw/bsp/nucleo-f303k8/syscfg.yml              | 1 +
 hw/bsp/nucleo-f303re/syscfg.yml              | 1 +
 hw/bsp/nucleo-f401re/syscfg.yml              | 1 +
 hw/bsp/nucleo-f411re/syscfg.yml              | 1 +
 hw/bsp/nucleo-f413zh/syscfg.yml              | 1 +
 hw/bsp/nucleo-f439zi/syscfg.yml              | 1 +
 hw/bsp/nucleo-f746zg/syscfg.yml              | 1 +
 hw/bsp/nucleo-f767zi/syscfg.yml              | 1 +
 hw/bsp/nucleo-g0b1re/syscfg.yml              | 1 +
 hw/bsp/nucleo-g491re/syscfg.yml              | 1 +
 hw/bsp/nucleo-h723zg/syscfg.yml              | 1 +
 hw/bsp/nucleo-l073rz/syscfg.yml              | 1 +
 hw/bsp/nucleo-l476rg/syscfg.yml              | 1 +
 hw/bsp/nucleo-u575zi-q/syscfg.yml            | 1 +
 hw/bsp/olimex-p103/syscfg.yml                | 1 +
 hw/bsp/olimex_stm32-e407_devboard/syscfg.yml | 1 +
 hw/bsp/p-nucleo-wb55-usbdongle/syscfg.yml    | 1 +
 hw/bsp/p-nucleo-wb55/syscfg.yml              | 1 +
 hw/bsp/stm32f3discovery/syscfg.yml           | 1 +
 hw/bsp/stm32f411discovery/syscfg.yml         | 1 +
 hw/bsp/stm32f429discovery/syscfg.yml         | 1 +
 hw/bsp/stm32f4discovery/syscfg.yml           | 1 +
 hw/bsp/stm32f7discovery/syscfg.yml           | 1 +
 hw/bsp/stm32l152discovery/syscfg.yml         | 1 +
 hw/bsp/weact_g431cb/syscfg.yml               | 1 +
 hw/mcu/stm/stm32_common/src/hal_watchdog.c   | 5 +++++
 34 files changed, 38 insertions(+)

diff --git a/hw/bsp/ada_feather_stm32f405/syscfg.yml b/hw/bsp/ada_feather_stm32f405/syscfg.yml
index e9661eb754..3e0ff75463 100644
--- a/hw/bsp/ada_feather_stm32f405/syscfg.yml
+++ b/hw/bsp/ada_feather_stm32f405/syscfg.yml
@@ -48,6 +48,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     # UART0 is on the large breakout connector, pins TX and RX.
     UART_0_PIN_TX: 'MCU_GPIO_PORTB(10)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(11)'
diff --git a/hw/bsp/b-l072z-lrwan1/syscfg.yml b/hw/bsp/b-l072z-lrwan1/syscfg.yml
index b483aaaa04..ca61b36b64 100644
--- a/hw/bsp/b-l072z-lrwan1/syscfg.yml
+++ b/hw/bsp/b-l072z-lrwan1/syscfg.yml
@@ -51,6 +51,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 1  # max 32MHz
     STM32_FLASH_PREFETCH_ENABLE: 0
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     SPI_1_CUSTOM_CFG: 1
diff --git a/hw/bsp/b-l475e-iot01a/syscfg.yml b/hw/bsp/b-l475e-iot01a/syscfg.yml
index 6e8a3e4fb6..2b8cbfab3d 100644
--- a/hw/bsp/b-l475e-iot01a/syscfg.yml
+++ b/hw/bsp/b-l475e-iot01a/syscfg.yml
@@ -59,6 +59,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 0
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTB(6)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(7)'
     I2C_0_PIN_SCL: 'MCU_GPIO_PORTB(8)'
diff --git a/hw/bsp/black_vet6/syscfg.yml b/hw/bsp/black_vet6/syscfg.yml
index cdcf4490b4..e5653b1a04 100644
--- a/hw/bsp/black_vet6/syscfg.yml
+++ b/hw/bsp/black_vet6/syscfg.yml
@@ -64,6 +64,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 25000
 
     SPI_0_MASTER: 1
     # On board SPIFLASH configuration for W25Q16VBS
diff --git a/hw/bsp/bluepill/syscfg.yml b/hw/bsp/bluepill/syscfg.yml
index f191db8680..d601947e2e 100644
--- a/hw/bsp/bluepill/syscfg.yml
+++ b/hw/bsp/bluepill/syscfg.yml
@@ -39,6 +39,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'
diff --git a/hw/bsp/nucleo-f030r8/syscfg.yml b/hw/bsp/nucleo-f030r8/syscfg.yml
index 45c73c94e4..abcc2f7562 100644
--- a/hw/bsp/nucleo-f030r8/syscfg.yml
+++ b/hw/bsp/nucleo-f030r8/syscfg.yml
@@ -41,6 +41,7 @@ syscfg.vals:
     STM32_CLOCK_APB1_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_1'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
diff --git a/hw/bsp/nucleo-f072rb/syscfg.yml b/hw/bsp/nucleo-f072rb/syscfg.yml
index ff367bbe7d..a7b3b7a89b 100644
--- a/hw/bsp/nucleo-f072rb/syscfg.yml
+++ b/hw/bsp/nucleo-f072rb/syscfg.yml
@@ -41,6 +41,7 @@ syscfg.vals:
     STM32_CLOCK_APB1_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_1'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
diff --git a/hw/bsp/nucleo-f103rb/syscfg.yml b/hw/bsp/nucleo-f103rb/syscfg.yml
index 76d91fdb73..500c405921 100644
--- a/hw/bsp/nucleo-f103rb/syscfg.yml
+++ b/hw/bsp/nucleo-f103rb/syscfg.yml
@@ -39,6 +39,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
diff --git a/hw/bsp/nucleo-f303k8/syscfg.yml b/hw/bsp/nucleo-f303k8/syscfg.yml
index ff2c4a1d13..3a464adb1b 100644
--- a/hw/bsp/nucleo-f303k8/syscfg.yml
+++ b/hw/bsp/nucleo-f303k8/syscfg.yml
@@ -37,6 +37,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(15)'
     UART_0_PIN_RTS: 'MCU_GPIO_PORTA(1)'
diff --git a/hw/bsp/nucleo-f303re/syscfg.yml b/hw/bsp/nucleo-f303re/syscfg.yml
index 662cec0fa2..24090ce005 100644
--- a/hw/bsp/nucleo-f303re/syscfg.yml
+++ b/hw/bsp/nucleo-f303re/syscfg.yml
@@ -37,6 +37,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 19000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_0_PIN_RTS: 'MCU_GPIO_PORTA(1)'
diff --git a/hw/bsp/nucleo-f401re/syscfg.yml b/hw/bsp/nucleo-f401re/syscfg.yml
index cbedf59006..dc83af3601 100644
--- a/hw/bsp/nucleo-f401re/syscfg.yml
+++ b/hw/bsp/nucleo-f401re/syscfg.yml
@@ -48,6 +48,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_0_PIN_RTS: 'MCU_GPIO_PORTA(1)'
diff --git a/hw/bsp/nucleo-f411re/syscfg.yml b/hw/bsp/nucleo-f411re/syscfg.yml
index cb117058f0..a24faf5445 100644
--- a/hw/bsp/nucleo-f411re/syscfg.yml
+++ b/hw/bsp/nucleo-f411re/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
diff --git a/hw/bsp/nucleo-f413zh/syscfg.yml b/hw/bsp/nucleo-f413zh/syscfg.yml
index 248560e493..91e2b54daf 100644
--- a/hw/bsp/nucleo-f413zh/syscfg.yml
+++ b/hw/bsp/nucleo-f413zh/syscfg.yml
@@ -50,6 +50,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'
diff --git a/hw/bsp/nucleo-f439zi/syscfg.yml b/hw/bsp/nucleo-f439zi/syscfg.yml
index 0fe6cc31f4..fd1ee7ee08 100644
--- a/hw/bsp/nucleo-f439zi/syscfg.yml
+++ b/hw/bsp/nucleo-f439zi/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTD(5)'
diff --git a/hw/bsp/nucleo-f746zg/syscfg.yml b/hw/bsp/nucleo-f746zg/syscfg.yml
index ab47dbebab..aa62857255 100644
--- a/hw/bsp/nucleo-f746zg/syscfg.yml
+++ b/hw/bsp/nucleo-f746zg/syscfg.yml
@@ -46,6 +46,7 @@ syscfg.vals:
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_7'
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_ART_ACCLERATOR_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTD(14)'
diff --git a/hw/bsp/nucleo-f767zi/syscfg.yml b/hw/bsp/nucleo-f767zi/syscfg.yml
index f96a8d3b8c..1da9462ad0 100644
--- a/hw/bsp/nucleo-f767zi/syscfg.yml
+++ b/hw/bsp/nucleo-f767zi/syscfg.yml
@@ -47,6 +47,7 @@ syscfg.vals:
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_7'
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_ART_ACCLERATOR_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTD(14)'
diff --git a/hw/bsp/nucleo-g0b1re/syscfg.yml b/hw/bsp/nucleo-g0b1re/syscfg.yml
index ecf9d146cc..ce74dbdf6b 100644
--- a/hw/bsp/nucleo-g0b1re/syscfg.yml
+++ b/hw/bsp/nucleo-g0b1re/syscfg.yml
@@ -51,6 +51,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
+    WATCHDOG_INTERVAL: 28000
     UART_0: 0
     UART_1: 1
     UART_0_PIN_TX: 'MCU_GPIO_PORTC(4)'
diff --git a/hw/bsp/nucleo-g491re/syscfg.yml b/hw/bsp/nucleo-g491re/syscfg.yml
index 6d9b546746..400897ef64 100644
--- a/hw/bsp/nucleo-g491re/syscfg.yml
+++ b/hw/bsp/nucleo-g491re/syscfg.yml
@@ -51,6 +51,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_4'
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(2)'
diff --git a/hw/bsp/nucleo-h723zg/syscfg.yml b/hw/bsp/nucleo-h723zg/syscfg.yml
index ed12356d82..8146b91177 100644
--- a/hw/bsp/nucleo-h723zg/syscfg.yml
+++ b/hw/bsp/nucleo-h723zg/syscfg.yml
@@ -57,6 +57,7 @@ syscfg.vals:
     STM32_CLOCK_PLLRGE: 'RCC_PLL1VCIRANGE_3'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_3'
     STM32_ENABLE_ICACHE: 0
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTD(14)'
diff --git a/hw/bsp/nucleo-l073rz/syscfg.yml b/hw/bsp/nucleo-l073rz/syscfg.yml
index 992c81aa1f..a964b30ff5 100644
--- a/hw/bsp/nucleo-l073rz/syscfg.yml
+++ b/hw/bsp/nucleo-l073rz/syscfg.yml
@@ -57,6 +57,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 1  # max 32MHz
     STM32_FLASH_PREFETCH_ENABLE: 0
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
diff --git a/hw/bsp/nucleo-l476rg/syscfg.yml b/hw/bsp/nucleo-l476rg/syscfg.yml
index 70ec2e4853..cc35a18bc4 100644
--- a/hw/bsp/nucleo-l476rg/syscfg.yml
+++ b/hw/bsp/nucleo-l476rg/syscfg.yml
@@ -56,6 +56,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 0
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
diff --git a/hw/bsp/nucleo-u575zi-q/syscfg.yml b/hw/bsp/nucleo-u575zi-q/syscfg.yml
index 64e44c3749..9098a1db6e 100644
--- a/hw/bsp/nucleo-u575zi-q/syscfg.yml
+++ b/hw/bsp/nucleo-u575zi-q/syscfg.yml
@@ -52,6 +52,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_4'
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTD(5)'
diff --git a/hw/bsp/olimex-p103/syscfg.yml b/hw/bsp/olimex-p103/syscfg.yml
index ee2bceb247..14d2e035dd 100644
--- a/hw/bsp/olimex-p103/syscfg.yml
+++ b/hw/bsp/olimex-p103/syscfg.yml
@@ -42,6 +42,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'
diff --git a/hw/bsp/olimex_stm32-e407_devboard/syscfg.yml b/hw/bsp/olimex_stm32-e407_devboard/syscfg.yml
index 344957b97c..27cc90cce0 100644
--- a/hw/bsp/olimex_stm32-e407_devboard/syscfg.yml
+++ b/hw/bsp/olimex_stm32-e407_devboard/syscfg.yml
@@ -48,6 +48,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTC(6)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTC(7)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'
diff --git a/hw/bsp/p-nucleo-wb55-usbdongle/syscfg.yml b/hw/bsp/p-nucleo-wb55-usbdongle/syscfg.yml
index fabebe1fe5..2f4c10c6c2 100644
--- a/hw/bsp/p-nucleo-wb55-usbdongle/syscfg.yml
+++ b/hw/bsp/p-nucleo-wb55-usbdongle/syscfg.yml
@@ -82,6 +82,7 @@ syscfg.vals:
     TIMER_0_TIM: 'TIM2'
     TIMER_1_TIM: 'TIM16'
     TIMER_2_TIM: 'TIM17'
+    WATCHDOG_INTERVAL: 28000
 
     # Flasher parameters
     MYNEWT_DOWNLOADER: stflash
diff --git a/hw/bsp/p-nucleo-wb55/syscfg.yml b/hw/bsp/p-nucleo-wb55/syscfg.yml
index ef7e3b6831..caca3ff117 100644
--- a/hw/bsp/p-nucleo-wb55/syscfg.yml
+++ b/hw/bsp/p-nucleo-wb55/syscfg.yml
@@ -69,6 +69,7 @@ syscfg.vals:
     TIMER_0_TIM: 'TIM2'
     TIMER_1_TIM: 'TIM16'
     TIMER_2_TIM: 'TIM17'
+    WATCHDOG_INTERVAL: 28000
 
     # Flasher parameters
     MYNEWT_DOWNLOADER: stflash
diff --git a/hw/bsp/stm32f3discovery/syscfg.yml b/hw/bsp/stm32f3discovery/syscfg.yml
index a2a4531cb9..8cf94dffdf 100644
--- a/hw/bsp/stm32f3discovery/syscfg.yml
+++ b/hw/bsp/stm32f3discovery/syscfg.yml
@@ -50,6 +50,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'
diff --git a/hw/bsp/stm32f411discovery/syscfg.yml b/hw/bsp/stm32f411discovery/syscfg.yml
index 535fe22935..48aef80f30 100644
--- a/hw/bsp/stm32f411discovery/syscfg.yml
+++ b/hw/bsp/stm32f411discovery/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
diff --git a/hw/bsp/stm32f429discovery/syscfg.yml b/hw/bsp/stm32f429discovery/syscfg.yml
index 3c2a2cdec3..16bdc1d32c 100644
--- a/hw/bsp/stm32f429discovery/syscfg.yml
+++ b/hw/bsp/stm32f429discovery/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     TIMER_0_TIM: 'TIM9'
diff --git a/hw/bsp/stm32f4discovery/syscfg.yml b/hw/bsp/stm32f4discovery/syscfg.yml
index 7dc29c750a..7d3a84a683 100644
--- a/hw/bsp/stm32f4discovery/syscfg.yml
+++ b/hw/bsp/stm32f4discovery/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTC(6)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTC(7)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(2)'
diff --git a/hw/bsp/stm32f7discovery/syscfg.yml b/hw/bsp/stm32f7discovery/syscfg.yml
index 7c2548179d..bc919cad4d 100644
--- a/hw/bsp/stm32f7discovery/syscfg.yml
+++ b/hw/bsp/stm32f7discovery/syscfg.yml
@@ -46,6 +46,7 @@ syscfg.vals:
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_7'
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_ART_ACCLERATOR_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(7)'
     TIMER_0_TIM: 'TIM1'
diff --git a/hw/bsp/stm32l152discovery/syscfg.yml b/hw/bsp/stm32l152discovery/syscfg.yml
index 951e23d27d..68f2c1e483 100644
--- a/hw/bsp/stm32l152discovery/syscfg.yml
+++ b/hw/bsp/stm32l152discovery/syscfg.yml
@@ -45,6 +45,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 1  # max 32MHz
     STM32_FLASH_PREFETCH_ENABLE: 0
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTB(10)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(11)'
     SPI_1_PIN_SS: 'MCU_GPIO_PORTB(12)'
diff --git a/hw/bsp/weact_g431cb/syscfg.yml b/hw/bsp/weact_g431cb/syscfg.yml
index 560731099d..2a2bd293c2 100644
--- a/hw/bsp/weact_g431cb/syscfg.yml
+++ b/hw/bsp/weact_g431cb/syscfg.yml
@@ -52,6 +52,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_4'
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(2)'
diff --git a/hw/mcu/stm/stm32_common/src/hal_watchdog.c b/hw/mcu/stm/stm32_common/src/hal_watchdog.c
index 649b6b6f11..31ec36a108 100644
--- a/hw/mcu/stm/stm32_common/src/hal_watchdog.c
+++ b/hw/mcu/stm/stm32_common/src/hal_watchdog.c
@@ -23,6 +23,11 @@
 
 IWDG_HandleTypeDef g_wdt_cfg;
 
+#if MYNEWT_VAL(WATCHDOG_INTERVAL) > 0
+_Static_assert(4095 * 2560 / 11 / (LSI_VALUE / 1000) >= MYNEWT_VAL(WATCHDOG_INTERVAL),
+    "Watchdog interval out of range, decrease value WATCHDOG_INTERVAL in syscfg.yml");
+#endif
+
 int
 hal_watchdog_init(uint32_t expire_msecs)
 {