From 4e78b11c96192d3c1e4332d5bca9c415ad7c1c9d Mon Sep 17 00:00:00 2001 From: Vivek Date: Wed, 31 Jul 2024 08:17:46 -0700 Subject: [PATCH] [Mellanox] Avoid attaching lossless buffer profiles for internal ports (#18978) [Mellanox] Avoid attaching lossless buffer profiles for internal ports (#18978) Signed-off-by: Vivek Reddy --- .../Mellanox-SN4700-O28/buffers.json.j2 | 2 +- .../buffers_defaults_objects.j2 | 436 ++++++- .../buffers_defaults_t0.j2 | 39 +- .../buffers_defaults_t1.j2 | 39 +- .../buffers_dynamic.json.j2 | 2 +- .../Mellanox-SN4700-O28/pg_profile_lookup.ini | 2 +- .../Mellanox-SN4700-O28/port_config.ini | 2 +- files/build_templates/buffers_config.j2 | 9 +- files/build_templates/qos_config.j2 | 27 +- src/sonic-config-engine/tests/common_utils.py | 15 + ...mellanox-4700-t1-minigraph-smartswitch.xml | 1082 +++++++++++++++++ .../qos-mellanox4700-o28-t1-smartswitch.json | 814 +++++++++++++ ...s-mellanox4700-o28-t1-smartswitch_dyn.json | 870 +++++++++++++ src/sonic-config-engine/tests/test_j2files.py | 52 + 14 files changed, 3378 insertions(+), 13 deletions(-) mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 mode change 120000 => 100644 device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 create mode 100644 src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml create mode 100644 src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json create mode 100644 src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch_dyn.json diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 index add8bf8bb7c2..b57f1dc31b43 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file +../Mellanox-SN4700-O8C48/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 deleted file mode 120000 index 33b6704f9902..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 +++ /dev/null @@ -1 +0,0 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 new file mode 100644 index 000000000000..20273084f7de --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 @@ -0,0 +1,435 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{% set PORT_DPC = [] %} +{%- for port in PORT %} + {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} + {%- if PORT_DPC.append(port) %}{%- endif %} + {%- endif %} +{%- endfor %} + +{% set PROFILE_PORT_MAP = { + "BUFFER_PORT_INGRESS_PROFILE_LIST": { + "Dpc": { + "active": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_profile" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "ingress_lossless_profile", + "static": "ingress_lossless_profile" + }, + "inactive": { + "dynamic": "ingress_lossless_profile", + "static": "ingress_lossless_zero_profile" + } + } + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { + "Dpc": { + "active": { + "dynamic": "egress_lossy_profile", + "static": "egress_lossy_profile" + }, + "inactive": { + "dynamic": "egress_lossy_profile", + "static": "egress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "egress_lossless_profile,egress_lossy_profile", + "static": "egress_lossless_profile,egress_lossy_profile" + }, + "inactive": { + "dynamic": "egress_lossless_profile,egress_lossy_profile", + "static": "egress_lossless_zero_profile,egress_lossy_zero_profile" + } + } + }, + "BUFFER_QUEUE": { + "Dpc": { + "active": { + "dynamic": "q_lossy_profile", + "static": "q_lossy_profile" + }, + "inactive": { + "dynamic": "q_lossy_profile", + "static": "egress_lossy_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "egress_lossless_profile", + "static": "egress_lossless_profile" + }, + "inactive": { + "dynamic": "egress_lossless_profile", + "static": "egress_lossless_zero_profile" + } + } + }, + "BUFFER_PG": { + "Dpc": { + "active": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_profile" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_pg_zero_profile" + } + }, + "Ext": { + "active": { + "dynamic": "NULL" + }, + "inactive": { + "dynamic": "ingress_lossy_profile", + "static": "ingress_lossy_pg_zero_profile" + } + } + } +} %} + +{%- macro find_profile_to_attach(table, port, active_status, dynamic_status) -%} +{% if port in PORT_DPC %} +"{{PROFILE_PORT_MAP[table]['Dpc'][active_status][dynamic_status]}}" +{% else %} +"{{PROFILE_PORT_MAP[table]['Ext'][active_status][dynamic_status]}}" +{% endif %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} + "BUFFER_POOL": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_zero_pool" : { + "mode": "static", + "type": "ingress", + "size": "0" + }, + {% endif -%} + "ingress_lossless_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossless_pool_size }}", + "xoff": "{{ ingress_lossless_pool_xoff }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ egress_lossy_pool_size }}", + {% endif -%} + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_lossy_pg_zero_profile" : { + "pool":"ingress_zero_pool", + "size":"0", + "static_th":"0" + }, + "ingress_lossless_zero_profile" : { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossless_zero_profile" : { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossy_zero_profile" : { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + {% endif -%} + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"9216", + "dynamic_th":"7" + }, + "q_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"3" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names_active, port_names_inactive) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'active', 'static')}} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} +{% else %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_INGRESS_PROFILE_LIST', port, 'inactive', 'static')}} +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'active', 'static')}} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'dynamic')}} +{% else %} + "profile_list" : {{find_profile_to_attach('BUFFER_PORT_EGRESS_PROFILE_LIST', port, 'inactive', 'static')}} +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) %} + "BUFFER_QUEUE": { +{% set q_loop = namespace(last_valid=false) %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'active', 'static')}} + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_queues.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% set q_loop.last_valid = true %} +{% else %} +{% set q_loop.last_valid = false %} +{% endif %} +{% endfor %} +{% if port_names_extra_queues|length > 0 %} +{% if q_loop.last_valid %},{% endif %} +{% for port in port_names_extra_queues.split(',') %} + "{{ port }}|0-1": { + "profile" : "q_lossy_profile" + }, + "{{ port }}|2-4": { + "profile" : "egress_lossless_profile" + }, + "{{ port }}|5": { + "profile" : "q_lossy_profile" + }, + "{{ port }}|6": { + "profile" : "egress_lossless_profile" + }, + "{{ port }}|7": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% if port_names_inactive|length > 0 %} +, +{% if dynamic_mode is defined %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'dynamic')}} + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% else %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_QUEUE', port, 'inactive', 'static')}} + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_zero_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} +{% if port_names_extra_queues|length > 0 %} + "{{ port }}|5-7": { +{% else %} + "{{ port }}|5-6": { +{% endif %} + "profile" : "egress_lossy_zero_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %} +{{ generate_queue_buffers_with_extra_lossless_queues(port_names_active, "", port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) %} + "BUFFER_PG": { +{% set pg_loop = namespace(last_valid=false) %} +{% for port in port_names_active.split(',') %} +{% if port not in port_names_extra_pgs.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% set pg_loop.last_valid = true %} +{% else %} +{% set pg_loop.last_valid = false %} +{% endif %} +{% endfor %} +{% if port_names_extra_pgs|length > 0 %} +{% if pg_loop.last_valid %},{% endif %} +{% for port in port_names_extra_pgs.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|2-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, + "{{ port }}|6": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|2-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, + "{{ port }}|6": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'active', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% if port_names_inactive|length > 0 %} +{%- for port in port_names_inactive.split(',') %} + {%- if loop.first -%},{%- endif -%} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'dynamic')}} + }, +{% else %} +{% if port in PORT_DPC %} + "{{ port }}|3-4": { + "profile" : {{find_profile_to_attach('BUFFER_PG', port, 'inactive', 'static')}} + }, +{% endif %} +{% endif %} + "{{ port }}|0": { +{% if dynamic_mode is defined %} + "profile" : "ingress_lossy_profile" +{% else %} + "profile" : "ingress_lossy_pg_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %} +{{ generate_pg_profiles_with_extra_lossless_pgs(port_names_active, "", port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 deleted file mode 120000 index 38216fb84301..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 +++ /dev/null @@ -1 +0,0 @@ -../ACS-MSN4700/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..175618cc95be --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t0.j2 @@ -0,0 +1,38 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '52219872' %} +{% set ingress_lossless_pool_xoff = '3305376' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '52219872' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 deleted file mode 120000 index c09ab38502d4..000000000000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 +++ /dev/null @@ -1 +0,0 @@ -../ACS-MSN4700/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..39cee7576e2c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_t1.j2 @@ -0,0 +1,38 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '300m' %} +{% set ingress_lossless_pool_size = '49934304' %} +{% set ingress_lossless_pool_xoff = '5590944' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '49934304' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 index 8c4117c66214..d5a441408f93 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_dynamic.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file +../Mellanox-SN4700-O8C48/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini index 7813e1697844..66cab04d2c42 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/pg_profile_lookup.ini @@ -1 +1 @@ -../ACS-MSN4700/pg_profile_lookup.ini \ No newline at end of file +../Mellanox-SN4700-C128/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini index bdc1dc6766f9..3e9701359868 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/port_config.ini @@ -1,5 +1,5 @@ ## -## Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. +## Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2 index d6d89e33be0b..9787bec1bd68 100644 --- a/files/build_templates/buffers_config.j2 +++ b/files/build_templates/buffers_config.j2 @@ -113,6 +113,7 @@ def {%- set PORT_ALL = [] %} {%- set PORT_BP = [] %} +{%- set PORT_DPC = [] %} {%- set SYSTEM_PORT_ALL = [] %} {%- if voq_chassis %} @@ -135,6 +136,9 @@ def {%- for port in PORT %} {%- if not port.startswith('Ethernet-Rec') and not port.startswith('Ethernet-IB') %} {%- if PORT_ALL.append(port) %}{%- endif %} + {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} + {%- if PORT_DPC.append(port) %}{%- endif %} + {%- endif %} {%- endif %} {%- endfor %} {%- if defs.generate_bp_port_list is defined %} @@ -153,8 +157,11 @@ def {%- for port in PORT_BP %} {%- if PORT_ACTIVE.append(port) %}{%- endif %} {%- endfor %} + {%- for port in PORT_DPC %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} {%- for port in PORT_ALL %} - {%- if port not in DEVICE_NEIGHBOR.keys() %} + {%- if port not in DEVICE_NEIGHBOR.keys() and port not in PORT_DPC %} {%- if PORT_INACTIVE.append(port) %}{%- endif %} {%- endif %} {%- endfor %} diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2 index a85d4f1e4ee0..bf5007471a48 100644 --- a/files/build_templates/qos_config.j2 +++ b/files/build_templates/qos_config.j2 @@ -1,5 +1,6 @@ {%- set PORT_ALL = [] %} {%- set PORT_BP = [] %} +{%- set PORT_DPC = [] %} {%- set SYSTEM_PORT_ALL = [] %} {%- set voq_chassis = false %} @@ -22,6 +23,9 @@ {%- for port in PORT %} {%- if not port.startswith('Ethernet-Rec') and not port.startswith('Ethernet-IB') %} {%- if PORT_ALL.append(port) %}{% endif %} + {%- if 'role' in PORT[port] and PORT[port]['role'] == 'Dpc' %} + {%- if PORT_DPC.append(port) %}{%- endif %} + {%- endif %} {%- endif %} {%- endfor %} {%- if generate_bp_port_list is defined %} @@ -47,6 +51,9 @@ {%- for port in PORT_BP %} {%- if PORT_ACTIVE.append(port) %}{%- endif %} {%- endfor %} + {%- for port in PORT_DPC %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} {%- endif %} {%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} @@ -321,8 +328,6 @@ {% else %} "tc_to_queue_map" : "AZURE", {% endif %} - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", {% if asic_type in pfc_to_pg_map_supported_asics %} {% if port in port_names_list_extra_queues %} "pfc_to_pg_map" : "AZURE_DUALTOR", @@ -330,12 +335,16 @@ "pfc_to_pg_map" : "AZURE", {% endif %} {% endif %} +{% if port not in PORT_DPC %} {% if port in port_names_list_extra_queues %} "pfc_enable" : "2,3,4,6", {% else %} "pfc_enable" : "3,4", {% endif %} - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", +{% endif %} + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }{% if not loop.last %},{% endif %} {% endfor %} @@ -426,8 +435,12 @@ {% else %} {% for port in PORT_ACTIVE %} "{{ port }}|3": { +{% if port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" +{% else %} + "scheduler": "scheduler.0" +{% endif %} }, {% endfor %} {% if 'resource_type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['resource_type'] in apollo_resource_types %} @@ -440,8 +453,12 @@ {% else %} {% for port in PORT_ACTIVE %} "{{ port }}|4": { +{% if port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" +{% else %} + "scheduler": "scheduler.0" +{% endif %} }, {% endfor %} {% endif %} @@ -457,7 +474,7 @@ {% endfor %} {% for port in PORT_ACTIVE %} "{{ port }}|2": { -{% if port in port_names_list_extra_queues %} +{% if port in port_names_list_extra_queues and port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" {% else %} @@ -478,7 +495,7 @@ {% endfor %} {% for port in PORT_ACTIVE %} "{{ port }}|6": { -{% if port in port_names_list_extra_queues %} +{% if port in port_names_list_extra_queues and port not in PORT_DPC %} "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" {% else %} diff --git a/src/sonic-config-engine/tests/common_utils.py b/src/sonic-config-engine/tests/common_utils.py index 1a2a36805530..a5a15c45be42 100644 --- a/src/sonic-config-engine/tests/common_utils.py +++ b/src/sonic-config-engine/tests/common_utils.py @@ -97,3 +97,18 @@ def cmp(file1, file2): return obj1 == obj2 except: return filecmp.cmp(file1, file2) + +def cmp_tables(f_rcvd, f_exp): + """ Check if the tables present in rcvd matches with exp """ + try: + with open(f_rcvd, 'r') as f: + rcvd = json.load(f) + with open(f_exp, 'r') as f: + exp = json.load(f) + + for key in rcvd.keys(): + print(key, rcvd[key], exp.get(key,{})) + assert rcvd[key] == exp.get(key,{}) + except Exception as e: + return False + return True diff --git a/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml b/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml new file mode 100644 index 000000000000..6f47baf933b7 --- /dev/null +++ b/src/sonic-config-engine/tests/sample-mellanox-4700-t1-minigraph-smartswitch.xml @@ -0,0 +1,1082 @@ + + + + + + false + mtvr-leopard-01 + 10.0.0.32 + ARISTA01T0 + 10.0.0.33 + 1 + 10 + 3 + + + mtvr-leopard-01 + FC00::8D + ARISTA20T0 + FC00::8E + 1 + 10 + 3 + + + + + 65100 + mtvr-leopard-01 + + +
10.0.0.33
+ + + + + +
10.0.0.1
+ + + + + +
10.0.0.35
+ + + + + +
10.0.0.37
+ + + + + +
10.0.0.5
+ + + + + +
10.0.0.39
+ + + + + +
10.0.0.41
+ + + + + +
10.0.0.9
+ + + + + +
10.0.0.43
+ + + + + +
10.0.0.45
+ + + + + +
10.0.0.13
+ + + + + +
10.0.0.47
+ + + + + +
10.0.0.49
+ + + + + +
10.0.0.51
+ + + + + +
10.0.0.53
+ + + + + +
10.0.0.55
+ + + + + +
10.0.0.57
+ + + + + +
10.0.0.59
+ + + + + +
10.0.0.61
+ + + + + +
10.0.0.63
+ + + + + +
10.0.0.65
+ + + + + +
10.0.0.67
+ + + + + +
10.0.0.69
+ + + + + +
10.0.0.71
+ + + + + + + + + 64001 + ARISTA01T0 + + + + 65200 + ARISTA01T2 + + + + 64002 + ARISTA02T0 + + + + 64003 + ARISTA03T0 + + + + 65200 + ARISTA03T2 + + + + 64004 + ARISTA04T0 + + + + 64005 + ARISTA05T0 + + + + 65200 + ARISTA05T2 + + + + 64006 + ARISTA06T0 + + + + 64007 + ARISTA07T0 + + + + 65200 + ARISTA07T2 + + + + 64008 + ARISTA08T0 + + + + 64009 + ARISTA09T0 + + + + 64010 + ARISTA10T0 + + + + 64011 + ARISTA11T0 + + + + 64012 + ARISTA12T0 + + + + 64013 + ARISTA13T0 + + + + 64014 + ARISTA14T0 + + + + 64015 + ARISTA15T0 + + + + 64016 + ARISTA16T0 + + + + 64017 + ARISTA17T0 + + + + 64018 + ARISTA18T0 + + + + 64019 + ARISTA19T0 + + + + 64020 + ARISTA20T0 + + + + + + + + + HostIP + Loopback0 + + 10.1.0.32/32 + + 10.1.0.32/32 + + + HostIP1 + Loopback0 + + FC00:1::32/128 + + FC00:1::32/128 + + + + + HostIP + eth0 + + 10.210.24.184/22 + + 10.210.24.184/22 + + + + + + + mtvr-leopard-01 + + + PortChannel102 + etp1;etp2 + + + + PortChannel105 + etp3;etp4 + + + + PortChannel108 + etp5;etp6 + + + + PortChannel1011 + etp7;etp8 + + + + + + + + + etp28 + 10.0.0.70/31 + + + + etp28 + FC00::8D/126 + + + + + + NTP_ACL + NTP + NTP + + + SNMP_ACL + SNMP + SNMP + + + VTY_LINE + ssh-only + SSH + + + ERSPAN + Everflow + Everflow + + + ERSPANV6 + EverflowV6 + EverflowV6 + + + PortChannel102;PortChannel105;PortChannel108;PortChannel1011;etp9;etp10;etp11;etp12;etp13;etp14;etp15;etp16;etp17;etp18;etp19;etp20;etp21;etp22;etp23;etp24;etp25;etp26;etp27;etp28 + DataAcl + DataPlane + + + + + + + + + DeviceInterfaceLink + ARISTA20T0 + Ethernet1 + mtvr-leopard-01 + etp28 + 400000 + + + + + mtvr-leopard-01 + Mellanox-SN4700-O28 + + 10.245.20.49 + + + + ARISTA16T0 + + 10.245.32.142 + + Arista-VM + + + ARISTA11T0 + + 10.245.32.137 + + Arista-VM + + + ARISTA10T0 + + 10.245.32.136 + + Arista-VM + + + ARISTA17T0 + + 10.245.32.143 + + Arista-VM + + + ARISTA09T0 + + 10.245.32.135 + + Arista-VM + + + ARISTA20T0 + + 10.245.32.146 + + Arista-VM + + + ARISTA08T0 + + 10.245.32.134 + + Arista-VM + + + ARISTA07T0 + + 10.245.32.133 + + Arista-VM + + + ARISTA07T2 + + 10.245.32.126 + + Arista-VM + + + ARISTA01T2 + + 10.245.32.123 + + Arista-VM + + + ARISTA01T0 + + 10.245.32.127 + + Arista-VM + + + ARISTA05T2 + + 10.245.32.125 + + Arista-VM + + + ARISTA05T0 + + 10.245.32.131 + + Arista-VM + + + ARISTA02T0 + + 10.245.32.128 + + Arista-VM + + + ARISTA03T0 + + 10.245.32.129 + + Arista-VM + + + ARISTA03T2 + + 10.245.32.124 + + Arista-VM + + + ARISTA04T0 + + 10.245.32.130 + + Arista-VM + + + ARISTA18T0 + + 10.245.32.144 + + Arista-VM + + + ARISTA15T0 + + 10.245.32.141 + + Arista-VM + + + ARISTA19T0 + + 10.245.32.145 + + Arista-VM + + + ARISTA14T0 + + 10.245.32.140 + + Arista-VM + + + ARISTA12T0 + + 10.245.32.138 + + Arista-VM + + + ARISTA13T0 + + 10.245.32.139 + + Arista-VM + + + ARISTA06T0 + + 10.245.32.132 + + Arista-VM + + + + + true + + + DeviceInterface + + true + true + 1 + etp1 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp2 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp3 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp4 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp5 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp6 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp7 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp8 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp9 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp10 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp11 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp12 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp13 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp14 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp15 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp16 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp17 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp18 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp19 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp20 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp21 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp22 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp23 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp24 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp25 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp26 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp27 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp28 + + false + 0 + 0 + 400000 + + + DeviceInterface + + true + true + 1 + etp29 + + false + 0 + 0 + 200000 + + + DeviceInterface + + true + true + 1 + etp30 + + false + 0 + 0 + 200000 + + + DeviceInterface + + true + true + 1 + etp31 + + false + 0 + 0 + 200000 + + + DeviceInterface + + true + true + 1 + etp32 + + false + 0 + 0 + 200000 + + + true + 0 + Mellanox-SN4700-O28 + + + + + + mtvr-leopard-01 + + + DeploymentId + + 1 + + + CloudType + + Public + + + QosProfile + + Profile0 + + + DhcpResources + + 192.0.0.1;192.0.0.2;192.0.0.3;192.0.0.4 + + + NtpResources + + 10.210.25.32;10.75.202.2 + + + SnmpResources + + 10.0.0.9 + + + TacacsGroup + + testlab + + + TacacsServer + + 10.7.34.20 + + + ForcedMgmtRoutes + + 10.75.0.0/16;10.213.0.0/16;10.215.0.0/16;10.9.0.0/16;10.212.0.0/16 + + + ErspanDestinationIpv4 + + 10.0.0.7 + + + + + + + mtvr-leopard-01 + Mellanox-SN4700-O28 + \ No newline at end of file diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json new file mode 100644 index 000000000000..95add1de513a --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-mellanox4700-o28-t1-smartswitch.json @@ -0,0 +1,814 @@ +{ + "PORT_QOS_MAP": { + "global": { + "dscp_to_tc_map": "AZURE" + }, + "Ethernet216": { + "dscp_to_tc_map": "AZURE", + "tc_to_queue_map": "AZURE", + "pfc_enable": "3,4", + "pfcwd_sw_enable": "3,4", + "tc_to_pg_map": "AZURE", + "pfc_to_queue_map": "AZURE" + }, + "Ethernet224": { + "dscp_to_tc_map": "AZURE", + "tc_to_queue_map": "AZURE", + "tc_to_pg_map": "AZURE", + "pfc_to_queue_map": "AZURE" + }, + "Ethernet232": { + "dscp_to_tc_map": "AZURE", + "tc_to_queue_map": "AZURE", + "tc_to_pg_map": "AZURE", + "pfc_to_queue_map": "AZURE" + }, + "Ethernet240": { + "dscp_to_tc_map": "AZURE", + "tc_to_queue_map": "AZURE", + "tc_to_pg_map": "AZURE", + "pfc_to_queue_map": "AZURE" + }, + "Ethernet248": { + "dscp_to_tc_map": "AZURE", + "tc_to_queue_map": "AZURE", + "tc_to_pg_map": "AZURE", + "pfc_to_queue_map": "AZURE" + } + }, + "QUEUE": { + "Ethernet216|3": { + "scheduler": "scheduler.1", + "wred_profile": "AZURE_LOSSLESS" + }, + "Ethernet224|3": { + "scheduler": "scheduler.0" + }, + "Ethernet232|3": { + "scheduler": "scheduler.0" + }, + "Ethernet240|3": { + "scheduler": "scheduler.0" + }, + "Ethernet248|3": { + "scheduler": "scheduler.0" + }, + "Ethernet216|4": { + "scheduler": "scheduler.1", + "wred_profile": "AZURE_LOSSLESS" + }, + "Ethernet224|4": { + "scheduler": "scheduler.0" + }, + "Ethernet232|4": { + "scheduler": "scheduler.0" + }, + "Ethernet240|4": { + "scheduler": "scheduler.0" + }, + "Ethernet248|4": { + "scheduler": "scheduler.0" + }, + "Ethernet216|0": { + "scheduler": "scheduler.0" + }, + "Ethernet224|0": { + "scheduler": "scheduler.0" + }, + "Ethernet232|0": { + "scheduler": "scheduler.0" + }, + "Ethernet240|0": { + "scheduler": "scheduler.0" + }, + "Ethernet248|0": { + "scheduler": "scheduler.0" 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"profile": "q_lossy_profile" + }, + "Ethernet192|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet200|5-6": { + "profile": "q_lossy_profile" + }, + "Ethernet208|5-6": { + "profile": "q_lossy_profile" + } + } +} diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py index 5afd6ed0b941..ed8ed58e488a 100644 --- a/src/sonic-config-engine/tests/test_j2files.py +++ b/src/sonic-config-engine/tests/test_j2files.py @@ -506,6 +506,58 @@ def test_qos_dscp_remapping_render_template(self): assert utils.cmp(sample_output_file, test_output) os.remove(test_output) + def test_qos_smartswitch_render_template(self): + if utils.PYvX_DIR != 'py3': + # Skip on python2 as the change will not be backported to previous version + return + + dir_paths = [ + '../../../device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28', + '../../../device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28' + ] + sample_outputs = [ + 'qos-mellanox4700-o28-t1-smartswitch.json', + 'qos-mellanox4700-o28-t1-smartswitch_dyn.json' + ] + sample_minigraph_files = [ + 'sample-mellanox-4700-t1-minigraph-smartswitch.xml', + 'sample-mellanox-4700-t1-minigraph-smartswitch.xml' + ] + buffer_files = [ + 'buffers.json.j2', # traditional buffer mode + 'buffers_dynamic.json.j2' # dynamic buffer mode + ] + + for i, path in enumerate(dir_paths): + device_template_path = os.path.join(self.test_dir, path) + sample_output = sample_outputs[i] + sample_minigraph_file = os.path.join(self.test_dir,sample_minigraph_files[i]) + qos_file = os.path.join(device_template_path, 'qos.json.j2') + buf_file = os.path.join(device_template_path, buffer_files[i]) + hwsku_json_file = os.path.join(device_template_path, 'hwsku.json') + plat_json_file = os.path.join(device_template_path, '../platform.json') + test_output = os.path.join(self.test_dir, 'output.json') + + # copy qos_config.j2 & buffer_config.j2 to the target directory to have all templates in one directory + qos_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'qos_config.j2') + shutil.copy2(qos_config_file, device_template_path) + + buf_config_file = os.path.join(self.test_dir, '..', '..', '..', 'files', 'build_templates', 'buffers_config.j2') + shutil.copy2(buf_config_file, device_template_path) + + argument = ['-m', sample_minigraph_file, '-p', plat_json_file, '-S', hwsku_json_file, '-t', "{},config-db".format(qos_file), '-t', "{},config-db".format(buf_file), '--print-data'] + self.run_script(argument, output_file=test_output) + + # cleanup + qos_config_file_new = os.path.join(device_template_path, 'qos_config.j2') + os.remove(qos_config_file_new) + buf_config_file_new = os.path.join(device_template_path, 'buffers_config.j2') + os.remove(buf_config_file_new) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, sample_output) + assert utils.cmp_tables(sample_output_file, test_output) + os.remove(test_output) + def test_config_brcm_render_template(self): if utils.PYvX_DIR != 'py3': #Skip on python2 as the change will not be backported to previous version