diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk index b46d67307fec..4def857c0ad7 100644 --- a/platform/mellanox/hw-management.mk +++ b/platform/mellanox/hw-management.mk @@ -16,7 +16,7 @@ # # Mellanox HW Management -MLNX_HW_MANAGEMENT_VERSION = 7.0030.2008 +MLNX_HW_MANAGEMENT_VERSION = 7.0030.3009 export MLNX_HW_MANAGEMENT_VERSION diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt index f0cbd0e61f77..911f1a5a5b6b 160000 --- a/platform/mellanox/hw-management/hw-mgmt +++ b/platform/mellanox/hw-management/hw-mgmt @@ -1 +1 @@ -Subproject commit f0cbd0e61f77ca0d8ca37612abc5fe8339e0f884 +Subproject commit 911f1a5a5b6bc255fcf3439099e67053530d9855 diff --git a/platform/mellanox/hw-management/hwmgmt_nonup_patches b/platform/mellanox/hw-management/hwmgmt_nonup_patches index 35bc2c3cca17..a247853ce55a 100644 --- a/platform/mellanox/hw-management/hwmgmt_nonup_patches +++ b/platform/mellanox/hw-management/hwmgmt_nonup_patches @@ -1,33 +1 @@ # Current non-upstream patch list, should be updated by hwmgmt_kernel_patches.py script -0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch -0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch -0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch -0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch -0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch -0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch -0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch -0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch -0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch -0054-platform-mellanox-Introduce-support-for-switches-equ.patch -0055-mellanox-Relocate-mlx-platform-driver.patch -0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch -0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch -0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch -0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch -0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch -0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch -0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch -0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch -0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch -0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch -0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch -0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch -0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch -0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch -0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch -0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch -0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch -0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch -0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch -8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch -8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch index 76cb7240d61c..8b137891791f 100644 --- a/platform/mellanox/non-upstream-patches/external-changes.patch +++ b/platform/mellanox/non-upstream-patches/external-changes.patch @@ -1,53 +1 @@ ---- a/patch/series -+++ b/patch/series -@@ -113,17 +113,49 @@ - 0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch - 0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch - 0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch -+0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch - 0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch -+0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch -+0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch -+0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch -+0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch -+0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch -+0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch -+0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch - 0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch - 0052-i2c-mux-Add-register-map-based-mux-driver.patch -+0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch -+0054-platform-mellanox-Introduce-support-for-switches-equ.patch -+0055-mellanox-Relocate-mlx-platform-driver.patch - 0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch - 0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch - 0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch - 0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch - 0063-gpio-mlxbf3-Add-gpio-driver-support.patch - 0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch -+0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch -+0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch -+0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch -+0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch -+0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch -+0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch -+0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch -+0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch -+0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch -+0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch -+0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch -+0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch -+0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch -+0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch -+0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch -+0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch -+0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch -+0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch -+0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch - 0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch -+8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch - 8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch -+8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch - 8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch - 8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch - 8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch diff --git a/platform/mellanox/non-upstream-patches/patches/0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch b/platform/mellanox/non-upstream-patches/patches/0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch deleted file mode 100644 index df8454321a83..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0042-hwmon-mlxreg-fan-Add-support-for-new-flavour-of-capa.patch +++ /dev/null @@ -1,65 +0,0 @@ -From bb46d45ce13c8faf9c2ab57b945c3a3adc587918 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sun, 23 Jul 2023 06:26:09 +0000 -Subject: [PATCH backport 6.1.42 42/85] hwmon: (mlxreg-fan) Add support for new - flavour of capability register - -FAN platform data is common across the various systems, while fan -driver should be able to apply only the fan instances relevant -to specific system. - -For example, platform data might contain descriptions for fan1, -fan2, ..., fan{n}, while some systems equipped with all 'n' fans, -others with less. -Also, on some systems fan drawer can be equipped with several -tachometers and on others only with one. - -For detection of the real number of equipped drawers and tachometers -special capability registers are used. -These registers used to indicate presence of drawers and tachometers -through the bitmap. - -For some new big modular systems this register will provide presence -data by counter. - -Use slot parameter to distinct whether capability register contains -bitmask or counter. - -Signed-off-by: Vadim Pasternak ---- - drivers/hwmon/mlxreg-fan.c | 12 ++++++++++-- - 1 file changed, 10 insertions(+), 2 deletions(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index 96017cc8da7e..dad94d2892b2 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -390,7 +390,7 @@ static int mlxreg_fan_connect_verify(struct mlxreg_fan *fan, - return err; - } - -- return !!(regval & data->bit); -+ return data->slot ? (data->slot <= regval ? 1 : 0) : !!(regval & data->bit); - } - - static int mlxreg_pwm_connect_verify(struct mlxreg_fan *fan, -@@ -527,7 +527,15 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan, - return err; - } - -- drwr_avail = hweight32(regval); -+ /* -+ * The number of drawers could be specified in registers by counters for newer -+ * systems, or by bitmasks for older systems. In case the data is provided by -+ * counter, it is indicated through 'version' field. -+ */ -+ if (pdata->version) -+ drwr_avail = regval; -+ else -+ drwr_avail = hweight32(regval); - if (!tacho_avail || !drwr_avail || tacho_avail < drwr_avail) { - dev_err(fan->dev, "Configuration is invalid: drawers num %d tachos num %d\n", - drwr_avail, tacho_avail); --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch b/platform/mellanox/non-upstream-patches/patches/0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch deleted file mode 100644 index 225ef9b30a17..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0044-leds-mlxreg-Add-support-for-new-flavour-of-capabilit.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 46c4b0cdf2a3abe321e137bcb87e5639c39fd655 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 20 Jul 2023 11:01:56 +0000 -Subject: [PATCH backport 6.1.42 44/85] leds: mlxreg: Add support for new - flavour of capability register - -LED platform data is common across the various systems, while LED -driver should be able to apply only the LED instances relevant -to specific system. - -For example, platform data might contain descriptions for fan1, -fan2, ..., fan{n} LEDs, while some systems equipped with all 'n' fan -LEDs, others with less. - -For detection of the real number of equipped LEDs special capability -register is used. -This register used to indicate presence of LED through the bitmap. - -For some new big modular systems this register will provide presence -data by counter. - -Use slot parameter to distinct whether capability register contains -bitmask or counter. - -Signed-off-by: Vadim Pasternak ---- - drivers/leds/leds-mlxreg.c | 12 +++++++++--- - 1 file changed, 9 insertions(+), 3 deletions(-) - -diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c -index b7855c93bd72..063a9cb50a2b 100644 ---- a/drivers/leds/leds-mlxreg.c -+++ b/drivers/leds/leds-mlxreg.c -@@ -206,16 +206,22 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv) - dev_err(&priv->pdev->dev, "Failed to query capability register\n"); - return err; - } -- if (!(regval & data->bit)) -+ /* -+ * If slot is specified - validate if slot is equipped on system. -+ * In case slot is specified in platform data, capability register -+ * comtains the counter of untits. -+ */ -+ if (data->slot && data->slot > regval) -+ continue; -+ else if (!(regval & data->bit)) - continue; - /* - * Field "bit" can contain one capability bit in 0 byte - * and offset bit in 1-3 bytes. Clear capability bit and -- * keep only offset bit. -+ * contains the counter of units. - */ - data->bit &= MLXREG_LED_CAPABILITY_CLEAR; - } -- - led_cdev = &led_data->led_cdev; - led_data->data_parent = priv; - if (strstr(data->label, "red") || --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch b/platform/mellanox/non-upstream-patches/patches/0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch deleted file mode 100644 index a20c6183bc65..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0045-leds-mlxreg-Remove-code-for-amber-LED-colour.patch +++ /dev/null @@ -1,47 +0,0 @@ -From af93d2527b5af3f2e53507c7e35bcd9c9bd521cb Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 20 Jul 2023 11:17:31 +0000 -Subject: [PATCH backport 6.1.42 45/85] leds: mlxreg: Remove code for amber LED - colour - -Remove unused code for amber LED colour. - -In case system LED color is "green", "orange" or "amber" same code is -to be used for colour setting. - -Signed-off-by: Vadim Pasternak ---- - drivers/leds/leds-mlxreg.c | 8 ++------ - 1 file changed, 2 insertions(+), 6 deletions(-) - -diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c -index 063a9cb50a2b..215132f67c07 100644 ---- a/drivers/leds/leds-mlxreg.c -+++ b/drivers/leds/leds-mlxreg.c -@@ -19,7 +19,6 @@ - #define MLXREG_LED_IS_OFF 0x00 /* Off */ - #define MLXREG_LED_RED_SOLID 0x05 /* Solid red */ - #define MLXREG_LED_GREEN_SOLID 0x0D /* Solid green */ --#define MLXREG_LED_AMBER_SOLID 0x09 /* Solid amber */ - #define MLXREG_LED_BLINK_3HZ 167 /* ~167 msec off/on - HW support */ - #define MLXREG_LED_BLINK_6HZ 83 /* ~83 msec off/on - HW support */ - #define MLXREG_LED_CAPABILITY_CLEAR GENMASK(31, 8) /* Clear mask */ -@@ -224,13 +223,10 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv) - } - led_cdev = &led_data->led_cdev; - led_data->data_parent = priv; -- if (strstr(data->label, "red") || -- strstr(data->label, "orange")) { -+ if (strstr(data->label, "red") || strstr(data->label, "orange") || -+ strstr(data->label, "amber")) { - brightness = LED_OFF; - led_data->base_color = MLXREG_LED_RED_SOLID; -- } else if (strstr(data->label, "amber")) { -- brightness = LED_OFF; -- led_data->base_color = MLXREG_LED_AMBER_SOLID; - } else { - brightness = LED_OFF; - led_data->base_color = MLXREG_LED_GREEN_SOLID; --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch b/platform/mellanox/non-upstream-patches/patches/0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch deleted file mode 100644 index 7d242bac5454..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0046-Extend-driver-to-support-Infineon-Digital-Multi-phas.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 276c9eae3cf83bb65c575b423c785d0ff37b6da0 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 17 Jul 2023 15:40:08 +0000 -Subject: [PATCH backport 6.1.42 46/85] Extend driver to support Infineon - Digital Multi-phase XDPE1A2G7 device. - -From telemetry perspective device is almost the same as XDPE15284, but -does not support READ_EIN (86h) and READ_EOUT (87h) commands. - -Signed-off-by: Vadim Pasternak ---- - drivers/hwmon/pmbus/xdpe152c4.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/hwmon/pmbus/xdpe152c4.c b/drivers/hwmon/pmbus/xdpe152c4.c -index b8a36ef73e45..1ef1141ba537 100644 ---- a/drivers/hwmon/pmbus/xdpe152c4.c -+++ b/drivers/hwmon/pmbus/xdpe152c4.c -@@ -44,6 +44,7 @@ static int xdpe152_probe(struct i2c_client *client) - } - - static const struct i2c_device_id xdpe152_id[] = { -+ {"xdpe1a2g7", 0}, - {"xdpe152c4", 0}, - {"xdpe15284", 0}, - {} -@@ -52,6 +53,7 @@ static const struct i2c_device_id xdpe152_id[] = { - MODULE_DEVICE_TABLE(i2c, xdpe152_id); - - static const struct of_device_id __maybe_unused xdpe152_of_match[] = { -+ {.compatible = "infineon,xdpe1a2g7"}, - {.compatible = "infineon,xdpe152c4"}, - {.compatible = "infineon,xdpe15284"}, - {} --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch b/platform/mellanox/non-upstream-patches/patches/0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch deleted file mode 100644 index cafc9b58d6b2..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0047-dt-bindings-trivial-devices-Add-infineon-xdpe1a2g7.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 62520e9d0ab641b36fb770477792073e6aad4d54 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 17 Jul 2023 16:24:58 +0000 -Subject: [PATCH backport 6.1.42 47/85] dt-bindings: trivial-devices: Add - infineon,xdpe1a2g7 - -Add new Infineon Multi-phase Digital VR Controller xdpe1a2g7 - -Signed-off-by: Vadim Pasternak ---- - Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml -index 61746755c107..7637390dfe09 100644 ---- a/Documentation/devicetree/bindings/trivial-devices.yaml -+++ b/Documentation/devicetree/bindings/trivial-devices.yaml -@@ -145,6 +145,8 @@ properties: - - infineon,tlv493d-a1b6 - # Infineon Multi-phase Digital VR Controller xdpe11280 - - infineon,xdpe11280 -+ # Infineon Multi-phase Digital VR Controller xdpe1a2g7 -+ - infineon,xdpe1a2g7 - # Infineon Multi-phase Digital VR Controller xdpe12254 - - infineon,xdpe12254 - # Infineon Multi-phase Digital VR Controller xdpe12284 --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch b/platform/mellanox/non-upstream-patches/patches/0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch deleted file mode 100644 index 860a7d220adf..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0048-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2891-c.patch +++ /dev/null @@ -1,563 +0,0 @@ -From c8a04a4c79a9fb99215e93884ff76b89e9947275 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 13 Jul 2023 06:16:53 +0000 -Subject: [PATCH backport 6.1.42 48/85] hwmon: (pmbus) Add support for MPS - Multi-phase mp2891 controller -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Introduce driver for dual-loop, digital, multi-phase controller MP2891 from -Monolithic Power Systems, Inc. (MPS) vendor. - -The MP2891 can work with MPS’s Intelli-PhaseTM products to complete the -multi-phase voltage regulator (VR) solution with minimal external -components. - -This device supports: -- Two power rails. -- Programmable Multi-Phase up to 16 Phases on rail 1, and a maximum of 8 - phases on rail 2. - -Signed-off-by: Vadim Pasternak ---- - Documentation/hwmon/mp2891.rst | 128 ++++++++++++ - drivers/hwmon/pmbus/Kconfig | 9 + - drivers/hwmon/pmbus/Makefile | 1 + - drivers/hwmon/pmbus/mp2891.c | 357 +++++++++++++++++++++++++++++++++ - 4 files changed, 495 insertions(+) - create mode 100644 Documentation/hwmon/mp2891.rst - create mode 100644 drivers/hwmon/pmbus/mp2891.c - -diff --git a/Documentation/hwmon/mp2891.rst b/Documentation/hwmon/mp2891.rst -new file mode 100644 -index 000000000000..c4bda3d7ee8a ---- /dev/null -+++ b/Documentation/hwmon/mp2891.rst -@@ -0,0 +1,128 @@ -+.. SPDX-License-Identifier: GPL-2.0 -+ -+Kernel driver mp2891 -+==================== -+ -+Supported chips: -+ -+ * MPS MP2891 -+ -+ Prefix: 'mp2891' -+ -+Author: -+ -+ Vadim Pasternak -+ -+Description -+----------- -+ -+This driver implements support for Monolithic Power Systems, Inc. (MPS) -+vendor dual-loop, digital, multi-phase controller MP2891. -+The MP2891 can work with MPS’s Intelli-PhaseTM products to complete the -+multi-phase voltage regulator (VR) solution with minimal external components. -+ -+MP2891 is available in a QFN-56 (7mmx7mm) package. -+ -+This device supports: -+ -+- Two power rails. -+- Programmable Multi-Phase up to 16 Phases on rail 1, and a maximum of 8 phases -+ on rail 2. -+- PWM-VID Interface. -+- Two pages for telemetry. -+- Programmable pins for PMBus Address. -+- Ability to store and restore device configurations. -+- 200kHz to 3MHz Switching Frequency. -+- Automatic Loop Compensation. -+- Couple Inductor Mode. -+- Supports Multi-Configuration for 6 Different Applications. -+- Flexible Pulse-Width Modulation (PWM) Assignment for 2 Rails. -+- Automatic Phase-Shedding (APS) to Improve Overall Efficiency. -+- Phase-to-Phase Active Current Balancing with Configurable Offsets for Thermal -+ Balance. -+- Digital Load-Line Regulation. -+- Overclocking Mode by Adding Offset to VOUT. -+ -+Device complaint with: -+ -+- PMBus rev 1.3 interface. -+ -+Device supports direct format for reading output current, output voltage, -+input and output power and temperature. -+Device supports linear format for reading input voltage and input power. -+ -+The driver provides the next attributes for the current: -+ -+- for current out input and maximum alarm; -+- for phase current: input and label. -+ -+The driver exports the following attributes via the 'sysfs' files, where: -+ -+- 'n' is number of configured phases (from 1 to 10); -+- index 1 for "iout"; -+- indexes 2 ... 1 + n for phases. -+ -+**curr[1-{1+n}]_input** -+ -+**curr[1-{1+n}]_label** -+ -+**curr1_max** -+ -+**curr1_max_alarm** -+ -+The driver provides the next attributes for the voltage: -+ -+- for voltage in: input, low and high critical thresholds, low and high -+ critical alarms; -+- for voltage out: input and high alarm; -+ -+The driver exports the following attributes via the 'sysfs' files, where -+ -+**in1_crit** -+ -+**in1_crit_alarm** -+ -+**in1_input** -+ -+**in1_label** -+ -+**in1_min** -+ -+**in1_min_alarm** -+ -+**in2_alarm** -+ -+**in2_input** -+ -+**in2_label** -+ -+The driver provides the next attributes for the power: -+ -+- for power in alarm and input. -+- for power out: cap, cap alarm an input. -+ -+The driver exports the following attributes via the 'sysfs' files, where -+- indexes 1 for "pin"; -+- indexes 2 for "pout"; -+ -+**power1_alarm** -+ -+**power1_input** -+ -+**power1_label** -+ -+**power2_input** -+ -+**power2_label** -+ -+**power2_max** -+ -+**power2_max_alarm** -+ -+The driver provides the next attributes for the temperature: -+ -+**temp1_input** -+ -+**temp1_max** -+ -+**temp1_max_alarm** -diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig -index 89668af67206..77d67344cee4 100644 ---- a/drivers/hwmon/pmbus/Kconfig -+++ b/drivers/hwmon/pmbus/Kconfig -@@ -299,6 +299,15 @@ config SENSORS_MP2888 - This driver can also be built as a module. If so, the module will - be called mp2888. - -+config SENSORS_MP2891 -+ tristate "MPS MP2891" -+ help -+ If you say yes here you get hardware monitoring support for MPS -+ MP2891 Dual Loop Digital Multi-Phase Controller. -+ -+ This driver can also be built as a module. If so, the module will -+ be called mp2891. -+ - config SENSORS_MP2975 - tristate "MPS MP2975" - help -diff --git a/drivers/hwmon/pmbus/Makefile b/drivers/hwmon/pmbus/Makefile -index 0002dbe22d52..8e767d7b8c5b 100644 ---- a/drivers/hwmon/pmbus/Makefile -+++ b/drivers/hwmon/pmbus/Makefile -@@ -32,6 +32,7 @@ obj-$(CONFIG_SENSORS_MAX31785) += max31785.o - obj-$(CONFIG_SENSORS_MAX34440) += max34440.o - obj-$(CONFIG_SENSORS_MAX8688) += max8688.o - obj-$(CONFIG_SENSORS_MP2888) += mp2888.o -+obj-$(CONFIG_SENSORS_MP2891) += mp2891.o - obj-$(CONFIG_SENSORS_MP2975) += mp2975.o - obj-$(CONFIG_SENSORS_MP5023) += mp5023.o - obj-$(CONFIG_SENSORS_PLI1209BC) += pli1209bc.o -diff --git a/drivers/hwmon/pmbus/mp2891.c b/drivers/hwmon/pmbus/mp2891.c -new file mode 100644 -index 000000000000..e9e82844ee2a ---- /dev/null -+++ b/drivers/hwmon/pmbus/mp2891.c -@@ -0,0 +1,357 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers(MP2891) -+ * -+ * Copyright (C) 2023 Nvidia -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "pmbus.h" -+ -+/* Vendor specific registers. */ -+/* -+ * MP2891_MFR_SVI3_IOUT_PRT: -+ * bits 15:5 - reserved zeros; -+ * bits 4:3 - set SVI3 Vout digital filter -+ * b00: 5kHz -+ * b01: 2kHz -+ * b10: 1kHz -+ * b11: no filter -+ * bits 2:0 - define output current scaling selection of rail1. -+ * b000: 1 A/LSB -+ * b001: (1/32) A/LSB -+ * b010: (1/16) A/LSB -+ * b011: (1/8) A/LSB -+ * b100: (1/4) A/LSB -+ * b101: (1/2) A/LSB -+ * b110: 1 A/LSB -+ * b111: 2 A/LSB -+ */ -+#define MP2891_MFR_SVI3_IOUT_PRT 0x65 -+/* -+ * MP2891_MFR_VOUT_LOOP_CTRL: -+ * bits 15:14 define the VID step. -+ * b00: 6.25mV -+ * b01: 5mV -+ * b10: 2mV -+ * b11: 1mV -+ * bit 13 enable bit of 2.5mV resolution. -+ * b0: disable -+ * b1: enable -+ * bits 12:11 reserved zeros -+ * bit 10 defines rail remote sense amplifier gain: -+ * b0: 1 -+ * b1: 0.5 -+ * bit 9 DC reference_select -+ * b0: Comp EA uses Vfb and Vref -+ * b1: Comp EA uses Vdiff and Vref -+ * bit 8 enables DC loop calibration at DCM. -+ * b0: disable -+ * b1: enable -+ * bit 7 enables DC loop calibration both at DCM and CCM operation. -+ * b0: disable -+ * b1: enable -+ * bit 6 - holds DC loop when the PWM time interval meets PWM switching period condition -+ * set with PMBus command MFR_VR_CONFIG1 (B7h), bit [3:2]. -+ * b0: disable hold DC loop when PWM switching period condition meets -+ * b1: hold DC loop when PWM switching period condition meets -+ * bit 5 hold DC loop when phase count is changed. -+ * b0: disable hold DC loop when phase number change -+ * b1: hold the DC loop when phase number change. -+ * bit 4 hold DC loop regulation when a load transient event is detected. -+ * b0: disable hold DC loop when meets VFB+/- window condition -+ * b1: hold DC loop when meets VFB+/- window condition -+ * bits 3:0 set the DC loop minimal holding time in direct format. -+ */ -+#define MP2891_MFR_VOUT_LOOP_CTRL 0xbd -+ -+#define MP2891_VID_STEP_POS 14 -+#define MP2891_VID_STEP_MASK GENMASK(MP2891_VID_STEP_POS + 1, MP2891_VID_STEP_POS) -+#define MP2891_DAC_2P5MV_MASK BIT(13) -+#define MP2891_IOUT_SCALE_MASK GENMASK(2, 0) -+ -+#define MP2891_PAGE_NUM 2 -+#define MP2891_RAIL1_FUNC (PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT | \ -+ PMBUS_HAVE_TEMP | PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | \ -+ PMBUS_PHASE_VIRTUAL) -+ -+#define MP2891_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_IOUT | PMBUS_HAVE_TEMP | \ -+ PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL) -+ -+struct mp2891_data { -+ struct pmbus_driver_info info; -+ int vid_step[MP2891_PAGE_NUM]; -+ int iout_scale[MP2891_PAGE_NUM]; -+}; -+ -+#define to_mp2891_data(x) container_of(x, struct mp2891_data, info) -+ -+static int mp2891_read_vout(struct i2c_client *client, int page, int phase, int reg) -+{ -+ int ret; -+ -+ const struct pmbus_driver_info *info = pmbus_get_driver_info(client); -+ struct mp2891_data *data = to_mp2891_data(info); -+ -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ -+ return ret < 0 ? ret : ret * data->vid_step[page] / 100; -+} -+ -+static int mp2891_read_iout(struct i2c_client *client, int page, int phase, int reg) -+{ -+ int ret; -+ -+ const struct pmbus_driver_info *info = pmbus_get_driver_info(client); -+ struct mp2891_data *data = to_mp2891_data(info); -+ -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ -+ return ret < 0 ? ret : ret * data->iout_scale[page]; -+} -+ -+static int mp2891_read_byte_data(struct i2c_client *client, int page, int reg) -+{ -+ int ret; -+ -+ switch (reg) { -+ case PMBUS_VOUT_MODE: -+ /* -+ * Enforce VOUT direct format, since device allows to set the -+ * different formats for the different rails. Conversion from -+ * VID to direct provided by driver internally, in case it is -+ * necessary. -+ */ -+ ret = PB_VOUT_MODE_DIRECT; -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ -+ return ret; -+} -+ -+static int mp2891_read_word_data(struct i2c_client *client, int page, int phase, int reg) -+{ -+ switch (reg) { -+ case PMBUS_READ_VOUT: -+ return mp2891_read_vout(client, page, phase, reg); -+ case PMBUS_READ_IOUT: -+ return mp2891_read_iout(client, page, phase, reg); -+ case PMBUS_OT_WARN_LIMIT: -+ case PMBUS_OT_FAULT_LIMIT: -+ case PMBUS_UT_WARN_LIMIT: -+ case PMBUS_UT_FAULT_LIMIT: -+ case PMBUS_VOUT_OV_WARN_LIMIT: -+ case PMBUS_VIN_OV_WARN_LIMIT: -+ case PMBUS_POUT_MAX: -+ case PMBUS_POUT_OP_FAULT_LIMIT: -+ case PMBUS_MFR_VIN_MIN: -+ case PMBUS_MFR_VOUT_MIN: -+ case PMBUS_MFR_VIN_MAX: -+ case PMBUS_MFR_VOUT_MAX: -+ case PMBUS_MFR_IIN_MAX: -+ case PMBUS_MFR_IOUT_MAX: -+ case PMBUS_MFR_PIN_MAX: -+ case PMBUS_MFR_POUT_MAX: -+ case PMBUS_MFR_MAX_TEMP_1: -+ return -ENXIO; -+ default: -+ return -EINVAL; -+ } -+} -+ -+static int mp2891_identify_vid(struct i2c_client *client, struct mp2891_data *data, u32 reg, -+ int page) -+{ -+ int ret; -+ -+ ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); -+ if (ret < 0) -+ return ret; -+ -+ ret = i2c_smbus_read_word_data(client, reg); -+ if (ret < 0) -+ return ret; -+ -+ /* -+ * Obtain vid_step from MP2891_MFR_VOUT_LOOP_CTRL register: -+ * bit 13 = 1, the vid_step is below 2.5mV/LSB; -+ * bit 13 = 0, the vid_step is defined by bits 15:14: -+ * 00b - 6.25mV/LSB, 01b - 5mV/LSB, 10b - 2mV/LSB, 11b - 1mV -+ */ -+ if ((ret & MP2891_DAC_2P5MV_MASK) >> MP2891_VID_STEP_POS) { -+ data->vid_step[page] = 250; -+ return 0; -+ } -+ -+ switch ((ret & MP2891_VID_STEP_MASK) >> MP2891_VID_STEP_POS) { -+ case 0: -+ data->vid_step[page] = 625; -+ break; -+ case 1: -+ data->vid_step[page] = 500; -+ break; -+ case 2: -+ data->vid_step[page] = 200; -+ break; -+ default: -+ data->vid_step[page] = 100; -+ break; -+ } -+ -+ return 0; -+} -+ -+static int mp2891_identify_rails_vid(struct i2c_client *client, struct mp2891_data *data) -+{ -+ int ret; -+ -+ /* Identify vid_step for rail 1. */ -+ ret = mp2891_identify_vid(client, data, MP2891_MFR_VOUT_LOOP_CTRL, 0); -+ if (ret < 0) -+ return ret; -+ -+ /* Identify vid_step for rail 2. */ -+ return mp2891_identify_vid(client, data, MP2891_MFR_VOUT_LOOP_CTRL, 1); -+} -+ -+static int -+mp2891_iout_scale_get(struct i2c_client *client, struct mp2891_data *data, u32 reg, int page) -+{ -+ int ret; -+ -+ ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); -+ if (ret < 0) -+ return ret; -+ -+ ret = i2c_smbus_read_word_data(client, reg); -+ if (ret < 0) -+ return ret; -+ -+ /* -+ * Obtain iout_scale from the register MP2891_MFR_SVI3_IOUT_PRT, bits 2-0. -+ * The value is selected as below: -+ * 000b - 1A/LSB, 001b - (1/32)A/LSB, 010b - (1/16)A/LSB, -+ * 011b - (1/8)A/LSB, 100b - (1/4)A/LSB, 101b - (1/2)A/LSB -+ * 110b - 1A/LSB, 111b - 2A/LSB -+ */ -+ switch (ret & MP2891_IOUT_SCALE_MASK) { -+ case 0: -+ case 6: -+ data->iout_scale[page] = 32; -+ return 0; -+ case 1: -+ data->iout_scale[page] = 1; -+ return 0; -+ case 2: -+ data->iout_scale[page] = 2; -+ return 0; -+ case 3: -+ data->iout_scale[page] = 4; -+ return 0; -+ case 4: -+ data->iout_scale[page] = 8; -+ return 0; -+ case 5: -+ data->iout_scale[page] = 16; -+ return 0; -+ default: -+ data->iout_scale[page] = 64; -+ return 0; -+ } -+} -+ -+static int mp2891_rails_iout_scale_get(struct i2c_client *client, struct mp2891_data *data) -+{ -+ int ret; -+ -+ /* Get iout_scale for rail 1. */ -+ ret = mp2891_iout_scale_get(client, data, MP2891_MFR_SVI3_IOUT_PRT, 0); -+ /* Get iout_scale for rail 2. */ -+ return ret < 0 ? ret : mp2891_iout_scale_get(client, data, MP2891_MFR_SVI3_IOUT_PRT, 1); -+} -+ -+static struct pmbus_driver_info mp2891_info = { -+ .pages = MP2891_PAGE_NUM, -+ .format[PSC_VOLTAGE_IN] = direct, -+ .format[PSC_VOLTAGE_OUT] = direct, -+ .format[PSC_CURRENT_OUT] = direct, -+ .format[PSC_TEMPERATURE] = direct, -+ .format[PSC_POWER] = linear, -+ .m[PSC_VOLTAGE_IN] = 1, -+ .m[PSC_VOLTAGE_OUT] = 1, -+ .m[PSC_CURRENT_OUT] = 32, -+ .m[PSC_TEMPERATURE] = 1, -+ .R[PSC_VOLTAGE_IN] = 3, -+ .R[PSC_VOLTAGE_OUT] = 3, -+ .R[PSC_CURRENT_OUT] = 0, -+ .R[PSC_TEMPERATURE] = 0, -+ .b[PSC_VOLTAGE_IN] = 0, -+ .b[PSC_VOLTAGE_OUT] = 0, -+ .b[PSC_CURRENT_OUT] = 0, -+ .b[PSC_TEMPERATURE] = 0, -+ .func[0] = MP2891_RAIL1_FUNC, -+ .func[1] = MP2891_RAIL2_FUNC, -+ .read_word_data = mp2891_read_word_data, -+ .read_byte_data = mp2891_read_byte_data, -+}; -+ -+static int mp2891_probe(struct i2c_client *client) -+{ -+ struct pmbus_driver_info *info; -+ struct mp2891_data *data; -+ int ret; -+ -+ data = devm_kzalloc(&client->dev, sizeof(struct mp2891_data), GFP_KERNEL); -+ -+ if (!data) -+ return -ENOMEM; -+ -+ memcpy(&data->info, &mp2891_info, sizeof(*info)); -+ info = &data->info; -+ -+ /* Identify VID setting per rail - obtain the vid_step of output voltage. */ -+ ret = mp2891_identify_rails_vid(client, data); -+ if (ret < 0) -+ return ret; -+ -+ /* Get iout scale per rail - obtain current scale. */ -+ ret = mp2891_rails_iout_scale_get(client, data); -+ if (ret < 0) -+ return ret; -+ -+ return pmbus_do_probe(client, info); -+} -+ -+static const struct i2c_device_id mp2891_id[] = { -+ {"mp2891", 0}, -+ {} -+}; -+MODULE_DEVICE_TABLE(i2c, mp2891_id); -+ -+static const struct of_device_id __maybe_unused mp2891_of_match[] = { -+ {.compatible = "mps,mp2891"}, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, mp2891_of_match); -+ -+static struct i2c_driver mp2891_driver = { -+ .driver = { -+ .name = "mp2891", -+ .of_match_table = mp2891_of_match, -+ }, -+ .probe_new = mp2891_probe, -+ .id_table = mp2891_id, -+}; -+ -+module_i2c_driver(mp2891_driver); -+ -+MODULE_DESCRIPTION("PMBus driver for MPS MP2891 device"); -+MODULE_LICENSE("GPL"); -+MODULE_IMPORT_NS(PMBUS); --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch b/platform/mellanox/non-upstream-patches/patches/0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch deleted file mode 100644 index 9bf39cb2b022..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0049-dt-bindings-trivial-devices-Add-mps-mp2891.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 98b6b44b7b190c664f41e482de4597571e700e7f Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 13 Jul 2023 06:20:05 +0000 -Subject: [PATCH backport 6.1.42 49/85] dt-bindings: trivial-devices: Add - mps,mp2891 - -Add new dual-loop, digital, multi-phase controller MP2891 fro -Monolithic Power Systems, Inc. (MPS) to trivial devices. - -Signed-off-by: Vadim Pasternak ---- - Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml -index 7637390dfe09..8e6c0bc60ee3 100644 ---- a/Documentation/devicetree/bindings/trivial-devices.yaml -+++ b/Documentation/devicetree/bindings/trivial-devices.yaml -@@ -113,6 +113,8 @@ properties: - - fsl,mpl3115 - # MPR121: Proximity Capacitive Touch Sensor Controller - - fsl,mpr121 -+ # Monolithic Power Systems Inc. multi-phase controller mp2891 -+ - mps,mp2891 - # Monolithic Power Systems Inc. multi-phase controller mp2888 - - mps,mp2888 - # Monolithic Power Systems Inc. multi-phase controller mp2975 --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch b/platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch deleted file mode 100644 index 3118617ea74c..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0050-leds-mlxreg-Skip-setting-LED-color-during-initializa.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 519742b99a6a2d6b8d5797d70608fdc954d2871a Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Wed, 7 Jul 2021 10:18:14 +0000 -Subject: [PATCH backport 6.1.42 55/85] leds: mlxreg: Skip setting LED color - during initialization - -Hardware controls LED through CPLD device and LED control ownership -passes to the software after it performs the first write operation for -any LED on a system. -For example, hardware sets "system" LED "green blink" during boot and -might change it to "red", in case something is went wrong from hardware -point of view. -The motivation for not setting LED during kernel initialization is for -keeping hardware settings visible for user, until user will not decide -to set LEDs according to user OS specific requirements. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - drivers/leds/leds-mlxreg.c | 3 --- - 1 file changed, 3 deletions(-) - -diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c -index 215132f67c07..c0caf810b6d0 100644 ---- a/drivers/leds/leds-mlxreg.c -+++ b/drivers/leds/leds-mlxreg.c -@@ -246,9 +246,6 @@ static int mlxreg_led_config(struct mlxreg_led_priv_data *priv) - if (err) - return err; - -- if (led_cdev->brightness) -- mlxreg_led_brightness_set(led_cdev, -- led_cdev->brightness); - dev_info(led_cdev->dev, "label: %s, mask: 0x%02x, offset:0x%02x\n", - data->label, data->mask, data->reg); - } --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch b/platform/mellanox/non-upstream-patches/patches/0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch deleted file mode 100644 index f396cf234c0b..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0053-platform-mellanox-Add-support-for-dynamic-I2C-channe.patch +++ /dev/null @@ -1,159 +0,0 @@ -From 7831c5d10460c08cb5837827784677e0286d14e7 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sun, 30 Jul 2023 21:31:54 +0000 -Subject: [PATH backport v6.1 53/54] platform/mellanox: Add support for dynamic - I2C channels infrastructure - -Allow to support platform configuration for dynamically allocated I2C -channels. -Motivation is to support I2C channels allocated in a non-continuous -way. - -Currently hotplug platform driver data structure contains static mux -channels for I2C hotplug devices. These channels numbers can be updated -dynamically and returned by mux driver's callback through the adapters -array. -Thus, hotplug mux channels will be aligned according to the dynamic -adapters data. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - drivers/platform/x86/mlx-platform.c | 69 ++++++++++++++++++++++++----- - 1 file changed, 59 insertions(+), 10 deletions(-) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 44f107965832..9021597b5446 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -350,6 +351,7 @@ - * @hotplug_resources: system hotplug resources - * @hotplug_resources_size: size of system hotplug resources - * @hi2c_main_init_status: init status of I2C main bus -+ * @mux_added: number of added mux segments - * @irq_fpga: FPGA IRQ number - */ - struct mlxplat_priv { -@@ -364,6 +366,7 @@ struct mlxplat_priv { - struct resource *hotplug_resources; - unsigned int hotplug_resources_size; - u8 i2c_main_init_status; -+ int mux_added; - int irq_fpga; - }; - -@@ -453,7 +456,9 @@ static struct i2c_mux_reg_platform_data mlxplat_default_mux_data[] = { - /* Platform mux configuration variables */ - static int mlxplat_max_adap_num; - static int mlxplat_mux_num; -+static int mlxplat_mux_hotplug_num; - static struct i2c_mux_reg_platform_data *mlxplat_mux_data; -+static struct i2c_mux_regmap_platform_data *mlxplat_mux_regmap_data; - static struct notifier_block *mlxplat_reboot_nb; - - /* Platform extended mux data */ -@@ -6126,12 +6131,17 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr) - /* Shift adapter ids, since expected parent adapter is not free. */ - *nr = i; - for (i = 0; i < mlxplat_mux_num; i++) { -- shift = *nr - mlxplat_mux_data[i].parent; -- mlxplat_mux_data[i].parent = *nr; -- mlxplat_mux_data[i].base_nr += shift; -+ if (mlxplat_mux_data) { -+ shift = *nr - mlxplat_mux_data[i].parent; -+ mlxplat_mux_data[i].parent = *nr; -+ mlxplat_mux_data[i].base_nr += shift; -+ } else if (mlxplat_mux_regmap_data) { -+ mlxplat_mux_regmap_data[i].parent = *nr; -+ } - } - -- if (shift > 0) -+ /* Shift bus only if mux provided by 'mlxplat_mux_data'. */ -+ if (shift > 0 && mlxplat_mux_data) - mlxplat_hotplug->shift_nr = shift; - - return 0; -@@ -6428,8 +6438,31 @@ mlxplat_i2c_mux_complition_notify(void *handle, struct i2c_adapter *parent, - struct i2c_adapter *adapters[]) - { - struct mlxplat_priv *priv = handle; -+ struct mlxreg_core_item *item; -+ int i, j; -+ -+ /* -+ * Hotplug platform driver data structure contains static mux channels for I2C hotplug -+ * devices. These channels numbers can be updated dynamically and returned by mux callback -+ * through the adapters array. Update mux channels according to the dynamic adapters data. -+ */ -+ if (priv->mux_added == mlxplat_mux_hotplug_num) { -+ item = mlxplat_hotplug->items; -+ for (i = 0; i < mlxplat_hotplug->counter; i++, item++) { -+ struct mlxreg_core_data *data = item->data; -+ -+ for (j = 0; j < item->count; j++, data++) { -+ if (data->hpdev.nr != MLXPLAT_CPLD_NR_NONE) -+ data->hpdev.nr = adapters[data->hpdev.nr - 2]->nr; -+ } -+ } -+ } - -- return mlxplat_post_init(priv); -+ /* Start post initialization only after last nux segment is added */ -+ if (++priv->mux_added == mlxplat_mux_num) -+ return mlxplat_post_init(priv); -+ -+ return 0; - } - - static int mlxplat_i2c_mux_topology_init(struct mlxplat_priv *priv) -@@ -6443,17 +6476,33 @@ static int mlxplat_i2c_mux_topology_init(struct mlxplat_priv *priv) - - priv->i2c_main_init_status = MLXPLAT_I2C_MAIN_BUS_HANDLE_CREATED; - for (i = 0; i < mlxplat_mux_num; i++) { -- priv->pdev_mux[i] = platform_device_register_resndata(&priv->pdev_i2c->dev, -- "i2c-mux-reg", i, NULL, 0, -- &mlxplat_mux_data[i], -- sizeof(mlxplat_mux_data[i])); -+ if (mlxplat_mux_data) { -+ priv->pdev_mux[i] = -+ platform_device_register_resndata(&priv->pdev_i2c->dev, -+ "i2c-mux-reg", i, NULL, 0, -+ &mlxplat_mux_data[i], -+ sizeof(mlxplat_mux_data[i])); -+ } else { -+ mlxplat_mux_regmap_data[i].handle = priv; -+ mlxplat_mux_regmap_data[i].regmap = priv->regmap; -+ mlxplat_mux_regmap_data[i].completion_notify = -+ mlxplat_i2c_mux_complition_notify; -+ priv->pdev_mux[i] = -+ platform_device_register_resndata(&priv->pdev_i2c->dev, -+ "i2c-mux-regmap", i, NULL, 0, -+ &mlxplat_mux_regmap_data[i], -+ sizeof(mlxplat_mux_regmap_data[i])); -+ } - if (IS_ERR(priv->pdev_mux[i])) { - err = PTR_ERR(priv->pdev_mux[i]); - goto fail_platform_mux_register; - } - } - -- return mlxplat_i2c_mux_complition_notify(priv, NULL, NULL); -+ if (mlxplat_mux_regmap_data && mlxplat_mux_regmap_data->completion_notify) -+ return 0; -+ -+ return mlxplat_post_init(priv); - - fail_platform_mux_register: - while (--i >= 0) --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0054-platform-mellanox-Introduce-support-for-switches-equ.patch b/platform/mellanox/non-upstream-patches/patches/0054-platform-mellanox-Introduce-support-for-switches-equ.patch deleted file mode 100644 index f1c90d620363..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0054-platform-mellanox-Introduce-support-for-switches-equ.patch +++ /dev/null @@ -1,312 +0,0 @@ -From 3e4ff8f2195a3dc7b04bb5a1b9fd6b655f78a75e Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 24 Jul 2023 11:10:50 +0000 -Subject: [PATH backport v6.1 54/54] platform: mellanox: Introduce support for - switches equipped with new FPGA device - -Add support for Nvidia MQM97xx and MSN47xx family switches equipped with -new FPGA device. - -These switches are based on previous generation of MQM97xx and MSN47xx -switches, but COMe module uses new FPGA device. - -Platform configuration for new switches is based on the new VMOD0016 -class. Configuration is extended to support new register map with -callbacks supporting indirect addressing for PCIe-to-LPC bridge. -This bridge provides interface between FPGA at COMe board (directly -connected to CPU PCIe root complex) to CPLDs on switch board (which -cannot be connected directly to PCIe root complex). - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - drivers/platform/x86/mlx-platform.c | 196 ++++++++++++++++++++++++++++ - 1 file changed, 196 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 9021597b5446..46958810e972 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -183,6 +183,9 @@ - #define MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET 0xfb - #define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET 0xfc - #define MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET 0xfd -+#define MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET 0x100 -+#define MLXPLAT_CPLD_LPC_REG_EXT_MID_OFFSET 0x195 -+#define MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET 0x1ff - #define MLXPLAT_CPLD_LPC_IO_RANGE 0x100 - - #define MLXPLAT_CPLD_LPC_PIO_OFFSET 0x10000UL -@@ -277,6 +280,7 @@ - /* Maximum number of possible physical buses equipped on system */ - #define MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM 16 - #define MLXPLAT_CPLD_MAX_PHYS_EXT_ADAPTER_NUM 24 -+#define MLXPLAT_CPLD_DEFAULT_MUX_HOTPLUG_VECTOR 0 - - /* Number of channels in group */ - #define MLXPLAT_CPLD_GRP_CHNL_NUM 8 -@@ -338,6 +342,21 @@ - #define PCI_DEVICE_ID_LATTICE_I2C_BRIDGE 0x9c2f - #define PCI_DEVICE_ID_LATTICE_JTAG_BRIDGE 0x9c30 - #define PCI_DEVICE_ID_LATTICE_LPC_BRIDGE 0x9c32 -+#define MLXPLAT_FPGA_PCI_BAR0_SIZE 0x4000 -+#define MLXPLAT_FPGA_PCI_BASE_OFFSET 0x00000000 -+#define MLXPLAT_FPGA_PCI_MSB_ADDR 0x25 -+#define MLXPLAT_FPGA_PCI_MSB_EXT_ADDR 0x20 -+#define MLXPLAT_FPGA_PCI_LSB_ADDR_OFFSET MLXPLAT_FPGA_PCI_BASE_OFFSET -+#define MLXPLAT_FPGA_PCI_MSB_ADDR_OFFSET (MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x01) -+#define MLXPLAT_FPGA_PCI_DATA_OUT_OFFSET (MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x02) -+#define MLXPLAT_FPGA_PCI_DATA_IN_OFFSET (MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x03) -+#define MLXPLAT_FPGA_PCI_CTRL_OFFSET (MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x04) -+#define MLXPLAT_FPGA_PCI_STAT_OFFSET (MLXPLAT_FPGA_PCI_BASE_OFFSET + 0x05) -+ -+#define MLXPLAT_FPGA_PCI_CTRL_READ BIT(0) -+#define MLXPLAT_FPGA_PCI_CTRL_WRITE BIT(1) -+#define MLXPLAT_FPGA_PCI_COMPLETED GENMASK(1, 0) -+#define MLXPLAT_FPGA_PCI_TO 50 /* usec */ - - /* mlxplat_priv - platform private data - * @pdev_i2c - i2c controller platform device -@@ -453,6 +472,28 @@ static struct i2c_mux_reg_platform_data mlxplat_default_mux_data[] = { - - }; - -+/* Default channels vector for regmap mux. */ -+static int mlxplat_default_regmap_mux_chan[] = { 1, 2, 3, 4, 5, 6, 7, 8 }; -+ -+/* Platform regmap mux data */ -+static struct i2c_mux_regmap_platform_data mlxplat_default_regmap_mux_data[] = { -+ { -+ .parent = 1, -+ .chan_ids = mlxplat_default_regmap_mux_chan, -+ .num_adaps = ARRAY_SIZE(mlxplat_default_regmap_mux_chan), -+ .sel_reg_addr = MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET, -+ .reg_size = 1, -+ }, -+ { -+ .parent = 1, -+ .chan_ids = mlxplat_default_regmap_mux_chan, -+ .num_adaps = ARRAY_SIZE(mlxplat_default_regmap_mux_chan), -+ .sel_reg_addr = MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET, -+ .reg_size = 1, -+ }, -+ -+}; -+ - /* Platform mux configuration variables */ - static int mlxplat_max_adap_num; - static int mlxplat_mux_num; -@@ -3540,6 +3581,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .mask = GENMASK(7, 0) & ~BIT(2), - .mode = 0200, - }, -+ { -+ .label = "kexec_activated", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0644, -+ }, - { - .label = "erot1_reset", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET, -@@ -5065,6 +5112,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET: - return true; - } - return false; -@@ -5230,6 +5278,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET: - return true; - } - return false; -@@ -5387,6 +5436,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET: - return true; - } - return false; -@@ -5417,6 +5467,14 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = { - { MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 }, - }; - -+static const struct reg_default mlxplat_mlxcpld_regmap_bf3[] = { -+ { MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, 0xc1 }, -+ { MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_WD1_ACT_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_WD2_ACT_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 }, -+}; -+ - static const struct reg_default mlxplat_mlxcpld_regmap_rack_switch[] = { - { MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, MLXPLAT_REGMAP_NVSWITCH_PWM_DEFAULT }, - { MLXPLAT_CPLD_LPC_REG_WD1_ACT_OFFSET, 0x00 }, -@@ -5545,6 +5603,114 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_eth_modular = { - .reg_write = mlxplat_mlxcpld_reg_write, - }; - -+/* Wait completion routine for indirect access for register map */ -+static int mlxplat_fpga_completion_wait(struct mlxplat_mlxcpld_regmap_context *ctx) -+{ -+ unsigned long end; -+ u8 status; -+ -+ end = jiffies + msecs_to_jiffies(MLXPLAT_FPGA_PCI_TO); -+ do { -+ status = ioread8(ctx->base + MLXPLAT_FPGA_PCI_STAT_OFFSET); -+ if (!(status & MLXPLAT_FPGA_PCI_COMPLETED)) -+ return 0; -+ cond_resched(); -+ } while (time_before(jiffies, end)); -+ -+ return -EIO; -+} -+ -+/* Read callback for indirect register map access */ -+static int mlxplat_fpga_reg_read(void *context, unsigned int reg, unsigned int *val) -+{ -+ struct mlxplat_mlxcpld_regmap_context *ctx = context; -+ unsigned int msb_off = MLXPLAT_FPGA_PCI_MSB_ADDR; -+ int err; -+ -+ if (reg >= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET) { -+ if (reg <= MLXPLAT_CPLD_LPC_REG_EXT_MID_OFFSET) { -+ /* Access to 2-nd FPGA bank */ -+ *val = ioread8(i2c_bridge_addr + reg - -+ MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET); -+ return 0; -+ } -+ /* Access to 3-rd FPGA bank */ -+ reg -= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET; -+ msb_off = MLXPLAT_FPGA_PCI_MSB_EXT_ADDR; -+ } -+ -+ /* Verify there is no pending transactions */ -+ err = mlxplat_fpga_completion_wait(ctx); -+ if (err) -+ return err; -+ -+ /* Set address in register space */ -+ iowrite8(msb_off, ctx->base + MLXPLAT_FPGA_PCI_MSB_ADDR_OFFSET); -+ iowrite8(reg, ctx->base + MLXPLAT_FPGA_PCI_LSB_ADDR_OFFSET); -+ /* Activate read operation */ -+ iowrite8(MLXPLAT_FPGA_PCI_CTRL_READ, ctx->base + MLXPLAT_FPGA_PCI_CTRL_OFFSET); -+ /* Verify transaction completion */ -+ err = mlxplat_fpga_completion_wait(ctx); -+ if (err) -+ return err; -+ -+ /* Read data */ -+ *val = ioread8(ctx->base + MLXPLAT_FPGA_PCI_DATA_IN_OFFSET); -+ -+ return 0; -+} -+ -+/* Write callback for indirect register map access */ -+static int mlxplat_fpga_reg_write(void *context, unsigned int reg, unsigned int val) -+{ -+ struct mlxplat_mlxcpld_regmap_context *ctx = context; -+ unsigned int msb_off = MLXPLAT_FPGA_PCI_MSB_ADDR; -+ int err; -+ -+ if (reg >= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET) { -+ if (reg <= MLXPLAT_CPLD_LPC_REG_EXT_MID_OFFSET) { -+ /* Access to 2-nd FPGA bank */ -+ iowrite8(val, i2c_bridge_addr + reg - MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET); -+ /* Flush modification */ -+ wmb(); -+ return 0; -+ } -+ -+ /* Access to 3-rd FPGA bank */ -+ reg -= MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET; -+ msb_off = MLXPLAT_FPGA_PCI_MSB_EXT_ADDR; -+ } -+ -+ /* Verify there is no pending transactions */ -+ err = mlxplat_fpga_completion_wait(ctx); -+ if (err) -+ return err; -+ -+ /* Set address in register space */ -+ iowrite8(msb_off, ctx->base + MLXPLAT_FPGA_PCI_MSB_ADDR_OFFSET); -+ iowrite8(reg, ctx->base + MLXPLAT_FPGA_PCI_LSB_ADDR_OFFSET); -+ /* Set data to be written */ -+ iowrite8(val, ctx->base + MLXPLAT_FPGA_PCI_DATA_OUT_OFFSET); -+ /* Activate write operation */ -+ iowrite8(MLXPLAT_FPGA_PCI_CTRL_WRITE, ctx->base + MLXPLAT_FPGA_PCI_CTRL_OFFSET); -+ -+ return mlxplat_fpga_completion_wait(ctx); -+} -+ -+static const struct regmap_config mlxplat_fpga_regmap_config_bf3_comex_default = { -+ .reg_bits = 9, -+ .val_bits = 8, -+ .max_register = 511, -+ .cache_type = REGCACHE_FLAT, -+ .writeable_reg = mlxplat_mlxcpld_writeable_reg, -+ .readable_reg = mlxplat_mlxcpld_readable_reg, -+ .volatile_reg = mlxplat_mlxcpld_volatile_reg, -+ .reg_defaults = mlxplat_mlxcpld_regmap_bf3, -+ .num_reg_defaults = ARRAY_SIZE(mlxplat_mlxcpld_regmap_bf3), -+ .reg_read = mlxplat_fpga_reg_read, -+ .reg_write = mlxplat_fpga_reg_write, -+}; -+ - static struct resource mlxplat_mlxcpld_resources[] = { - [0] = DEFINE_RES_IRQ_NAMED(MLXPLAT_CPLD_LPC_SYSIRQ, "mlxreg-hotplug"), - }; -@@ -5927,6 +6093,30 @@ static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi) - return mlxplat_register_platform_device(); - } - -+static int __init mlxplat_dmi_bf3_comex_default_matched(const struct dmi_system_id *dmi) -+{ -+ int i; -+ -+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; -+ mlxplat_mux_hotplug_num = MLXPLAT_CPLD_DEFAULT_MUX_HOTPLUG_VECTOR; -+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_regmap_mux_data); -+ mlxplat_mux_regmap_data = mlxplat_default_regmap_mux_data; -+ mlxplat_hotplug = &mlxplat_mlxcpld_ext_data; -+ mlxplat_hotplug->deferred_nr = -+ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; -+ mlxplat_led = &mlxplat_default_ng_led_data; -+ mlxplat_regs_io = &mlxplat_default_ng_regs_io_data; -+ mlxplat_fan = &mlxplat_default_fan_data; -+ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) -+ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; -+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; -+ mlxplat_regmap_config = &mlxplat_fpga_regmap_config_bf3_comex_default; -+ mlxplat_reboot_nb = &mlxplat_reboot_default_nb; -+ pm_power_off = mlxplat_poweroff; -+ -+ return 1; -+} -+ - static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - { - .callback = mlxplat_dmi_default_wc_matched, -@@ -6015,6 +6205,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"), - }, - }, -+ { -+ .callback = mlxplat_dmi_bf3_comex_default_matched, -+ .matches = { -+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0016"), -+ }, -+ }, - { - .callback = mlxplat_dmi_l1_switch_matched, - .matches = { --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0055-mellanox-Relocate-mlx-platform-driver.patch b/platform/mellanox/non-upstream-patches/patches/0055-mellanox-Relocate-mlx-platform-driver.patch deleted file mode 100644 index 3b5f6b9400fe..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0055-mellanox-Relocate-mlx-platform-driver.patch +++ /dev/null @@ -1,98 +0,0 @@ -From a4eca7c60f361575fb15bcab6fdcd39c795c8244 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 24 Jul 2023 11:52:56 +0000 -Subject: [PATCH backport 6.1.42 58/85] mellanox: Relocate mlx-platform driver - -Move 'mlx-platform' driver 'x86' to 'mellanox' folder. - -Motivation to allow running it on systems with ARM architecture. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - drivers/platform/mellanox/Kconfig | 12 ++++++++++++ - drivers/platform/mellanox/Makefile | 1 + - drivers/platform/{x86 => mellanox}/mlx-platform.c | 0 - drivers/platform/x86/Kconfig | 13 ------------- - drivers/platform/x86/Makefile | 1 - - 5 files changed, 13 insertions(+), 14 deletions(-) - rename drivers/platform/{x86 => mellanox}/mlx-platform.c (100%) - -diff --git a/drivers/platform/mellanox/Kconfig b/drivers/platform/mellanox/Kconfig -index 382793e73a60..70b628834b4f 100644 ---- a/drivers/platform/mellanox/Kconfig -+++ b/drivers/platform/mellanox/Kconfig -@@ -14,6 +14,18 @@ menuconfig MELLANOX_PLATFORM - - if MELLANOX_PLATFORM - -+config MLX_PLATFORM -+ tristate "Mellanox Technologies platform support" -+ depends on I2C && REGMAP -+ help -+ This option enables system support for the Mellanox Technologies -+ platform. The Mellanox systems provide data center networking -+ solutions based on Virtual Protocol Interconnect (VPI) technology -+ enable seamless connectivity to 56/100Gb/s InfiniBand or 10/40/56GbE -+ connection. -+ -+ If you have a Mellanox system, say Y or M here. -+ - config MLXREG_HOTPLUG - tristate "Mellanox platform hotplug driver support" - depends on HWMON -diff --git a/drivers/platform/mellanox/Makefile b/drivers/platform/mellanox/Makefile -index 04703c0416b1..ba56485cbe8c 100644 ---- a/drivers/platform/mellanox/Makefile -+++ b/drivers/platform/mellanox/Makefile -@@ -3,6 +3,7 @@ - # Makefile for linux/drivers/platform/mellanox - # Mellanox Platform-Specific Drivers - # -+obj-$(CONFIG_MLX_PLATFORM) += mlx-platform.o - obj-$(CONFIG_MLXBF_BOOTCTL) += mlxbf-bootctl.o - obj-$(CONFIG_MLXBF_PMC) += mlxbf-pmc.o - obj-$(CONFIG_MLXBF_TMFIFO) += mlxbf-tmfifo.o -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/mellanox/mlx-platform.c -similarity index 100% -rename from drivers/platform/x86/mlx-platform.c -rename to drivers/platform/mellanox/mlx-platform.c -diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig -index 1396a839dd8a..f11136bbf88d 100644 ---- a/drivers/platform/x86/Kconfig -+++ b/drivers/platform/x86/Kconfig -@@ -954,19 +954,6 @@ config SERIAL_MULTI_INSTANTIATE - To compile this driver as a module, choose M here: the module - will be called serial-multi-instantiate. - --config MLX_PLATFORM -- tristate "Mellanox Technologies platform support" -- depends on I2C -- select REGMAP -- help -- This option enables system support for the Mellanox Technologies -- platform. The Mellanox systems provide data center networking -- solutions based on Virtual Protocol Interconnect (VPI) technology -- enable seamless connectivity to 56/100Gb/s InfiniBand or 10/40/56GbE -- connection. -- -- If you have a Mellanox system, say Y or M here. -- - config TOUCHSCREEN_DMI - bool "DMI based touchscreen configuration info" - depends on ACPI && DMI && I2C=y && TOUCHSCREEN_SILEAD -diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile -index 1d3d1b02541b..aee1bc4b0a80 100644 ---- a/drivers/platform/x86/Makefile -+++ b/drivers/platform/x86/Makefile -@@ -109,7 +109,6 @@ obj-$(CONFIG_TOPSTAR_LAPTOP) += topstar-laptop.o - # Platform drivers - obj-$(CONFIG_FW_ATTR_CLASS) += firmware_attributes_class.o - obj-$(CONFIG_SERIAL_MULTI_INSTANTIATE) += serial-multi-instantiate.o --obj-$(CONFIG_MLX_PLATFORM) += mlx-platform.o - obj-$(CONFIG_TOUCHSCREEN_DMI) += touchscreen_dmi.o - obj-$(CONFIG_WIRELESS_HOTKEY) += wireless-hotkey.o - obj-$(CONFIG_X86_ANDROID_TABLETS) += x86-android-tablets.o --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch b/platform/mellanox/non-upstream-patches/patches/0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch deleted file mode 100644 index fafb84df869a..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0066-UBUNTU-SAUCE-sdhci-of-dwcmshc-Enable-host-V4-support.patch +++ /dev/null @@ -1,40 +0,0 @@ -From b7b422bbd95928b213444692d5b00ef081160c0b Mon Sep 17 00:00:00 2001 -From: Liming Sun -Date: Sat, 10 Dec 2022 13:55:54 -0500 -Subject: [PATCH backport 6.1.42 66/85] UBUNTU: SAUCE: sdhci-of-dwcmshc: Enable - host V4 support for BlueField-3 SoC - -BugLink: https://bugs.launchpad.net/bugs/1999309 - -This commit enables SDHCI Host V4 support on Bluefield-3 SoC to be -consistent with UEFI setting. - -Signed-off-by: Liming Sun -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -[bzolnier: use a short URL version for BugLink] -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/mmc/host/sdhci-of-dwcmshc.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c -index a7343d4bc50e..a1188508e75d 100644 ---- a/drivers/mmc/host/sdhci-of-dwcmshc.c -+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c -@@ -528,6 +528,12 @@ static int dwcmshc_probe(struct platform_device *pdev) - goto err_clk; - } - -+#ifdef CONFIG_ACPI -+ if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) { -+ sdhci_enable_v4_mode(host); -+ } -+#endif -+ - host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; - - err = sdhci_setup_host(host); --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch b/platform/mellanox/non-upstream-patches/patches/0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch deleted file mode 100644 index bfd038d7c3ad..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0067-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-add-the-missing-de.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 07163b7fab5b23c01195a456d92e3dc9e73b538c Mon Sep 17 00:00:00 2001 -From: Liming Sun -Date: Fri, 3 Feb 2023 07:52:18 -0500 -Subject: [PATCH backport 6.1.42 67/85] UBUNTU: SAUCE: mmc: sdhci-of-dwcmshc: - add the missing device table IDs for acpi - -BugLink: https://bugs.launchpad.net/bugs/2004645 - -This commit adds the missing MODULE_DEVICE_TABLE for acpi, or else -it won't be loaded automatically when compiled as a kernel module. - -Signed-off-by: Liming Sun -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -[bzolnier: use a short URL version for BugLink] -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/mmc/host/sdhci-of-dwcmshc.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c -index a1188508e75d..7d657d29af21 100644 ---- a/drivers/mmc/host/sdhci-of-dwcmshc.c -+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c -@@ -446,6 +446,7 @@ static const struct acpi_device_id sdhci_dwcmshc_acpi_ids[] = { - }, - {} - }; -+MODULE_DEVICE_TABLE(acpi, sdhci_dwcmshc_acpi_ids); - #endif - - static int dwcmshc_probe(struct platform_device *pdev) --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch b/platform/mellanox/non-upstream-patches/patches/0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch deleted file mode 100644 index 88d54dc706fb..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0068-UBUNTU-SAUCE-mmc-sdhci-of-dwcmshc-Add-runtime-PM-ope.patch +++ /dev/null @@ -1,158 +0,0 @@ -From be8912e006b49c4f9febcd2556030876737e1b72 Mon Sep 17 00:00:00 2001 -From: Liming Sun -Date: Tue, 4 Apr 2023 19:30:00 -0400 -Subject: [PATCH backport 6.1.42 68/85] UBUNTU: SAUCE: mmc: sdhci-of-dwcmshc: - Add runtime PM operations for BlueField-3 - -BugLink: https://bugs.launchpad.net/bugs/2015307 - -This commit implements the runtime PM operations For BlueField-3 SoC -to disable eMMC card clock when idle. - -Reviewed-by: Khalil Blaiech -Signed-off-by: Liming Sun -Acked-by: Bartlomiej Zolnierkiewicz -Acked-by: Andrei Gherzan -[bzolnier: use a short URL version for BugLink] -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/mmc/host/sdhci-of-dwcmshc.c | 102 +++++++++++++++++++++++++++- - 1 file changed, 101 insertions(+), 1 deletion(-) - -diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c -index 7d657d29af21..32fd0668b427 100644 ---- a/drivers/mmc/host/sdhci-of-dwcmshc.c -+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - - #include "sdhci-pltfm.h" - -@@ -91,6 +92,21 @@ struct dwcmshc_priv { - void *priv; /* pointer to SoC private stuff */ - }; - -+/* Last jiffies when entering idle state */ -+static uint64_t idle_last_jiffies; -+ -+/* Total jiffies in idle state */ -+static uint64_t idle_total_jiffies; -+ -+/* Total idle time */ -+static int idle_time; -+module_param(idle_time, int, 0444); -+MODULE_PARM_DESC(idle_time, "idle time (seconds)"); -+ -+/* The current idle state */ -+static int idle_state; -+module_param(idle_state, int, 0444); -+MODULE_PARM_DESC(idle_state, "idle state (0: not idle, 1: idle)"); - /* - * If DMA addr spans 128MB boundary, we split the DMA transfer into two - * so that each DMA transfer doesn't exceed the boundary. -@@ -532,6 +548,7 @@ static int dwcmshc_probe(struct platform_device *pdev) - #ifdef CONFIG_ACPI - if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) { - sdhci_enable_v4_mode(host); -+ pm_runtime_enable(dev); - } - #endif - -@@ -635,7 +652,90 @@ static int dwcmshc_resume(struct device *dev) - } - #endif - --static SIMPLE_DEV_PM_OPS(dwcmshc_pmops, dwcmshc_suspend, dwcmshc_resume); -+#ifdef CONFIG_PM -+ -+#ifdef CONFIG_ACPI -+static void dwcmshc_enable_card_clk(struct sdhci_host *host) -+{ -+ u16 ctrl; -+ -+ ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); -+ ctrl |= SDHCI_CLOCK_CARD_EN; -+ sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); -+} -+ -+static void dwcmshc_disable_card_clk(struct sdhci_host *host) -+{ -+ u16 ctrl; -+ -+ ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); -+ ctrl &= ~SDHCI_CLOCK_CARD_EN; -+ sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); -+} -+#endif -+ -+static int dwcmshc_runtime_suspend(struct device *dev) -+{ -+ struct sdhci_host *host = dev_get_drvdata(dev); -+ const struct sdhci_pltfm_data *pltfm_data; -+ int ret = 0; -+ -+ pltfm_data = device_get_match_data(dev); -+ if (!pltfm_data) -+ return -ENODEV; -+ -+#ifdef CONFIG_ACPI -+ if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) { -+ ret = sdhci_runtime_suspend_host(host); -+ if (!ret) { -+ dwcmshc_disable_card_clk(host); -+ -+ if (!idle_state) { -+ idle_state = 1; -+ idle_last_jiffies = jiffies; -+ } -+ } -+ } -+#endif -+ -+ return ret; -+} -+ -+static int dwcmshc_runtime_resume(struct device *dev) -+{ -+ struct sdhci_host *host = dev_get_drvdata(dev); -+ const struct sdhci_pltfm_data *pltfm_data; -+ int ret = 0; -+ -+ pltfm_data = device_get_match_data(dev); -+ if (!pltfm_data) -+ return -ENODEV; -+ -+#ifdef CONFIG_ACPI -+ if (pltfm_data == &sdhci_dwcmshc_bf3_pdata) { -+ dwcmshc_enable_card_clk(host); -+ -+ if (idle_state) { -+ idle_state = 0; -+ idle_total_jiffies = jiffies - idle_last_jiffies; -+ idle_time += jiffies_to_msecs( -+ idle_total_jiffies) / 1000; -+ } -+ -+ ret = sdhci_runtime_resume_host(host, 0); -+ } -+#endif -+ -+ return ret; -+} -+ -+#endif -+ -+static const struct dev_pm_ops dwcmshc_pmops = { -+ SET_SYSTEM_SLEEP_PM_OPS(dwcmshc_suspend, dwcmshc_resume) -+ SET_RUNTIME_PM_OPS(dwcmshc_runtime_suspend, -+ dwcmshc_runtime_resume, NULL) -+}; - - static struct platform_driver sdhci_dwcmshc_driver = { - .driver = { --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch b/platform/mellanox/non-upstream-patches/patches/0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch deleted file mode 100644 index add9431adac3..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0069-UBUNTU-SAUCE-mlxbf_gige-add-ethtool-mlxbf_gige_set_r.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 8c4980bc00f7be2d1172f047e148ecb07c43d955 Mon Sep 17 00:00:00 2001 -From: David Thompson -Date: Thu, 14 Jul 2022 17:47:18 -0400 -Subject: [PATCH backport 6.1.42 69/85] UBUNTU: SAUCE: mlxbf_gige: add ethtool - mlxbf_gige_set_ringparam - -This patch adds the "set_ringparam" callback, to be used by -ethtool when changing the size of the mlxbf_gige driver rings. - -BugLink: https://launchpad.net/bugs/1981766 - -Change-Id: I0198f6fbf6b8ea13bd34ed152e13298265138c76 -Signed-off-by: David Thompson -Signed-off-by: Asmaa Mnebhi -Signed-off-by: Ike Panhc ---- - .../mellanox/mlxbf_gige/mlxbf_gige_ethtool.c | 40 +++++++++++++++++++ - 1 file changed, 40 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c -index 41ebef25a930..4becb39b5664 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c -@@ -45,6 +45,45 @@ mlxbf_gige_get_ringparam(struct net_device *netdev, - ering->tx_pending = priv->tx_q_entries; - } - -+static int mlxbf_gige_set_ringparam(struct net_device *netdev, -+ struct ethtool_ringparam *ering, -+ struct kernel_ethtool_ringparam *kernel_ring, -+ struct netlink_ext_ack *extack) -+{ -+ const struct net_device_ops *ops = netdev->netdev_ops; -+ struct mlxbf_gige *priv = netdev_priv(netdev); -+ int new_rx_q_entries, new_tx_q_entries; -+ -+ /* Device does not have separate queues for small/large frames */ -+ if (ering->rx_mini_pending || ering->rx_jumbo_pending) -+ return -EINVAL; -+ -+ /* Round up to supported values */ -+ new_rx_q_entries = roundup_pow_of_two(ering->rx_pending); -+ new_tx_q_entries = roundup_pow_of_two(ering->tx_pending); -+ -+ /* Check against min values, core checks against max values */ -+ if (new_tx_q_entries < MLXBF_GIGE_MIN_TXQ_SZ || -+ new_rx_q_entries < MLXBF_GIGE_MIN_RXQ_SZ) -+ return -EINVAL; -+ -+ /* If queue sizes did not change, exit now */ -+ if (new_rx_q_entries == priv->rx_q_entries && -+ new_tx_q_entries == priv->tx_q_entries) -+ return 0; -+ -+ if (netif_running(netdev)) -+ ops->ndo_stop(netdev); -+ -+ priv->rx_q_entries = new_rx_q_entries; -+ priv->tx_q_entries = new_tx_q_entries; -+ -+ if (netif_running(netdev)) -+ ops->ndo_open(netdev); -+ -+ return 0; -+} -+ - static const struct { - const char string[ETH_GSTRING_LEN]; - } mlxbf_gige_ethtool_stats_keys[] = { -@@ -127,6 +166,7 @@ static void mlxbf_gige_get_pauseparam(struct net_device *netdev, - const struct ethtool_ops mlxbf_gige_ethtool_ops = { - .get_link = ethtool_op_get_link, - .get_ringparam = mlxbf_gige_get_ringparam, -+ .set_ringparam = mlxbf_gige_set_ringparam, - .get_regs_len = mlxbf_gige_get_regs_len, - .get_regs = mlxbf_gige_get_regs, - .get_strings = mlxbf_gige_get_strings, --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch b/platform/mellanox/non-upstream-patches/patches/0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch deleted file mode 100644 index 6550158ceb56..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0070-UBUNTU-SAUCE-Fix-OOB-handling-RX-packets-in-heavy-tr.patch +++ /dev/null @@ -1,108 +0,0 @@ -From 8864f5ec2e1c0e1271a202859325900bd6727139 Mon Sep 17 00:00:00 2001 -From: David Thompson -Date: Wed, 20 Jul 2022 17:50:36 -0400 -Subject: [PATCH backport 6.1.42 70/85] UBUNTU: SAUCE: Fix OOB handling RX - packets in heavy traffic - -BugLink: https://bugs.launchpad.net/bugs/1982424 - -This is reproducible on systems which already have heavy background -traffic. On top of that, the user issues one of the 2 docker pulls below: -docker pull nvcr.io/ea-doca-hbn/hbn/hbn:latest -OR -docker pull gitlab-master.nvidia.com:5005/dl/dgx/tritonserver:22.02-py3-qa - -The second one is a very large container (17GB) - -When they run docker pull, the OOB interface stops being pingable, -the docker pull is interrupted for a very long time (>3mn) or -times out. - -The main reason for the above is because RX PI = RX CI. I have verified that -by reading RX_CQE_PACKET_CI and RX_WQE_PI. This means the WQEs are full and -HW has nowhere else to put the RX packets. - -I believe there is a race condition after SW receives a RX interrupt, -and the interrupt is disabled. I believe HW still tries to add RX -packets to the RX WQEs. So we need to stop the RX traffic by disabling -the DMA. Also, move reading the RX CI before writing the increased value -of RX PI to MLXBF_GIGE_RX_WQE_PI. Normally RX PI should always be > RX CI. -I suspect that when entering mlxbf_gige_rx_packet, for example we have: -MLXBF_GIGE_RX_WQE_PI = 128 -RX_CQE_PACKET_CI = 128 -(128 being the max size of the WQE) - -Then this code will make MLXBF_GIGE_RX_WQE_PI = 129: -rx_pi++; -/* Ensure completion of all writes before notifying HW of replenish */ -wmb(); -writeq(rx_pi, priv->base + MLXBF_GIGE_RX_WQE_PI); - -which means HW has one more slot to populate and in that time span, the HW -populates that WQE and increases the RX_CQE_PACKET_CI = 129. - -Then this code is subject to a race condition: - -rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI); -rx_ci_rem = rx_ci % priv->rx_q_entries; -return rx_pi_rem != rx_ci_rem; - -because rx_pi_rem will be equal to rx_ci_rem. -so remaining_pkts will be 0 and we will exit mlxbf_gige_poll - -Change-Id: I25a816b9182471643db95b05c803b9f6349bcc87 -Signed-off-by: David Thompson -Signed-off-by: Asmaa Mnebhi -Signed-off-by: Ike Panhc ---- - .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c | 13 +++++++++++-- - 1 file changed, 11 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c -index 0d5a41a2ae01..dc05ab5b042a 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c -@@ -267,6 +267,9 @@ static bool mlxbf_gige_rx_packet(struct mlxbf_gige *priv, int *rx_pkts) - priv->stats.rx_truncate_errors++; - } - -+ rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI); -+ rx_ci_rem = rx_ci % priv->rx_q_entries; -+ - /* Let hardware know we've replenished one buffer */ - rx_pi++; - -@@ -279,8 +282,6 @@ static bool mlxbf_gige_rx_packet(struct mlxbf_gige *priv, int *rx_pkts) - rx_pi_rem = rx_pi % priv->rx_q_entries; - if (rx_pi_rem == 0) - priv->valid_polarity ^= 1; -- rx_ci = readq(priv->base + MLXBF_GIGE_RX_CQE_PACKET_CI); -- rx_ci_rem = rx_ci % priv->rx_q_entries; - - if (skb) - netif_receive_skb(skb); -@@ -300,6 +301,10 @@ int mlxbf_gige_poll(struct napi_struct *napi, int budget) - - mlxbf_gige_handle_tx_complete(priv); - -+ data = readq(priv->base + MLXBF_GIGE_RX_DMA); -+ data &= ~MLXBF_GIGE_RX_DMA_EN; -+ writeq(data, priv->base + MLXBF_GIGE_RX_DMA); -+ - do { - remaining_pkts = mlxbf_gige_rx_packet(priv, &work_done); - } while (remaining_pkts && work_done < budget); -@@ -315,6 +320,10 @@ int mlxbf_gige_poll(struct napi_struct *napi, int budget) - data = readq(priv->base + MLXBF_GIGE_INT_MASK); - data &= ~MLXBF_GIGE_INT_MASK_RX_RECEIVE_PACKET; - writeq(data, priv->base + MLXBF_GIGE_INT_MASK); -+ -+ data = readq(priv->base + MLXBF_GIGE_RX_DMA); -+ data |= MLXBF_GIGE_RX_DMA_EN; -+ writeq(data, priv->base + MLXBF_GIGE_RX_DMA); - } - - return work_done; --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch b/platform/mellanox/non-upstream-patches/patches/0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch deleted file mode 100644 index f8e11a70453a..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0071-UBUNTU-SAUCE-mlxbf-gige-Fix-intermittent-no-ip-issue.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 7a9c30f4e3f19eb533acce3d3c63de87d18bac1d Mon Sep 17 00:00:00 2001 -From: Asmaa Mnebhi -Date: Tue, 28 Feb 2023 18:03:12 -0500 -Subject: [PATCH backport 6.1.42 71/85] UBUNTU: SAUCE: mlxbf-gige: Fix - intermittent no ip issue - -BugLink: https://bugs.launchpad.net/bugs/2008833 - -During the reboot test, the OOB might not get an ip assigned. -This is due to a race condition between phy_startcall and the -RX DMA being enabled and depends on the amount of background -traffic received by the OOB. Enable the RX DMA after teh phy -is started. - -Signed-off-by: Asmaa Mnebhi -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c | 14 +++++++------- - .../ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c | 6 +++--- - 2 files changed, 10 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -index 2292d63a279c..eafc0d3313fd 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -@@ -147,14 +147,14 @@ static int mlxbf_gige_open(struct net_device *netdev) - */ - priv->valid_polarity = 0; - -- err = mlxbf_gige_rx_init(priv); -+ phy_start(phydev); -+ -+ err = mlxbf_gige_tx_init(priv); - if (err) - goto free_irqs; -- err = mlxbf_gige_tx_init(priv); -+ err = mlxbf_gige_rx_init(priv); - if (err) -- goto rx_deinit; -- -- phy_start(phydev); -+ goto tx_deinit; - - netif_napi_add(netdev, &priv->napi, mlxbf_gige_poll); - napi_enable(&priv->napi); -@@ -176,8 +176,8 @@ static int mlxbf_gige_open(struct net_device *netdev) - - return 0; - --rx_deinit: -- mlxbf_gige_rx_deinit(priv); -+tx_deinit: -+ mlxbf_gige_tx_deinit(priv); - - free_irqs: - mlxbf_gige_free_irqs(priv); -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c -index dc05ab5b042a..b9cf0a3c8b0f 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c -@@ -142,6 +142,9 @@ int mlxbf_gige_rx_init(struct mlxbf_gige *priv) - writeq(MLXBF_GIGE_RX_MAC_FILTER_COUNT_PASS_EN, - priv->base + MLXBF_GIGE_RX_MAC_FILTER_COUNT_PASS); - -+ writeq(ilog2(priv->rx_q_entries), -+ priv->base + MLXBF_GIGE_RX_WQE_SIZE_LOG2); -+ - /* Clear MLXBF_GIGE_INT_MASK 'receive pkt' bit to - * indicate readiness to receive interrupts - */ -@@ -154,9 +157,6 @@ int mlxbf_gige_rx_init(struct mlxbf_gige *priv) - data |= MLXBF_GIGE_RX_DMA_EN; - writeq(data, priv->base + MLXBF_GIGE_RX_DMA); - -- writeq(ilog2(priv->rx_q_entries), -- priv->base + MLXBF_GIGE_RX_WQE_SIZE_LOG2); -- - return 0; - - free_wqe_and_skb: --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch b/platform/mellanox/non-upstream-patches/patches/0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch deleted file mode 100644 index 9dc9c986208b..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0072-mlxbf_gige-add-MDIO-support-for-BlueField-3.patch +++ /dev/null @@ -1,496 +0,0 @@ -From 0d3a669288079d5a197b95d1a4615301e61fb039 Mon Sep 17 00:00:00 2001 -From: David Thompson -Date: Thu, 12 Jan 2023 15:26:06 -0500 -Subject: [PATCH backport 6.1.42 72/85] mlxbf_gige: add MDIO support for - BlueField-3 - -BugLink: https://bugs.launchpad.net/bugs/2012649 - -This patch adds initial MDIO support for the BlueField-3 -SoC. Separate header files for the BlueField-2 and the -BlueField-3 SoCs have been created. These header files -hold the SoC-specific MDIO macros since the register -offsets and bit fields have changed. Also, in BlueField-3 -there is a separate register for writing and reading the -MDIO data. Finally, instead of having "if" statements -everywhere to differentiate between SoC-specific logic, -a mlxbf_gige_mdio_gw_t struct was created for this purpose. - -Signed-off-by: David Thompson -Signed-off-by: Asmaa Mnebhi -Signed-off-by: Jakub Kicinski -(cherry picked from commit 2321d69f92aa7e6aa2cc98e7a8e005566943922f) -Signed-off-by: David Thompson -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - .../ethernet/mellanox/mlxbf_gige/mlxbf_gige.h | 19 ++ - .../mellanox/mlxbf_gige/mlxbf_gige_main.c | 2 + - .../mellanox/mlxbf_gige/mlxbf_gige_mdio.c | 178 +++++++++++++----- - .../mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h | 53 ++++++ - .../mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h | 54 ++++++ - .../mellanox/mlxbf_gige/mlxbf_gige_regs.h | 1 + - 6 files changed, 256 insertions(+), 51 deletions(-) - create mode 100644 drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h - create mode 100644 drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h - -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h -index 5a1027b07215..421a0b1b766c 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h -@@ -67,6 +67,23 @@ struct mlxbf_gige_stats { - u64 rx_filter_discard_pkts; - }; - -+struct mlxbf_gige_reg_param { -+ u32 mask; -+ u32 shift; -+}; -+ -+struct mlxbf_gige_mdio_gw { -+ u32 gw_address; -+ u32 read_data_address; -+ struct mlxbf_gige_reg_param busy; -+ struct mlxbf_gige_reg_param write_data; -+ struct mlxbf_gige_reg_param read_data; -+ struct mlxbf_gige_reg_param devad; -+ struct mlxbf_gige_reg_param partad; -+ struct mlxbf_gige_reg_param opcode; -+ struct mlxbf_gige_reg_param st1; -+}; -+ - struct mlxbf_gige { - void __iomem *base; - void __iomem *llu_base; -@@ -102,6 +119,8 @@ struct mlxbf_gige { - u8 valid_polarity; - struct napi_struct napi; - struct mlxbf_gige_stats stats; -+ u8 hw_version; -+ struct mlxbf_gige_mdio_gw *mdio_gw; - }; - - /* Rx Work Queue Element definitions */ -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -index eafc0d3313fd..a3bd14d5dbff 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -@@ -315,6 +315,8 @@ static int mlxbf_gige_probe(struct platform_device *pdev) - - spin_lock_init(&priv->lock); - -+ priv->hw_version = readq(base + MLXBF_GIGE_VERSION); -+ - /* Attach MDIO device */ - err = mlxbf_gige_mdio_probe(pdev, priv); - if (err) -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c -index aa780b1614a3..4ee3df30c402 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c -@@ -23,9 +23,75 @@ - - #include "mlxbf_gige.h" - #include "mlxbf_gige_regs.h" -+#include "mlxbf_gige_mdio_bf2.h" -+#include "mlxbf_gige_mdio_bf3.h" - --#define MLXBF_GIGE_MDIO_GW_OFFSET 0x0 --#define MLXBF_GIGE_MDIO_CFG_OFFSET 0x4 -+static struct mlxbf_gige_mdio_gw mlxbf_gige_mdio_gw_t[] = { -+ [MLXBF_GIGE_VERSION_BF2] = { -+ .gw_address = MLXBF2_GIGE_MDIO_GW_OFFSET, -+ .read_data_address = MLXBF2_GIGE_MDIO_GW_OFFSET, -+ .busy = { -+ .mask = MLXBF2_GIGE_MDIO_GW_BUSY_MASK, -+ .shift = MLXBF2_GIGE_MDIO_GW_BUSY_SHIFT, -+ }, -+ .read_data = { -+ .mask = MLXBF2_GIGE_MDIO_GW_AD_MASK, -+ .shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT, -+ }, -+ .write_data = { -+ .mask = MLXBF2_GIGE_MDIO_GW_AD_MASK, -+ .shift = MLXBF2_GIGE_MDIO_GW_AD_SHIFT, -+ }, -+ .devad = { -+ .mask = MLXBF2_GIGE_MDIO_GW_DEVAD_MASK, -+ .shift = MLXBF2_GIGE_MDIO_GW_DEVAD_SHIFT, -+ }, -+ .partad = { -+ .mask = MLXBF2_GIGE_MDIO_GW_PARTAD_MASK, -+ .shift = MLXBF2_GIGE_MDIO_GW_PARTAD_SHIFT, -+ }, -+ .opcode = { -+ .mask = MLXBF2_GIGE_MDIO_GW_OPCODE_MASK, -+ .shift = MLXBF2_GIGE_MDIO_GW_OPCODE_SHIFT, -+ }, -+ .st1 = { -+ .mask = MLXBF2_GIGE_MDIO_GW_ST1_MASK, -+ .shift = MLXBF2_GIGE_MDIO_GW_ST1_SHIFT, -+ }, -+ }, -+ [MLXBF_GIGE_VERSION_BF3] = { -+ .gw_address = MLXBF3_GIGE_MDIO_GW_OFFSET, -+ .read_data_address = MLXBF3_GIGE_MDIO_DATA_READ, -+ .busy = { -+ .mask = MLXBF3_GIGE_MDIO_GW_BUSY_MASK, -+ .shift = MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT, -+ }, -+ .read_data = { -+ .mask = MLXBF3_GIGE_MDIO_GW_DATA_READ_MASK, -+ .shift = MLXBF3_GIGE_MDIO_GW_DATA_READ_SHIFT, -+ }, -+ .write_data = { -+ .mask = MLXBF3_GIGE_MDIO_GW_DATA_MASK, -+ .shift = MLXBF3_GIGE_MDIO_GW_DATA_SHIFT, -+ }, -+ .devad = { -+ .mask = MLXBF3_GIGE_MDIO_GW_DEVAD_MASK, -+ .shift = MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT, -+ }, -+ .partad = { -+ .mask = MLXBF3_GIGE_MDIO_GW_PARTAD_MASK, -+ .shift = MLXBF3_GIGE_MDIO_GW_PARTAD_SHIFT, -+ }, -+ .opcode = { -+ .mask = MLXBF3_GIGE_MDIO_GW_OPCODE_MASK, -+ .shift = MLXBF3_GIGE_MDIO_GW_OPCODE_SHIFT, -+ }, -+ .st1 = { -+ .mask = MLXBF3_GIGE_MDIO_GW_ST1_MASK, -+ .shift = MLXBF3_GIGE_MDIO_GW_ST1_SHIFT, -+ }, -+ }, -+}; - - #define MLXBF_GIGE_MDIO_FREQ_REFERENCE 156250000ULL - #define MLXBF_GIGE_MDIO_COREPLL_CONST 16384ULL -@@ -47,30 +113,10 @@ - /* Busy bit is set by software and cleared by hardware */ - #define MLXBF_GIGE_MDIO_SET_BUSY 0x1 - --/* MDIO GW register bits */ --#define MLXBF_GIGE_MDIO_GW_AD_MASK GENMASK(15, 0) --#define MLXBF_GIGE_MDIO_GW_DEVAD_MASK GENMASK(20, 16) --#define MLXBF_GIGE_MDIO_GW_PARTAD_MASK GENMASK(25, 21) --#define MLXBF_GIGE_MDIO_GW_OPCODE_MASK GENMASK(27, 26) --#define MLXBF_GIGE_MDIO_GW_ST1_MASK GENMASK(28, 28) --#define MLXBF_GIGE_MDIO_GW_BUSY_MASK GENMASK(30, 30) -- --/* MDIO config register bits */ --#define MLXBF_GIGE_MDIO_CFG_MDIO_MODE_MASK GENMASK(1, 0) --#define MLXBF_GIGE_MDIO_CFG_MDIO3_3_MASK GENMASK(2, 2) --#define MLXBF_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK GENMASK(4, 4) --#define MLXBF_GIGE_MDIO_CFG_MDC_PERIOD_MASK GENMASK(15, 8) --#define MLXBF_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK GENMASK(23, 16) --#define MLXBF_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK GENMASK(31, 24) -- --#define MLXBF_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \ -- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \ -- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \ -- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \ -- FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13)) -- - #define MLXBF_GIGE_BF2_COREPLL_ADDR 0x02800c30 - #define MLXBF_GIGE_BF2_COREPLL_SIZE 0x0000000c -+#define MLXBF_GIGE_BF3_COREPLL_ADDR 0x13409824 -+#define MLXBF_GIGE_BF3_COREPLL_SIZE 0x00000010 - - static struct resource corepll_params[] = { - [MLXBF_GIGE_VERSION_BF2] = { -@@ -78,6 +124,11 @@ static struct resource corepll_params[] = { - .end = MLXBF_GIGE_BF2_COREPLL_ADDR + MLXBF_GIGE_BF2_COREPLL_SIZE - 1, - .name = "COREPLL_RES" - }, -+ [MLXBF_GIGE_VERSION_BF3] = { -+ .start = MLXBF_GIGE_BF3_COREPLL_ADDR, -+ .end = MLXBF_GIGE_BF3_COREPLL_ADDR + MLXBF_GIGE_BF3_COREPLL_SIZE - 1, -+ .name = "COREPLL_RES" -+ } - }; - - /* Returns core clock i1clk in Hz */ -@@ -134,19 +185,23 @@ static u8 mdio_period_map(struct mlxbf_gige *priv) - return mdio_period; - } - --static u32 mlxbf_gige_mdio_create_cmd(u16 data, int phy_add, -+static u32 mlxbf_gige_mdio_create_cmd(struct mlxbf_gige_mdio_gw *mdio_gw, u16 data, int phy_add, - int phy_reg, u32 opcode) - { - u32 gw_reg = 0; - -- gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_AD_MASK, data); -- gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_DEVAD_MASK, phy_reg); -- gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_PARTAD_MASK, phy_add); -- gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_OPCODE_MASK, opcode); -- gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_ST1_MASK, -- MLXBF_GIGE_MDIO_CL22_ST1); -- gw_reg |= FIELD_PREP(MLXBF_GIGE_MDIO_GW_BUSY_MASK, -- MLXBF_GIGE_MDIO_SET_BUSY); -+ gw_reg |= ((data << mdio_gw->write_data.shift) & -+ mdio_gw->write_data.mask); -+ gw_reg |= ((phy_reg << mdio_gw->devad.shift) & -+ mdio_gw->devad.mask); -+ gw_reg |= ((phy_add << mdio_gw->partad.shift) & -+ mdio_gw->partad.mask); -+ gw_reg |= ((opcode << mdio_gw->opcode.shift) & -+ mdio_gw->opcode.mask); -+ gw_reg |= ((MLXBF_GIGE_MDIO_CL22_ST1 << mdio_gw->st1.shift) & -+ mdio_gw->st1.mask); -+ gw_reg |= ((MLXBF_GIGE_MDIO_SET_BUSY << mdio_gw->busy.shift) & -+ mdio_gw->busy.mask); - - return gw_reg; - } -@@ -162,25 +217,26 @@ static int mlxbf_gige_mdio_read(struct mii_bus *bus, int phy_add, int phy_reg) - return -EOPNOTSUPP; - - /* Send mdio read request */ -- cmd = mlxbf_gige_mdio_create_cmd(0, phy_add, phy_reg, MLXBF_GIGE_MDIO_CL22_READ); -+ cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, 0, phy_add, phy_reg, -+ MLXBF_GIGE_MDIO_CL22_READ); - -- writel(cmd, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET); -+ writel(cmd, priv->mdio_io + priv->mdio_gw->gw_address); - -- ret = readl_poll_timeout_atomic(priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET, -- val, !(val & MLXBF_GIGE_MDIO_GW_BUSY_MASK), -+ ret = readl_poll_timeout_atomic(priv->mdio_io + priv->mdio_gw->gw_address, -+ val, !(val & priv->mdio_gw->busy.mask), - 5, 1000000); - - if (ret) { -- writel(0, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET); -+ writel(0, priv->mdio_io + priv->mdio_gw->gw_address); - return ret; - } - -- ret = readl(priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET); -+ ret = readl(priv->mdio_io + priv->mdio_gw->read_data_address); - /* Only return ad bits of the gw register */ -- ret &= MLXBF_GIGE_MDIO_GW_AD_MASK; -+ ret &= priv->mdio_gw->read_data.mask; - - /* The MDIO lock is set on read. To release it, clear gw register */ -- writel(0, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET); -+ writel(0, priv->mdio_io + priv->mdio_gw->gw_address); - - return ret; - } -@@ -197,17 +253,17 @@ static int mlxbf_gige_mdio_write(struct mii_bus *bus, int phy_add, - return -EOPNOTSUPP; - - /* Send mdio write request */ -- cmd = mlxbf_gige_mdio_create_cmd(val, phy_add, phy_reg, -+ cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, val, phy_add, phy_reg, - MLXBF_GIGE_MDIO_CL22_WRITE); -- writel(cmd, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET); -+ writel(cmd, priv->mdio_io + priv->mdio_gw->gw_address); - - /* If the poll timed out, drop the request */ -- ret = readl_poll_timeout_atomic(priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET, -- temp, !(temp & MLXBF_GIGE_MDIO_GW_BUSY_MASK), -+ ret = readl_poll_timeout_atomic(priv->mdio_io + priv->mdio_gw->gw_address, -+ temp, !(temp & priv->mdio_gw->busy.mask), - 5, 1000000); - - /* The MDIO lock is set on read. To release it, clear gw register */ -- writel(0, priv->mdio_io + MLXBF_GIGE_MDIO_GW_OFFSET); -+ writel(0, priv->mdio_io + priv->mdio_gw->gw_address); - - return ret; - } -@@ -219,9 +275,20 @@ static void mlxbf_gige_mdio_cfg(struct mlxbf_gige *priv) - - mdio_period = mdio_period_map(priv); - -- val = MLXBF_GIGE_MDIO_CFG_VAL; -- val |= FIELD_PREP(MLXBF_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period); -- writel(val, priv->mdio_io + MLXBF_GIGE_MDIO_CFG_OFFSET); -+ if (priv->hw_version == MLXBF_GIGE_VERSION_BF2) { -+ val = MLXBF2_GIGE_MDIO_CFG_VAL; -+ val |= FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period); -+ writel(val, priv->mdio_io + MLXBF2_GIGE_MDIO_CFG_OFFSET); -+ } else { -+ val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | -+ FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1); -+ writel(val, priv->mdio_io + MLXBF3_GIGE_MDIO_CFG_REG0); -+ val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDC_PERIOD_MASK, mdio_period); -+ writel(val, priv->mdio_io + MLXBF3_GIGE_MDIO_CFG_REG1); -+ val = FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | -+ FIELD_PREP(MLXBF3_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13); -+ writel(val, priv->mdio_io + MLXBF3_GIGE_MDIO_CFG_REG2); -+ } - } - - int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv) -@@ -230,7 +297,14 @@ int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv) - struct resource *res; - int ret; - -- priv->mdio_io = devm_platform_ioremap_resource(pdev, MLXBF_GIGE_RES_MDIO9); -+ if (priv->hw_version > MLXBF_GIGE_VERSION_BF3) -+ return -ENODEV; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, MLXBF_GIGE_RES_MDIO9); -+ if (!res) -+ return -ENODEV; -+ -+ priv->mdio_io = devm_ioremap_resource(dev, res); - if (IS_ERR(priv->mdio_io)) - return PTR_ERR(priv->mdio_io); - -@@ -242,13 +316,15 @@ int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv) - /* For backward compatibility with older ACPI tables, also keep - * CLK resource internal to the driver. - */ -- res = &corepll_params[MLXBF_GIGE_VERSION_BF2]; -+ res = &corepll_params[priv->hw_version]; - } - - priv->clk_io = devm_ioremap(dev, res->start, resource_size(res)); - if (!priv->clk_io) - return -ENOMEM; - -+ priv->mdio_gw = &mlxbf_gige_mdio_gw_t[priv->hw_version]; -+ - mlxbf_gige_mdio_cfg(priv); - - priv->mdiobus = devm_mdiobus_alloc(dev); -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h -new file mode 100644 -index 000000000000..7f1ff0ac7699 ---- /dev/null -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h -@@ -0,0 +1,53 @@ -+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ -+ -+/* MDIO support for Mellanox Gigabit Ethernet driver -+ * -+ * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES, ALL RIGHTS RESERVED. -+ * -+ * This software product is a proprietary product of NVIDIA CORPORATION & -+ * AFFILIATES (the "Company") and all right, title, and interest in and to the -+ * software product, including all associated intellectual property rights, are -+ * and shall remain exclusively with the Company. -+ * -+ * This software product is governed by the End User License Agreement -+ * provided with the software product. -+ */ -+ -+#ifndef __MLXBF_GIGE_MDIO_BF2_H__ -+#define __MLXBF_GIGE_MDIO_BF2_H__ -+ -+#include -+ -+#define MLXBF2_GIGE_MDIO_GW_OFFSET 0x0 -+#define MLXBF2_GIGE_MDIO_CFG_OFFSET 0x4 -+ -+/* MDIO GW register bits */ -+#define MLXBF2_GIGE_MDIO_GW_AD_MASK GENMASK(15, 0) -+#define MLXBF2_GIGE_MDIO_GW_DEVAD_MASK GENMASK(20, 16) -+#define MLXBF2_GIGE_MDIO_GW_PARTAD_MASK GENMASK(25, 21) -+#define MLXBF2_GIGE_MDIO_GW_OPCODE_MASK GENMASK(27, 26) -+#define MLXBF2_GIGE_MDIO_GW_ST1_MASK GENMASK(28, 28) -+#define MLXBF2_GIGE_MDIO_GW_BUSY_MASK GENMASK(30, 30) -+ -+#define MLXBF2_GIGE_MDIO_GW_AD_SHIFT 0 -+#define MLXBF2_GIGE_MDIO_GW_DEVAD_SHIFT 16 -+#define MLXBF2_GIGE_MDIO_GW_PARTAD_SHIFT 21 -+#define MLXBF2_GIGE_MDIO_GW_OPCODE_SHIFT 26 -+#define MLXBF2_GIGE_MDIO_GW_ST1_SHIFT 28 -+#define MLXBF2_GIGE_MDIO_GW_BUSY_SHIFT 30 -+ -+/* MDIO config register bits */ -+#define MLXBF2_GIGE_MDIO_CFG_MDIO_MODE_MASK GENMASK(1, 0) -+#define MLXBF2_GIGE_MDIO_CFG_MDIO3_3_MASK GENMASK(2, 2) -+#define MLXBF2_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK GENMASK(4, 4) -+#define MLXBF2_GIGE_MDIO_CFG_MDC_PERIOD_MASK GENMASK(15, 8) -+#define MLXBF2_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK GENMASK(23, 16) -+#define MLXBF2_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK GENMASK(31, 24) -+ -+#define MLXBF2_GIGE_MDIO_CFG_VAL (FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_MODE_MASK, 1) | \ -+ FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO3_3_MASK, 1) | \ -+ FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK, 1) | \ -+ FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK, 6) | \ -+ FIELD_PREP(MLXBF2_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK, 13)) -+ -+#endif /* __MLXBF_GIGE_MDIO_BF2_H__ */ -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h -new file mode 100644 -index 000000000000..9dd9144b9173 ---- /dev/null -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h -@@ -0,0 +1,54 @@ -+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ -+ -+/* MDIO support for Mellanox Gigabit Ethernet driver -+ * -+ * Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES, ALL RIGHTS RESERVED. -+ * -+ * This software product is a proprietary product of NVIDIA CORPORATION & -+ * AFFILIATES (the "Company") and all right, title, and interest in and to the -+ * software product, including all associated intellectual property rights, are -+ * and shall remain exclusively with the Company. -+ * -+ * This software product is governed by the End User License Agreement -+ * provided with the software product. -+ */ -+ -+#ifndef __MLXBF_GIGE_MDIO_BF3_H__ -+#define __MLXBF_GIGE_MDIO_BF3_H__ -+ -+#include -+ -+#define MLXBF3_GIGE_MDIO_GW_OFFSET 0x80 -+#define MLXBF3_GIGE_MDIO_DATA_READ 0x8c -+#define MLXBF3_GIGE_MDIO_CFG_REG0 0x100 -+#define MLXBF3_GIGE_MDIO_CFG_REG1 0x104 -+#define MLXBF3_GIGE_MDIO_CFG_REG2 0x108 -+ -+/* MDIO GW register bits */ -+#define MLXBF3_GIGE_MDIO_GW_ST1_MASK GENMASK(1, 1) -+#define MLXBF3_GIGE_MDIO_GW_OPCODE_MASK GENMASK(3, 2) -+#define MLXBF3_GIGE_MDIO_GW_PARTAD_MASK GENMASK(8, 4) -+#define MLXBF3_GIGE_MDIO_GW_DEVAD_MASK GENMASK(13, 9) -+/* For BlueField-3, this field is only used for mdio write */ -+#define MLXBF3_GIGE_MDIO_GW_DATA_MASK GENMASK(29, 14) -+#define MLXBF3_GIGE_MDIO_GW_BUSY_MASK GENMASK(30, 30) -+ -+#define MLXBF3_GIGE_MDIO_GW_DATA_READ_MASK GENMASK(15, 0) -+ -+#define MLXBF3_GIGE_MDIO_GW_ST1_SHIFT 1 -+#define MLXBF3_GIGE_MDIO_GW_OPCODE_SHIFT 2 -+#define MLXBF3_GIGE_MDIO_GW_PARTAD_SHIFT 4 -+#define MLXBF3_GIGE_MDIO_GW_DEVAD_SHIFT 9 -+#define MLXBF3_GIGE_MDIO_GW_DATA_SHIFT 14 -+#define MLXBF3_GIGE_MDIO_GW_BUSY_SHIFT 30 -+ -+#define MLXBF3_GIGE_MDIO_GW_DATA_READ_SHIFT 0 -+ -+/* MDIO config register bits */ -+#define MLXBF3_GIGE_MDIO_CFG_MDIO_MODE_MASK GENMASK(1, 0) -+#define MLXBF3_GIGE_MDIO_CFG_MDIO_FULL_DRIVE_MASK GENMASK(2, 2) -+#define MLXBF3_GIGE_MDIO_CFG_MDC_PERIOD_MASK GENMASK(7, 0) -+#define MLXBF3_GIGE_MDIO_CFG_MDIO_IN_SAMP_MASK GENMASK(7, 0) -+#define MLXBF3_GIGE_MDIO_CFG_MDIO_OUT_SAMP_MASK GENMASK(15, 8) -+ -+#endif /* __MLXBF_GIGE_MDIO_BF3_H__ */ -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h -index 7be3a793984d..8d52dbef4adf 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h -@@ -10,6 +10,7 @@ - - #define MLXBF_GIGE_VERSION 0x0000 - #define MLXBF_GIGE_VERSION_BF2 0x0 -+#define MLXBF_GIGE_VERSION_BF3 0x1 - #define MLXBF_GIGE_STATUS 0x0010 - #define MLXBF_GIGE_STATUS_READY BIT(0) - #define MLXBF_GIGE_INT_STATUS 0x0028 --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch b/platform/mellanox/non-upstream-patches/patches/0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch deleted file mode 100644 index de0aab88310a..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0073-mlxbf_gige-support-10M-100M-1G-speeds-on-BlueField-3.patch +++ /dev/null @@ -1,240 +0,0 @@ -From 4c1187581e9c7dc8cf354278c3257d8542209269 Mon Sep 17 00:00:00 2001 -From: David Thompson -Date: Thu, 12 Jan 2023 15:26:07 -0500 -Subject: [PATCH backport 6.1.42 73/85] mlxbf_gige: support 10M/100M/1G speeds - on BlueField-3 - -BugLink: https://bugs.launchpad.net/bugs/2012649 - -The BlueField-3 OOB interface supports 10Mbps, 100Mbps, and 1Gbps speeds. -The external PHY is responsible for autonegotiating the speed with the -link partner. Once the autonegotiation is done, the BlueField PLU needs -to be configured accordingly. - -This patch does two things: -1) Initialize the advertised control flow/duplex/speed in the probe - based on the BlueField SoC generation (2 or 3) -2) Adjust the PLU speed config in the PHY interrupt handler - -Signed-off-by: David Thompson -Signed-off-by: Asmaa Mnebhi -Reviewed-by: Andrew Lunn -Signed-off-by: Jakub Kicinski -(cherry picked from commit 20d03d4d9437771a9b6d38d4a6027a70d78d9865) -Signed-off-by: David Thompson -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - .../ethernet/mellanox/mlxbf_gige/mlxbf_gige.h | 8 ++ - .../mellanox/mlxbf_gige/mlxbf_gige_main.c | 105 +++++++++++++++--- - .../mellanox/mlxbf_gige/mlxbf_gige_regs.h | 21 ++++ - 3 files changed, 119 insertions(+), 15 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h -index 421a0b1b766c..a453b9cd9033 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - - /* The silicon design supports a maximum RX ring size of - * 32K entries. Based on current testing this maximum size -@@ -84,6 +85,12 @@ struct mlxbf_gige_mdio_gw { - struct mlxbf_gige_reg_param st1; - }; - -+struct mlxbf_gige_link_cfg { -+ void (*set_phy_link_mode)(struct phy_device *phydev); -+ void (*adjust_link)(struct net_device *netdev); -+ phy_interface_t phy_mode; -+}; -+ - struct mlxbf_gige { - void __iomem *base; - void __iomem *llu_base; -@@ -121,6 +128,7 @@ struct mlxbf_gige { - struct mlxbf_gige_stats stats; - u8 hw_version; - struct mlxbf_gige_mdio_gw *mdio_gw; -+ int prev_speed; - }; - - /* Rx Work Queue Element definitions */ -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -index a3bd14d5dbff..0af086703bcd 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -@@ -263,13 +263,99 @@ static const struct net_device_ops mlxbf_gige_netdev_ops = { - .ndo_get_stats64 = mlxbf_gige_get_stats64, - }; - --static void mlxbf_gige_adjust_link(struct net_device *netdev) -+static void mlxbf_gige_bf2_adjust_link(struct net_device *netdev) - { - struct phy_device *phydev = netdev->phydev; - - phy_print_status(phydev); - } - -+static void mlxbf_gige_bf3_adjust_link(struct net_device *netdev) -+{ -+ struct mlxbf_gige *priv = netdev_priv(netdev); -+ struct phy_device *phydev = netdev->phydev; -+ u8 sgmii_mode; -+ u16 ipg_size; -+ u32 val; -+ -+ if (phydev->link && phydev->speed != priv->prev_speed) { -+ switch (phydev->speed) { -+ case 1000: -+ ipg_size = MLXBF_GIGE_1G_IPG_SIZE; -+ sgmii_mode = MLXBF_GIGE_1G_SGMII_MODE; -+ break; -+ case 100: -+ ipg_size = MLXBF_GIGE_100M_IPG_SIZE; -+ sgmii_mode = MLXBF_GIGE_100M_SGMII_MODE; -+ break; -+ case 10: -+ ipg_size = MLXBF_GIGE_10M_IPG_SIZE; -+ sgmii_mode = MLXBF_GIGE_10M_SGMII_MODE; -+ break; -+ default: -+ return; -+ } -+ -+ val = readl(priv->plu_base + MLXBF_GIGE_PLU_TX_REG0); -+ val &= ~(MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK | MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK); -+ val |= FIELD_PREP(MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK, ipg_size); -+ val |= FIELD_PREP(MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK, sgmii_mode); -+ writel(val, priv->plu_base + MLXBF_GIGE_PLU_TX_REG0); -+ -+ val = readl(priv->plu_base + MLXBF_GIGE_PLU_RX_REG0); -+ val &= ~MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK; -+ val |= FIELD_PREP(MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK, sgmii_mode); -+ writel(val, priv->plu_base + MLXBF_GIGE_PLU_RX_REG0); -+ -+ priv->prev_speed = phydev->speed; -+ } -+ -+ phy_print_status(phydev); -+} -+ -+static void mlxbf_gige_bf2_set_phy_link_mode(struct phy_device *phydev) -+{ -+ /* MAC only supports 1000T full duplex mode */ -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Full_BIT); -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT); -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT); -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT); -+ -+ /* Only symmetric pause with flow control enabled is supported so no -+ * need to negotiate pause. -+ */ -+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->advertising); -+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->advertising); -+} -+ -+static void mlxbf_gige_bf3_set_phy_link_mode(struct phy_device *phydev) -+{ -+ /* MAC only supports full duplex mode */ -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT); -+ phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT); -+ -+ /* Only symmetric pause with flow control enabled is supported so no -+ * need to negotiate pause. -+ */ -+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->advertising); -+ linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->advertising); -+} -+ -+static struct mlxbf_gige_link_cfg mlxbf_gige_link_cfgs[] = { -+ [MLXBF_GIGE_VERSION_BF2] = { -+ .set_phy_link_mode = mlxbf_gige_bf2_set_phy_link_mode, -+ .adjust_link = mlxbf_gige_bf2_adjust_link, -+ .phy_mode = PHY_INTERFACE_MODE_GMII -+ }, -+ [MLXBF_GIGE_VERSION_BF3] = { -+ .set_phy_link_mode = mlxbf_gige_bf3_set_phy_link_mode, -+ .adjust_link = mlxbf_gige_bf3_adjust_link, -+ .phy_mode = PHY_INTERFACE_MODE_SGMII -+ } -+}; -+ - static int mlxbf_gige_probe(struct platform_device *pdev) - { - struct phy_device *phydev; -@@ -359,25 +445,14 @@ static int mlxbf_gige_probe(struct platform_device *pdev) - phydev->irq = phy_irq; - - err = phy_connect_direct(netdev, phydev, -- mlxbf_gige_adjust_link, -- PHY_INTERFACE_MODE_GMII); -+ mlxbf_gige_link_cfgs[priv->hw_version].adjust_link, -+ mlxbf_gige_link_cfgs[priv->hw_version].phy_mode); - if (err) { - dev_err(&pdev->dev, "Could not attach to PHY\n"); - goto out; - } - -- /* MAC only supports 1000T full duplex mode */ -- phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); -- phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Full_BIT); -- phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT); -- phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT); -- phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT); -- -- /* Only symmetric pause with flow control enabled is supported so no -- * need to negotiate pause. -- */ -- linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->advertising); -- linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, phydev->advertising); -+ mlxbf_gige_link_cfgs[priv->hw_version].set_phy_link_mode(phydev); - - /* Display information about attached PHY device */ - phy_attached_info(phydev); -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h -index 8d52dbef4adf..cd0973229c9b 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h -@@ -8,6 +8,8 @@ - #ifndef __MLXBF_GIGE_REGS_H__ - #define __MLXBF_GIGE_REGS_H__ - -+#include -+ - #define MLXBF_GIGE_VERSION 0x0000 - #define MLXBF_GIGE_VERSION_BF2 0x0 - #define MLXBF_GIGE_VERSION_BF3 0x1 -@@ -78,4 +80,23 @@ - */ - #define MLXBF_GIGE_MMIO_REG_SZ (MLXBF_GIGE_MAC_CFG + 8) - -+#define MLXBF_GIGE_PLU_TX_REG0 0x80 -+#define MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK GENMASK(11, 0) -+#define MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK GENMASK(15, 14) -+ -+#define MLXBF_GIGE_PLU_RX_REG0 0x10 -+#define MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK GENMASK(25, 24) -+ -+#define MLXBF_GIGE_1G_SGMII_MODE 0x0 -+#define MLXBF_GIGE_10M_SGMII_MODE 0x1 -+#define MLXBF_GIGE_100M_SGMII_MODE 0x2 -+ -+/* ipg_size default value for 1G is fixed by HW to 11 + End = 12. -+ * So for 100M it is 12 * 10 - 1 = 119 -+ * For 10M, it is 12 * 100 - 1 = 1199 -+ */ -+#define MLXBF_GIGE_1G_IPG_SIZE 11 -+#define MLXBF_GIGE_100M_IPG_SIZE 119 -+#define MLXBF_GIGE_10M_IPG_SIZE 1199 -+ - #endif /* !defined(__MLXBF_GIGE_REGS_H__) */ --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch b/platform/mellanox/non-upstream-patches/patches/0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch deleted file mode 100644 index e3dc4f7f8d0a..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0074-mlxbf_gige-add-set_link_ksettings-ethtool-callback.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 58d63cc90771fb493f5cf735a05eb95331041be3 Mon Sep 17 00:00:00 2001 -From: David Thompson -Date: Thu, 12 Jan 2023 15:26:08 -0500 -Subject: [PATCH backport 6.1.42 74/85] mlxbf_gige: add "set_link_ksettings" - ethtool callback - -BugLink: https://bugs.launchpad.net/bugs/2012649 - -This patch extends the "ethtool_ops" data structure to -include the "set_link_ksettings" callback. This change -enables configuration of the various interface speeds -that the BlueField-3 supports (10Mbps, 100Mbps, and 1Gbps). - -Signed-off-by: David Thompson -Signed-off-by: Asmaa Mnebhi -Reviewed-by: Andrew Lunn -Signed-off-by: Jakub Kicinski -(cherry picked from commit cedd97737a1f302b3d0493d7054a35e0c5997b99) -Signed-off-by: David Thompson -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c -index 4becb39b5664..8c5c81981ce7 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c -@@ -175,4 +175,5 @@ const struct ethtool_ops mlxbf_gige_ethtool_ops = { - .nway_reset = phy_ethtool_nway_reset, - .get_pauseparam = mlxbf_gige_get_pauseparam, - .get_link_ksettings = phy_ethtool_get_link_ksettings, -+ .set_link_ksettings = phy_ethtool_set_link_ksettings, - }; --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch b/platform/mellanox/non-upstream-patches/patches/0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch deleted file mode 100644 index a79977d3c7a6..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0075-UBUNTU-SAUCE-mlxbf-gige-Fix-kernel-panic-at-shutdown.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 7124b7b040a0cda35c09be51ac40e8e52026ec2d Mon Sep 17 00:00:00 2001 -From: Asmaa Mnebhi -Date: Fri, 2 Jun 2023 13:04:25 -0400 -Subject: [PATCH backport 6.1.42 75/85] UBUNTU: SAUCE: mlxbf-gige: Fix kernel - panic at shutdown - -BugLink: https://bugs.launchpad.net/bugs/2022370 - -We occasionally see a race condition (once every 350 reboots) where napi is still -running (mlxbf_gige_poll) while a shutdown has been initiated through "reboot". -Since mlxbf_gige_poll is still running, it tries to access a NULL pointer and as -a result causes a kernel panic. - -The fix is to explicitly disable napi and dequeue it during shutdown. -mlxbf_gige_remove already calls: -unregister_netdev->unregister_netdevice->unregister_netdev_queue-> -rollback_registered->rollback_registered_many->dev_close_many-> -__dev_close_many->ndo_stop->mlxbf_gige_stop which stops napi - -So use mlxbf_gige_remove in place of the existing shutdown logic. - -Signed-off-by: Asmaa Mnebhi -Acked-by: Bartlomiej Zolnierkiewicz -Acked-by: Tim Gardner -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c | 5 +---- - 1 file changed, 1 insertion(+), 4 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -index 0af086703bcd..fe35b5a24219 100644 ---- a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -+++ b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c -@@ -485,10 +485,7 @@ static int mlxbf_gige_remove(struct platform_device *pdev) - - static void mlxbf_gige_shutdown(struct platform_device *pdev) - { -- struct mlxbf_gige *priv = platform_get_drvdata(pdev); -- -- writeq(0, priv->base + MLXBF_GIGE_INT_EN); -- mlxbf_gige_clean_port(priv); -+ mlxbf_gige_remove(pdev); - } - - static const struct acpi_device_id __maybe_unused mlxbf_gige_acpi_match[] = { --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch b/platform/mellanox/non-upstream-patches/patches/0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch deleted file mode 100644 index d320f09fecea..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0076-UBUNTU-SAUCE-platform-mellanox-Updates-to-mlxbf-boot.patch +++ /dev/null @@ -1,1719 +0,0 @@ -From 4651b1520abcc8744493d41e1ebc1dbee3035904 Mon Sep 17 00:00:00 2001 -From: Shravan Kumar Ramani -Date: Wed, 6 Jul 2022 07:37:22 -0400 -Subject: [PATCH backport 6.1.42 76/85] UBUNTU: SAUCE: platform/mellanox: - Updates to mlxbf-bootctl - -BugLink: https://launchpad.net/bugs/1980832 - -The driver supports the VPD fields in the EEPROM and exposes -sysfs files for configuring and reading the same. -Also address buffer overflow and exclusion issues. - -Signed-off-by: Shravan Kumar Ramani -Signed-off-by: Ike Panhc ---- - drivers/platform/mellanox/mlxbf-bootctl.c | 1410 ++++++++++++++++++--- - drivers/platform/mellanox/mlxbf-bootctl.h | 88 +- - 2 files changed, 1268 insertions(+), 230 deletions(-) - -diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c -index 1c7a288b59a5..2302e1e09c7e 100644 ---- a/drivers/platform/mellanox/mlxbf-bootctl.c -+++ b/drivers/platform/mellanox/mlxbf-bootctl.c -@@ -1,51 +1,129 @@ --// SPDX-License-Identifier: GPL-2.0+ -+// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause - /* -- * Mellanox boot control driver -+ * Mellanox boot control driver -+ * This driver provides a sysfs interface for systems management -+ * software to manage reset-time actions. - * -- * This driver provides a sysfs interface for systems management -- * software to manage reset-time actions. -+ * Copyright (C) 2020 Mellanox Technologies. All rights reserved. - * -- * Copyright (C) 2019 Mellanox Technologies -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License v2.0 as published by -+ * the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. - */ - - #include - #include -+#include -+#include - #include - #include -- - #include "mlxbf-bootctl.h" - --#define MLXBF_BOOTCTL_SB_SECURE_MASK 0x03 --#define MLXBF_BOOTCTL_SB_TEST_MASK 0x0c -+#define DRIVER_NAME "mlxbf-bootctl" -+#define DRIVER_VERSION "1.5" -+#define DRIVER_DESCRIPTION "Mellanox boot control driver" -+ -+#define SB_MODE_SECURE_MASK 0x03 -+#define SB_MODE_TEST_MASK 0x0c -+#define SB_MODE_DEV_MASK 0x10 - --#define MLXBF_SB_KEY_NUM 4 -+#define SB_KEY_NUM 4 -+ -+struct boot_name { -+ int value; -+ const char name[12]; -+}; - --/* UUID used to probe ATF service. */ --static const char *mlxbf_bootctl_svc_uuid_str = -- "89c036b4-e7d7-11e6-8797-001aca00bfc4"; -+static struct boot_name boot_names[] = { -+ { MLNX_BOOT_EXTERNAL, "external" }, -+ { MLNX_BOOT_EMMC, "emmc" }, -+ { MLNX_BOOT_SWAP_EMMC, "swap_emmc" }, -+ { MLNX_BOOT_EMMC_LEGACY, "emmc_legacy" }, -+ { MLNX_BOOT_NONE, "none" }, -+ { -1, "" } -+}; - --struct mlxbf_bootctl_name { -- u32 value; -- const char *name; -+enum { -+ SB_LIFECYCLE_PRODUCTION = 0, -+ SB_LIFECYCLE_GA_SECURE = 1, -+ SB_LIFECYCLE_GA_NON_SECURE = 2, -+ SB_LIFECYCLE_RMA = 3 - }; - --static struct mlxbf_bootctl_name boot_names[] = { -- { MLXBF_BOOTCTL_EXTERNAL, "external" }, -- { MLXBF_BOOTCTL_EMMC, "emmc" }, -- { MLNX_BOOTCTL_SWAP_EMMC, "swap_emmc" }, -- { MLXBF_BOOTCTL_EMMC_LEGACY, "emmc_legacy" }, -- { MLXBF_BOOTCTL_NONE, "none" }, -+static char lifecycle_states[][16] = { -+ [SB_LIFECYCLE_PRODUCTION] = "Production", -+ [SB_LIFECYCLE_GA_SECURE] = "GA Secured", -+ [SB_LIFECYCLE_GA_NON_SECURE] = "GA Non-Secured", -+ [SB_LIFECYCLE_RMA] = "RMA", - }; - --static const char * const mlxbf_bootctl_lifecycle_states[] = { -- [0] = "Production", -- [1] = "GA Secured", -- [2] = "GA Non-Secured", -- [3] = "RMA", -+/* ctl/data register within the resource. */ -+#define RSH_SCRATCH_BUF_CTL_OFF 0 -+#define RSH_SCRATCH_BUF_DATA_OFF 0x10 -+ -+static void __iomem *rsh_boot_data; -+static void __iomem *rsh_boot_cnt; -+static void __iomem *rsh_semaphore; -+static void __iomem *rsh_scratch_buf_ctl; -+static void __iomem *rsh_scratch_buf_data; -+ -+static int rsh_log_clear_on_read; -+module_param(rsh_log_clear_on_read, int, 0644); -+MODULE_PARM_DESC(rsh_log_clear_on_read, "Clear rshim logging buffer after read."); -+ -+/* -+ * Objects are stored within the MFG partition per type. Type 0 is not -+ * supported. -+ */ -+enum { -+ MLNX_MFG_TYPE_OOB_MAC = 1, -+ MLNX_MFG_TYPE_OPN_0, -+ MLNX_MFG_TYPE_OPN_1, -+ MLNX_MFG_TYPE_OPN_2, -+ MLNX_MFG_TYPE_SKU_0, -+ MLNX_MFG_TYPE_SKU_1, -+ MLNX_MFG_TYPE_SKU_2, -+ MLNX_MFG_TYPE_MODL_0, -+ MLNX_MFG_TYPE_MODL_1, -+ MLNX_MFG_TYPE_MODL_2, -+ MLNX_MFG_TYPE_SN_0, -+ MLNX_MFG_TYPE_SN_1, -+ MLNX_MFG_TYPE_SN_2, -+ MLNX_MFG_TYPE_UUID_0, -+ MLNX_MFG_TYPE_UUID_1, -+ MLNX_MFG_TYPE_UUID_2, -+ MLNX_MFG_TYPE_UUID_3, -+ MLNX_MFG_TYPE_UUID_4, -+ MLNX_MFG_TYPE_REV, - }; - --/* ARM SMC call which is atomic and no need for lock. */ --static int mlxbf_bootctl_smc(unsigned int smc_op, int smc_arg) -+/* This mutex is used to serialize MFG write and lock operations. */ -+static DEFINE_MUTEX(mfg_ops_lock); -+ -+#define MLNX_MFG_OOB_MAC_LEN ETH_ALEN -+#define MLNX_MFG_OPN_VAL_LEN 24 -+#define MLNX_MFG_SKU_VAL_LEN 24 -+#define MLNX_MFG_MODL_VAL_LEN 24 -+#define MLNX_MFG_SN_VAL_LEN 24 -+#define MLNX_MFG_UUID_VAL_LEN 40 -+#define MLNX_MFG_REV_VAL_LEN 8 -+#define MLNX_MFG_VAL_QWORD_CNT(type) \ -+ (MLNX_MFG_##type##_VAL_LEN / sizeof(u64)) -+ -+/* -+ * The MAC address consists of 6 bytes (2 digits each) separated by ':'. -+ * The expected format is: "XX:XX:XX:XX:XX:XX" -+ */ -+#define MLNX_MFG_OOB_MAC_FORMAT_LEN \ -+ ((MLNX_MFG_OOB_MAC_LEN * 2) + (MLNX_MFG_OOB_MAC_LEN - 1)) -+ -+/* The SMC calls in question are atomic, so we don't have to lock here. */ -+static int smc_call1(unsigned int smc_op, int smc_arg) - { - struct arm_smccc_res res; - -@@ -54,268 +132,1212 @@ static int mlxbf_bootctl_smc(unsigned int smc_op, int smc_arg) - return res.a0; - } - --/* Return the action in integer or an error code. */ --static int mlxbf_bootctl_reset_action_to_val(const char *action) -+/* Syntactic sugar to avoid having to specify an unused argument. */ -+#define smc_call0(smc_op) smc_call1(smc_op, 0) -+ -+static int reset_action_to_val(const char *action, size_t len) - { -- int i; -+ struct boot_name *bn; -+ -+ /* Accept string either with or without a newline terminator */ -+ if (action[len-1] == '\n') -+ --len; - -- for (i = 0; i < ARRAY_SIZE(boot_names); i++) -- if (sysfs_streq(boot_names[i].name, action)) -- return boot_names[i].value; -+ for (bn = boot_names; bn->value >= 0; ++bn) -+ if (strncmp(bn->name, action, len) == 0) -+ break; - -- return -EINVAL; -+ return bn->value; - } - --/* Return the action in string. */ --static const char *mlxbf_bootctl_action_to_string(int action) -+static const char *reset_action_to_string(int action) - { -- int i; -+ struct boot_name *bn; - -- for (i = 0; i < ARRAY_SIZE(boot_names); i++) -- if (boot_names[i].value == action) -- return boot_names[i].name; -+ for (bn = boot_names; bn->value >= 0; ++bn) -+ if (bn->value == action) -+ break; - -- return "invalid action"; -+ return bn->name; - } - --static ssize_t post_reset_wdog_show(struct device *dev, -- struct device_attribute *attr, char *buf) -+static ssize_t post_reset_wdog_show(struct device_driver *drv, -+ char *buf) - { -- int ret; -+ return snprintf(buf, PAGE_SIZE, "%d\n", -+ smc_call0(MLNX_GET_POST_RESET_WDOG)); -+} - -- ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_POST_RESET_WDOG, 0); -- if (ret < 0) -- return ret; -+static ssize_t post_reset_wdog_store(struct device_driver *drv, -+ const char *buf, size_t count) -+{ -+ int err; -+ unsigned long watchdog; -+ -+ err = kstrtoul(buf, 10, &watchdog); -+ if (err) -+ return err; -+ -+ if (smc_call1(MLNX_SET_POST_RESET_WDOG, watchdog) < 0) -+ return -EINVAL; - -- return sprintf(buf, "%d\n", ret); -+ return count; - } - --static ssize_t post_reset_wdog_store(struct device *dev, -- struct device_attribute *attr, -- const char *buf, size_t count) -+static ssize_t reset_action_show(struct device_driver *drv, -+ char *buf) - { -- unsigned long value; -- int ret; -+ return snprintf(buf, PAGE_SIZE, "%s\n", reset_action_to_string( -+ smc_call0(MLNX_GET_RESET_ACTION))); -+} - -- ret = kstrtoul(buf, 10, &value); -- if (ret) -- return ret; -+static ssize_t reset_action_store(struct device_driver *drv, -+ const char *buf, size_t count) -+{ -+ int action = reset_action_to_val(buf, count); - -- ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_SET_POST_RESET_WDOG, value); -- if (ret < 0) -- return ret; -+ if (action < 0 || action == MLNX_BOOT_NONE) -+ return -EINVAL; -+ -+ if (smc_call1(MLNX_SET_RESET_ACTION, action) < 0) -+ return -EINVAL; - - return count; - } - --static ssize_t mlxbf_bootctl_show(int smc_op, char *buf) -+static ssize_t second_reset_action_show(struct device_driver *drv, -+ char *buf) - { -- int action; -+ return snprintf(buf, PAGE_SIZE, "%s\n", reset_action_to_string( -+ smc_call0(MLNX_GET_SECOND_RESET_ACTION))); -+} -+ -+static ssize_t second_reset_action_store(struct device_driver *drv, -+ const char *buf, size_t count) -+{ -+ int action = reset_action_to_val(buf, count); - -- action = mlxbf_bootctl_smc(smc_op, 0); - if (action < 0) -- return action; -+ return -EINVAL; -+ -+ if (smc_call1(MLNX_SET_SECOND_RESET_ACTION, action) < 0) -+ return -EINVAL; - -- return sprintf(buf, "%s\n", mlxbf_bootctl_action_to_string(action)); -+ return count; - } - --static int mlxbf_bootctl_store(int smc_op, const char *buf, size_t count) -+static ssize_t lifecycle_state_show(struct device_driver *drv, -+ char *buf) - { -- int ret, action; -+ int lc_state = smc_call1(MLNX_GET_TBB_FUSE_STATUS, -+ MLNX_FUSE_STATUS_LIFECYCLE); - -- action = mlxbf_bootctl_reset_action_to_val(buf); -- if (action < 0) -- return action; -+ if (lc_state < 0) -+ return -EINVAL; -+ -+ lc_state &= (SB_MODE_TEST_MASK | -+ SB_MODE_SECURE_MASK | -+ SB_MODE_DEV_MASK); - -- ret = mlxbf_bootctl_smc(smc_op, action); -- if (ret < 0) -- return ret; -+ /* -+ * If the test bits are set, we specify that the current state may be -+ * due to using the test bits. -+ */ -+ if ((lc_state & SB_MODE_TEST_MASK) != 0) { -+ -+ lc_state &= SB_MODE_SECURE_MASK; -+ -+ return snprintf(buf, PAGE_SIZE, "%s(test)\n", -+ lifecycle_states[lc_state]); -+ } else if ((lc_state & SB_MODE_SECURE_MASK) == SB_LIFECYCLE_GA_SECURE -+ && (lc_state & SB_MODE_DEV_MASK)) { -+ return snprintf(buf, PAGE_SIZE, "Secured (development)\n"); -+ } -+ -+ return snprintf(buf, PAGE_SIZE, "%s\n", lifecycle_states[lc_state]); -+} -+ -+static ssize_t secure_boot_fuse_state_show(struct device_driver *drv, -+ char *buf) -+{ -+ int key; -+ int buf_len = 0; -+ int upper_key_used = 0; -+ int sb_key_state = smc_call1(MLNX_GET_TBB_FUSE_STATUS, -+ MLNX_FUSE_STATUS_KEYS); -+ -+ if (sb_key_state < 0) -+ return -EINVAL; -+ -+ for (key = SB_KEY_NUM - 1; key >= 0; key--) { -+ int burnt = ((sb_key_state & (1 << key)) != 0); -+ int valid = ((sb_key_state & (1 << (key + SB_KEY_NUM))) != 0); -+ -+ buf_len += sprintf(buf + buf_len, "Ver%d:", key); -+ if (upper_key_used) { -+ if (burnt) { -+ if (valid) -+ buf_len += sprintf(buf + buf_len, -+ "Used"); -+ else -+ buf_len += sprintf(buf + buf_len, -+ "Wasted"); -+ } else { -+ if (valid) -+ buf_len += sprintf(buf + buf_len, -+ "Invalid"); -+ else -+ buf_len += sprintf(buf + buf_len, -+ "Skipped"); -+ } -+ } else { -+ if (burnt) { -+ if (valid) { -+ upper_key_used = 1; -+ buf_len += sprintf(buf + buf_len, -+ "In use"); -+ } else -+ buf_len += sprintf(buf + buf_len, -+ "Burn incomplete"); -+ } else { -+ if (valid) -+ buf_len += sprintf(buf + buf_len, -+ "Invalid"); -+ else -+ buf_len += sprintf(buf + buf_len, -+ "Free"); -+ } -+ } -+ buf_len += sprintf(buf + buf_len, "\n"); -+ } -+ -+ return buf_len; -+} -+ -+static ssize_t fw_reset_store(struct device_driver *drv, -+ const char *buf, size_t count) -+{ -+ int err; -+ unsigned long key; -+ -+ err = kstrtoul(buf, 16, &key); -+ if (err) -+ return err; -+ -+ if (smc_call1(MLNX_HANDLE_FW_RESET, key) < 0) -+ return -EINVAL; - - return count; - } - --static ssize_t reset_action_show(struct device *dev, -- struct device_attribute *attr, char *buf) -+static ssize_t oob_mac_show(struct device_driver *drv, char *buf) - { -- return mlxbf_bootctl_show(MLXBF_BOOTCTL_GET_RESET_ACTION, buf); -+ char mac_str[MLNX_MFG_OOB_MAC_FORMAT_LEN + 1] = { 0 }; -+ struct arm_smccc_res res; -+ u8 *mac_byte_ptr; -+ -+ mutex_lock(&mfg_ops_lock); -+ arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC, 0, 0, 0, -+ 0, 0, 0, &res); -+ mutex_unlock(&mfg_ops_lock); -+ if (res.a0) -+ return -EPERM; -+ -+ mac_byte_ptr = (u8 *)&res.a1; -+ -+ sprintf(mac_str, "%02X:%02X:%02X:%02X:%02X:%02X", -+ mac_byte_ptr[0], mac_byte_ptr[1], mac_byte_ptr[2], -+ mac_byte_ptr[3], mac_byte_ptr[4], mac_byte_ptr[5]); -+ -+ return snprintf(buf, PAGE_SIZE, "%s", mac_str); - } - --static ssize_t reset_action_store(struct device *dev, -- struct device_attribute *attr, -- const char *buf, size_t count) -+static ssize_t oob_mac_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ int byte[MLNX_MFG_OOB_MAC_FORMAT_LEN] = { 0 }; -+ struct arm_smccc_res res; -+ u64 mac_addr = 0; -+ u8 *mac_byte_ptr; -+ int byte_idx, len; -+ -+ if ((count - 1) != MLNX_MFG_OOB_MAC_FORMAT_LEN) -+ return -EINVAL; -+ -+ len = sscanf(buf, "%02x:%02x:%02x:%02x:%02x:%02x", -+ &byte[0], &byte[1], &byte[2], -+ &byte[3], &byte[4], &byte[5]); -+ if (len != MLNX_MFG_OOB_MAC_LEN) -+ return -EINVAL; -+ -+ mac_byte_ptr = (u8 *)&mac_addr; -+ -+ for (byte_idx = 0; byte_idx < MLNX_MFG_OOB_MAC_LEN; byte_idx++) -+ mac_byte_ptr[byte_idx] = (u8) byte[byte_idx]; -+ -+ mutex_lock(&mfg_ops_lock); -+ arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, MLNX_MFG_TYPE_OOB_MAC, -+ MLNX_MFG_OOB_MAC_LEN, mac_addr, 0, 0, 0, 0, &res); -+ mutex_unlock(&mfg_ops_lock); -+ -+ return res.a0 ? -EPERM : count; -+} -+ -+static ssize_t opn_show(struct device_driver *drv, char *buf) - { -- return mlxbf_bootctl_store(MLXBF_BOOTCTL_SET_RESET_ACTION, buf, count); -+ u64 opn_data[MLNX_MFG_VAL_QWORD_CNT(OPN)] = { 0 }; -+ char opn[MLNX_MFG_OPN_VAL_LEN + 1] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(OPN); word++) { -+ arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, -+ MLNX_MFG_TYPE_OPN_0 + word, -+ 0, 0, 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ opn_data[word] = res.a1; -+ } -+ mutex_unlock(&mfg_ops_lock); -+ memcpy(opn, opn_data, MLNX_MFG_OPN_VAL_LEN); -+ -+ return snprintf(buf, PAGE_SIZE, "%s", opn); - } - --static ssize_t second_reset_action_show(struct device *dev, -- struct device_attribute *attr, -- char *buf) -+static ssize_t opn_store(struct device_driver *drv, const char *buf, -+ size_t count) - { -- return mlxbf_bootctl_show(MLXBF_BOOTCTL_GET_SECOND_RESET_ACTION, buf); -+ u64 opn[MLNX_MFG_VAL_QWORD_CNT(OPN)] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ if (count > MLNX_MFG_OPN_VAL_LEN) -+ return -EINVAL; -+ -+ memcpy(opn, buf, count); -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(OPN); word++) { -+ arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, -+ MLNX_MFG_TYPE_OPN_0 + word, -+ sizeof(u64), opn[word], 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ } -+ mutex_unlock(&mfg_ops_lock); -+ -+ return count; - } - --static ssize_t second_reset_action_store(struct device *dev, -- struct device_attribute *attr, -- const char *buf, size_t count) -+static ssize_t sku_show(struct device_driver *drv, char *buf) - { -- return mlxbf_bootctl_store(MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION, buf, -- count); -+ u64 sku_data[MLNX_MFG_VAL_QWORD_CNT(SKU)] = { 0 }; -+ char sku[MLNX_MFG_SKU_VAL_LEN + 1] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SKU); word++) { -+ arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, -+ MLNX_MFG_TYPE_SKU_0 + word, -+ 0, 0, 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ sku_data[word] = res.a1; -+ } -+ mutex_unlock(&mfg_ops_lock); -+ memcpy(sku, sku_data, MLNX_MFG_SKU_VAL_LEN); -+ -+ return snprintf(buf, PAGE_SIZE, "%s", sku); - } - --static ssize_t lifecycle_state_show(struct device *dev, -- struct device_attribute *attr, char *buf) -+static ssize_t sku_store(struct device_driver *drv, const char *buf, -+ size_t count) - { -- int lc_state; -+ u64 sku[MLNX_MFG_VAL_QWORD_CNT(SKU)] = { 0 }; -+ struct arm_smccc_res res; -+ int word; - -- lc_state = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS, -- MLXBF_BOOTCTL_FUSE_STATUS_LIFECYCLE); -- if (lc_state < 0) -- return lc_state; -+ if (count > MLNX_MFG_SKU_VAL_LEN) -+ return -EINVAL; - -- lc_state &= -- MLXBF_BOOTCTL_SB_TEST_MASK | MLXBF_BOOTCTL_SB_SECURE_MASK; -+ memcpy(sku, buf, count); - -- /* -- * If the test bits are set, we specify that the current state may be -- * due to using the test bits. -- */ -- if (lc_state & MLXBF_BOOTCTL_SB_TEST_MASK) { -- lc_state &= MLXBF_BOOTCTL_SB_SECURE_MASK; -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SKU); word++) { -+ arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, -+ MLNX_MFG_TYPE_SKU_0 + word, -+ sizeof(u64), sku[word], 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ } -+ mutex_unlock(&mfg_ops_lock); - -- return sprintf(buf, "%s(test)\n", -- mlxbf_bootctl_lifecycle_states[lc_state]); -+ return count; -+} -+ -+static ssize_t modl_show(struct device_driver *drv, char *buf) -+{ -+ u64 modl_data[MLNX_MFG_VAL_QWORD_CNT(MODL)] = { 0 }; -+ char modl[MLNX_MFG_MODL_VAL_LEN + 1] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(MODL); word++) { -+ arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, -+ MLNX_MFG_TYPE_MODL_0 + word, -+ 0, 0, 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ modl_data[word] = res.a1; - } -+ mutex_unlock(&mfg_ops_lock); -+ memcpy(modl, modl_data, MLNX_MFG_MODL_VAL_LEN); - -- return sprintf(buf, "%s\n", mlxbf_bootctl_lifecycle_states[lc_state]); -+ return snprintf(buf, PAGE_SIZE, "%s", modl); - } - --static ssize_t secure_boot_fuse_state_show(struct device *dev, -- struct device_attribute *attr, -- char *buf) -+static ssize_t modl_store(struct device_driver *drv, const char *buf, -+ size_t count) - { -- int burnt, valid, key, key_state, buf_len = 0, upper_key_used = 0; -- const char *status; -+ u64 modl[MLNX_MFG_VAL_QWORD_CNT(MODL)] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ if (count > MLNX_MFG_MODL_VAL_LEN) -+ return -EINVAL; -+ -+ memcpy(modl, buf, count); -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(MODL); word++) { -+ arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, -+ MLNX_MFG_TYPE_MODL_0 + word, -+ sizeof(u64), modl[word], 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ } -+ mutex_unlock(&mfg_ops_lock); -+ -+ return count; -+} -+ -+static ssize_t sn_show(struct device_driver *drv, char *buf) -+{ -+ u64 sn_data[MLNX_MFG_VAL_QWORD_CNT(SN)] = { 0 }; -+ char sn[MLNX_MFG_SN_VAL_LEN + 1] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SN); word++) { -+ arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, -+ MLNX_MFG_TYPE_SN_0 + word, -+ 0, 0, 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ sn_data[word] = res.a1; -+ } -+ mutex_unlock(&mfg_ops_lock); -+ memcpy(sn, sn_data, MLNX_MFG_SN_VAL_LEN); -+ -+ return snprintf(buf, PAGE_SIZE, "%s", sn); -+} -+ -+static ssize_t sn_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ u64 sn[MLNX_MFG_VAL_QWORD_CNT(SN)] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ if (count > MLNX_MFG_SN_VAL_LEN) -+ return -EINVAL; -+ -+ memcpy(sn, buf, count); -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(SN); word++) { -+ arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, -+ MLNX_MFG_TYPE_SN_0 + word, -+ sizeof(u64), sn[word], 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ } -+ mutex_unlock(&mfg_ops_lock); -+ -+ return count; -+} -+ -+static ssize_t uuid_show(struct device_driver *drv, char *buf) -+{ -+ u64 uuid_data[MLNX_MFG_VAL_QWORD_CNT(UUID)] = { 0 }; -+ char uuid[MLNX_MFG_UUID_VAL_LEN + 1] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(UUID); word++) { -+ arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, -+ MLNX_MFG_TYPE_UUID_0 + word, -+ 0, 0, 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ uuid_data[word] = res.a1; -+ } -+ mutex_unlock(&mfg_ops_lock); -+ memcpy(uuid, uuid_data, MLNX_MFG_UUID_VAL_LEN); -+ -+ return snprintf(buf, PAGE_SIZE, "%s", uuid); -+} -+ -+static ssize_t uuid_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ u64 uuid[MLNX_MFG_VAL_QWORD_CNT(UUID)] = { 0 }; -+ struct arm_smccc_res res; -+ int word; - -- key_state = mlxbf_bootctl_smc(MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS, -- MLXBF_BOOTCTL_FUSE_STATUS_KEYS); -- if (key_state < 0) -- return key_state; -+ if (count > MLNX_MFG_UUID_VAL_LEN) -+ return -EINVAL; -+ -+ memcpy(uuid, buf, count); -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(UUID); word++) { -+ arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, -+ MLNX_MFG_TYPE_UUID_0 + word, -+ sizeof(u64), uuid[word], 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ } -+ mutex_unlock(&mfg_ops_lock); -+ -+ return count; -+} -+ -+static ssize_t rev_show(struct device_driver *drv, char *buf) -+{ -+ u64 rev_data[MLNX_MFG_VAL_QWORD_CNT(REV)] = { 0 }; -+ char rev[MLNX_MFG_REV_VAL_LEN + 1] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(REV); word++) { -+ arm_smccc_smc(MLNX_HANDLE_GET_MFG_INFO, -+ MLNX_MFG_TYPE_REV + word, -+ 0, 0, 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ rev_data[word] = res.a1; -+ } -+ mutex_unlock(&mfg_ops_lock); -+ memcpy(rev, rev_data, MLNX_MFG_REV_VAL_LEN); -+ -+ return snprintf(buf, PAGE_SIZE, "%s", rev); -+} -+ -+static ssize_t rev_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ u64 rev[MLNX_MFG_VAL_QWORD_CNT(REV)] = { 0 }; -+ struct arm_smccc_res res; -+ int word; -+ -+ if (count > MLNX_MFG_REV_VAL_LEN) -+ return -EINVAL; -+ -+ memcpy(rev, buf, count); -+ -+ mutex_lock(&mfg_ops_lock); -+ for (word = 0; word < MLNX_MFG_VAL_QWORD_CNT(REV); word++) { -+ arm_smccc_smc(MLNX_HANDLE_SET_MFG_INFO, -+ MLNX_MFG_TYPE_REV + word, -+ sizeof(u64), rev[word], 0, 0, 0, 0, &res); -+ if (res.a0) { -+ mutex_unlock(&mfg_ops_lock); -+ return -EPERM; -+ } -+ } -+ mutex_unlock(&mfg_ops_lock); -+ -+ return count; -+} -+ -+static ssize_t mfg_lock_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ unsigned long val; -+ int err; -+ -+ err = kstrtoul(buf, 10, &val); -+ if (err) -+ return err; -+ -+ if (val != 1) -+ return -EINVAL; -+ -+ mutex_lock(&mfg_ops_lock); -+ smc_call0(MLNX_HANDLE_LOCK_MFG_INFO); -+ mutex_unlock(&mfg_ops_lock); -+ -+ return count; -+} -+ -+/* Log header format. */ -+#define RSH_LOG_TYPE_SHIFT 56 -+#define RSH_LOG_LEN_SHIFT 48 -+#define RSH_LOG_LEVEL_SHIFT 0 -+ -+/* Module ID and type used here. */ -+#define BF_RSH_LOG_TYPE_UNKNOWN 0x00ULL -+#define BF_RSH_LOG_TYPE_PANIC 0x01ULL -+#define BF_RSH_LOG_TYPE_EXCEPTION 0x02ULL -+#define BF_RSH_LOG_TYPE_UNUSED 0x03ULL -+#define BF_RSH_LOG_TYPE_MSG 0x04ULL -+ -+/* Utility macro. */ -+#define BF_RSH_LOG_MOD_MASK 0x0FULL -+#define BF_RSH_LOG_MOD_SHIFT 60 -+#define BF_RSH_LOG_TYPE_MASK 0x0FULL -+#define BF_RSH_LOG_TYPE_SHIFT 56 -+#define BF_RSH_LOG_LEN_MASK 0x7FULL -+#define BF_RSH_LOG_LEN_SHIFT 48 -+#define BF_RSH_LOG_ARG_MASK 0xFFFFFFFFULL -+#define BF_RSH_LOG_ARG_SHIFT 16 -+#define BF_RSH_LOG_HAS_ARG_MASK 0xFFULL -+#define BF_RSH_LOG_HAS_ARG_SHIFT 8 -+#define BF_RSH_LOG_LEVEL_MASK 0xFFULL -+#define BF_RSH_LOG_LEVEL_SHIFT 0 -+#define BF_RSH_LOG_PC_MASK 0xFFFFFFFFULL -+#define BF_RSH_LOG_PC_SHIFT 0 -+#define BF_RSH_LOG_SYNDROME_MASK 0xFFFFFFFFULL -+#define BF_RSH_LOG_SYNDROME_SHIFT 0 -+ -+#define BF_RSH_LOG_HEADER_GET(f, h) \ -+ (((h) >> BF_RSH_LOG_##f##_SHIFT) & BF_RSH_LOG_##f##_MASK) -+ -+/* Log message level. */ -+enum { -+ RSH_LOG_INFO, -+ RSH_LOG_WARN, -+ RSH_LOG_ERR -+}; -+ -+/* Log module */ -+const char * const rsh_log_mod[] = { -+ "MISC", "BL1", "BL2", "BL2R", "BL31", "UEFI" -+}; -+ -+const char *rsh_log_level[] = {"INFO", "WARN", "ERR", "ASSERT"}; -+ -+#define AARCH64_MRS_REG_SHIFT 5 -+#define AARCH64_MRS_REG_MASK 0xffff -+#define AARCH64_ESR_ELX_EXCEPTION_CLASS_SHIFT 26 -+ -+struct rsh_log_reg { -+ char *name; -+ u32 opcode; -+} rsh_log_reg; -+ -+static struct rsh_log_reg rsh_log_regs[] = { -+ {"actlr_el1", 0b1100000010000001}, -+ {"actlr_el2", 0b1110000010000001}, -+ {"actlr_el3", 0b1111000010000001}, -+ {"afsr0_el1", 0b1100001010001000}, -+ {"afsr0_el2", 0b1110001010001000}, -+ {"afsr0_el3", 0b1111001010001000}, -+ {"afsr1_el1", 0b1100001010001001}, -+ {"afsr1_el2", 0b1110001010001001}, -+ {"afsr1_el3", 0b1111001010001001}, -+ {"amair_el1", 0b1100010100011000}, -+ {"amair_el2", 0b1110010100011000}, -+ {"amair_el3", 0b1111010100011000}, -+ {"ccsidr_el1", 0b1100100000000000}, -+ {"clidr_el1", 0b1100100000000001}, -+ {"cntkctl_el1", 0b1100011100001000}, -+ {"cntp_ctl_el0", 0b1101111100010001}, -+ {"cntp_cval_el0", 0b1101111100010010}, -+ {"cntv_ctl_el0", 0b1101111100011001}, -+ {"cntv_cval_el0", 0b1101111100011010}, -+ {"contextidr_el1", 0b1100011010000001}, -+ {"cpacr_el1", 0b1100000010000010}, -+ {"cptr_el2", 0b1110000010001010}, -+ {"cptr_el3", 0b1111000010001010}, -+ {"vtcr_el2", 0b1110000100001010}, -+ {"ctr_el0", 0b1101100000000001}, -+ {"currentel", 0b1100001000010010}, -+ {"dacr32_el2", 0b1110000110000000}, -+ {"daif", 0b1101101000010001}, -+ {"dczid_el0", 0b1101100000000111}, -+ {"dlr_el0", 0b1101101000101001}, -+ {"dspsr_el0", 0b1101101000101000}, -+ {"elr_el1", 0b1100001000000001}, -+ {"elr_el2", 0b1110001000000001}, -+ {"elr_el3", 0b1111001000000001}, -+ {"esr_el1", 0b1100001010010000}, -+ {"esr_el2", 0b1110001010010000}, -+ {"esr_el3", 0b1111001010010000}, -+ {"esselr_el1", 0b1101000000000000}, -+ {"far_el1", 0b1100001100000000}, -+ {"far_el2", 0b1110001100000000}, -+ {"far_el3", 0b1111001100000000}, -+ {"fpcr", 0b1101101000100000}, -+ {"fpexc32_el2", 0b1110001010011000}, -+ {"fpsr", 0b1101101000100001}, -+ {"hacr_el2", 0b1110000010001111}, -+ {"har_el2", 0b1110000010001000}, -+ {"hpfar_el2", 0b1110001100000100}, -+ {"hstr_el2", 0b1110000010001011}, -+ {"far_el1", 0b1100001100000000}, -+ {"far_el2", 0b1110001100000000}, -+ {"far_el3", 0b1111001100000000}, -+ {"hcr_el2", 0b1110000010001000}, -+ {"hpfar_el2", 0b1110001100000100}, -+ {"id_aa64afr0_el1", 0b1100000000101100}, -+ {"id_aa64afr1_el1", 0b1100000000101101}, -+ {"id_aa64dfr0_el1", 0b1100000000101100}, -+ {"id_aa64isar0_el1", 0b1100000000110000}, -+ {"id_aa64isar1_el1", 0b1100000000110001}, -+ {"id_aa64mmfr0_el1", 0b1100000000111000}, -+ {"id_aa64mmfr1_el1", 0b1100000000111001}, -+ {"id_aa64pfr0_el1", 0b1100000000100000}, -+ {"id_aa64pfr1_el1", 0b1100000000100001}, -+ {"ifsr32_el2", 0b1110001010000001}, -+ {"isr_el1", 0b1100011000001000}, -+ {"mair_el1", 0b1100010100010000}, -+ {"mair_el2", 0b1110010100010000}, -+ {"mair_el3", 0b1111010100010000}, -+ {"midr_el1", 0b1100000000000000}, -+ {"mpidr_el1", 0b1100000000000101}, -+ {"nzcv", 0b1101101000010000}, -+ {"revidr_el1", 0b1100000000000110}, -+ {"rmr_el3", 0b1111011000000010}, -+ {"par_el1", 0b1100001110100000}, -+ {"rvbar_el3", 0b1111011000000001}, -+ {"scr_el3", 0b1111000010001000}, -+ {"sctlr_el1", 0b1100000010000000}, -+ {"sctlr_el2", 0b1110000010000000}, -+ {"sctlr_el3", 0b1111000010000000}, -+ {"sp_el0", 0b1100001000001000}, -+ {"sp_el1", 0b1110001000001000}, -+ {"spsel", 0b1100001000010000}, -+ {"spsr_abt", 0b1110001000011001}, -+ {"spsr_el1", 0b1100001000000000}, -+ {"spsr_el2", 0b1110001000000000}, -+ {"spsr_el3", 0b1111001000000000}, -+ {"spsr_fiq", 0b1110001000011011}, -+ {"spsr_irq", 0b1110001000011000}, -+ {"spsr_und", 0b1110001000011010}, -+ {"tcr_el1", 0b1100000100000010}, -+ {"tcr_el2", 0b1110000100000010}, -+ {"tcr_el3", 0b1111000100000010}, -+ {"tpidr_el0", 0b1101111010000010}, -+ {"tpidr_el1", 0b1100011010000100}, -+ {"tpidr_el2", 0b1110011010000010}, -+ {"tpidr_el3", 0b1111011010000010}, -+ {"tpidpro_el0", 0b1101111010000011}, -+ {"vbar_el1", 0b1100011000000000}, -+ {"vbar_el2", 0b1110011000000000}, -+ {"vbar_el3", 0b1111011000000000}, -+ {"vmpidr_el2", 0b1110000000000101}, -+ {"vpidr_el2", 0b1110000000000000}, -+ {"ttbr0_el1", 0b1100000100000000}, -+ {"ttbr0_el2", 0b1110000100000000}, -+ {"ttbr0_el3", 0b1111000100000000}, -+ {"ttbr1_el1", 0b1100000100000001}, -+ {"vtcr_el2", 0b1110000100001010}, -+ {"vttbr_el2", 0b1110000100001000}, -+ {NULL, 0b0000000000000000}, -+}; -+ -+/* Size(8-byte words) of the log buffer. */ -+#define RSH_SCRATCH_BUF_CTL_IDX_MASK 0x7f -+ -+static int rsh_log_sem_lock(void) -+{ -+ unsigned long timeout; -+ -+ /* Take the semaphore. */ -+ timeout = jiffies + msecs_to_jiffies(100); -+ while (readq(rsh_semaphore)) { -+ if (time_after(jiffies, timeout)) -+ return -ETIMEDOUT; -+ } -+ -+ return 0; -+} -+ -+static void rsh_log_sem_unlock(void) -+{ -+ writeq(0, rsh_semaphore); -+} -+ -+static ssize_t rsh_log_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ int idx, num, len, size = (int)count, level = RSH_LOG_INFO, rc; -+ u64 data; -+ -+ if (!size) -+ return -EINVAL; -+ -+ if (!rsh_semaphore || !rsh_scratch_buf_ctl) -+ return -EOPNOTSUPP; -+ -+ /* Ignore line break at the end. */ -+ if (buf[size-1] == 0xa) -+ size--; -+ -+ /* Check the message prefix. */ -+ for (idx = 0; idx < ARRAY_SIZE(rsh_log_level); idx++) { -+ len = strlen(rsh_log_level[idx]); -+ if (len + 1 < size && !strncmp(buf, rsh_log_level[idx], len)) { -+ buf += len + 1; -+ size -= len + 1; -+ level = idx; -+ break; -+ } -+ } -+ -+ /* Ignore leading spaces. */ -+ while (size > 0 && buf[0] == ' ') { -+ size--; -+ buf++; -+ } -+ -+ /* Take the semaphore. */ -+ rc = rsh_log_sem_lock(); -+ if (rc) -+ return rc; -+ -+ /* Calculate how many words are available. */ -+ num = (size + sizeof(u64) - 1) / sizeof(u64); -+ idx = readq(rsh_scratch_buf_ctl); -+ if (idx + num + 1 >= RSH_SCRATCH_BUF_CTL_IDX_MASK) -+ num = RSH_SCRATCH_BUF_CTL_IDX_MASK - idx - 1; -+ if (num <= 0) -+ goto done; -+ -+ /* Write Header. */ -+ data = (BF_RSH_LOG_TYPE_MSG << RSH_LOG_TYPE_SHIFT) | -+ ((u64)num << RSH_LOG_LEN_SHIFT) | -+ ((u64)level << RSH_LOG_LEVEL_SHIFT); -+ writeq(data, rsh_scratch_buf_data); -+ -+ /* Write message. */ -+ for (idx = 0, len = size; idx < num && len > 0; idx++) { -+ if (len <= sizeof(u64)) { -+ data = 0; -+ memcpy(&data, buf, len); -+ len = 0; -+ } else { -+ memcpy(&data, buf, sizeof(u64)); -+ len -= sizeof(u64); -+ buf += sizeof(u64); -+ } -+ writeq(data, rsh_scratch_buf_data); -+ } -+ -+done: -+ /* Release the semaphore. */ -+ rsh_log_sem_unlock(); -+ -+ /* Ignore the rest if no more space. */ -+ return count; -+} -+ -+static char *rsh_log_get_reg_name(u64 opcode) -+{ -+ struct rsh_log_reg *reg = rsh_log_regs; -+ -+ while (reg->name) { -+ if (reg->opcode == opcode) -+ return reg->name; -+ reg++; -+ } -+ -+ return "unknown"; -+} -+ -+static int rsh_log_show_crash(u64 hdr, char *buf, int size) -+{ -+ int i, module, type, len, n = 0; -+ u32 pc, syndrome, ec; -+ u64 opcode, data; -+ char *p = buf; -+ -+ module = BF_RSH_LOG_HEADER_GET(MOD, hdr); -+ if (module >= ARRAY_SIZE(rsh_log_mod)) -+ module = 0; -+ type = BF_RSH_LOG_HEADER_GET(TYPE, hdr); -+ len = BF_RSH_LOG_HEADER_GET(LEN, hdr); -+ -+ if (type == BF_RSH_LOG_TYPE_EXCEPTION) { -+ syndrome = BF_RSH_LOG_HEADER_GET(SYNDROME, hdr); -+ ec = syndrome >> AARCH64_ESR_ELX_EXCEPTION_CLASS_SHIFT; -+ n = snprintf(p, size, " Exception(%s): syndrome = 0x%x%s\n", -+ rsh_log_mod[module], syndrome, -+ (ec == 0x24 || ec == 0x25) ? "(Data Abort)" : -+ (ec == 0x2f) ? "(SError)" : ""); -+ } else if (type == BF_RSH_LOG_TYPE_PANIC) { -+ pc = BF_RSH_LOG_HEADER_GET(PC, hdr); -+ n = snprintf(p, size, -+ " PANIC(%s): PC = 0x%x\n", rsh_log_mod[module], -+ pc); -+ } -+ if (n > 0) { -+ p += n; -+ size -= n; -+ } - - /* -- * key_state contains the bits for 4 Key versions, loaded from eFuses -- * after a hard reset. Lower 4 bits are a thermometer code indicating -- * key programming has started for key n (0000 = none, 0001 = version 0, -- * 0011 = version 1, 0111 = version 2, 1111 = version 3). Upper 4 bits -- * are a thermometer code indicating key programming has completed for -- * key n (same encodings as the start bits). This allows for detection -- * of an interruption in the programming process which has left the key -- * partially programmed (and thus invalid). The process is to burn the -- * eFuse for the new key start bit, burn the key eFuses, then burn the -- * eFuse for the new key complete bit. -- * -- * For example 0000_0000: no key valid, 0001_0001: key version 0 valid, -- * 0011_0011: key 1 version valid, 0011_0111: key version 2 started -- * programming but did not complete, etc. The most recent key for which -- * both start and complete bit is set is loaded. On soft reset, this -- * register is not modified. -+ * Read the registers in a loop. 'len' is the total number of words in -+ * 8-bytes. Two words are read in each loop. - */ -- for (key = MLXBF_SB_KEY_NUM - 1; key >= 0; key--) { -- burnt = key_state & BIT(key); -- valid = key_state & BIT(key + MLXBF_SB_KEY_NUM); -+ for (i = 0; i < len/2; i++) { -+ opcode = readq(rsh_scratch_buf_data); -+ data = readq(rsh_scratch_buf_data); -+ -+ opcode = (opcode >> AARCH64_MRS_REG_SHIFT) & -+ AARCH64_MRS_REG_MASK; -+ n = snprintf(p, size, -+ " %-16s0x%llx\n", rsh_log_get_reg_name(opcode), -+ (unsigned long long)data); -+ if (n > 0) { -+ p += n; -+ size -= n; -+ } -+ } - -- if (burnt && valid) -- upper_key_used = 1; -+ return p - buf; -+} - -- if (upper_key_used) { -- if (burnt) -- status = valid ? "Used" : "Wasted"; -- else -- status = valid ? "Invalid" : "Skipped"; -- } else { -- if (burnt) -- status = valid ? "InUse" : "Incomplete"; -- else -- status = valid ? "Invalid" : "Free"; -+static int rsh_log_format_msg(char *buf, int size, const char *msg, ...) -+{ -+ va_list args; -+ int len; -+ -+ va_start(args, msg); -+ len = vsnprintf(buf, size, msg, args); -+ va_end(args); -+ -+ return len; -+} -+ -+static int rsh_log_show_msg(u64 hdr, char *buf, int size) -+{ -+ int has_arg = BF_RSH_LOG_HEADER_GET(HAS_ARG, hdr); -+ int level = BF_RSH_LOG_HEADER_GET(LEVEL, hdr); -+ int module = BF_RSH_LOG_HEADER_GET(MOD, hdr); -+ int len = BF_RSH_LOG_HEADER_GET(LEN, hdr); -+ u32 arg = BF_RSH_LOG_HEADER_GET(ARG, hdr); -+ char *msg, *p; -+ u64 data; -+ -+ if (len <= 0) -+ return -EINVAL; -+ -+ if (module >= ARRAY_SIZE(rsh_log_mod)) -+ module = 0; -+ -+ if (level >= ARRAY_SIZE(rsh_log_level)) -+ level = 0; -+ -+ msg = kmalloc(len * sizeof(u64) + 1, GFP_KERNEL); -+ if (!msg) -+ return 0; -+ p = msg; -+ -+ while (len--) { -+ data = readq(rsh_scratch_buf_data); -+ memcpy(p, &data, sizeof(data)); -+ p += sizeof(data); -+ } -+ *p = '\0'; -+ if (!has_arg) { -+ len = snprintf(buf, size, " %s[%s]: %s\n", rsh_log_level[level], -+ rsh_log_mod[module], msg); -+ } else { -+ len = snprintf(buf, size, " %s[%s]: ", rsh_log_level[level], -+ rsh_log_mod[module]); -+ len += rsh_log_format_msg(buf + len, size - len, msg, arg); -+ len += snprintf(buf + len, size - len, "\n"); -+ } -+ -+ kfree(msg); -+ return len; -+} -+ -+static ssize_t rsh_log_show(struct device_driver *drv, char *buf) -+{ -+ u64 hdr; -+ char *p = buf; -+ int i, n, rc, idx, type, len, size = PAGE_SIZE; -+ -+ if (!rsh_semaphore || !rsh_scratch_buf_ctl) -+ return -EOPNOTSUPP; -+ -+ /* Take the semaphore. */ -+ rc = rsh_log_sem_lock(); -+ if (rc) -+ return rc; -+ -+ /* Save the current index and read from 0. */ -+ idx = readq(rsh_scratch_buf_ctl) & RSH_SCRATCH_BUF_CTL_IDX_MASK; -+ if (!idx) -+ goto done; -+ writeq(0, rsh_scratch_buf_ctl); -+ -+ i = 0; -+ while (i < idx) { -+ hdr = readq(rsh_scratch_buf_data); -+ type = BF_RSH_LOG_HEADER_GET(TYPE, hdr); -+ len = BF_RSH_LOG_HEADER_GET(LEN, hdr); -+ i += 1 + len; -+ if (i > idx) -+ break; -+ -+ switch (type) { -+ case BF_RSH_LOG_TYPE_PANIC: -+ case BF_RSH_LOG_TYPE_EXCEPTION: -+ n = rsh_log_show_crash(hdr, p, size); -+ p += n; -+ size -= n; -+ break; -+ case BF_RSH_LOG_TYPE_MSG: -+ n = rsh_log_show_msg(hdr, p, size); -+ p += n; -+ size -= n; -+ break; -+ default: -+ /* Drain this message. */ -+ while (len--) -+ (void) readq(rsh_scratch_buf_data); -+ break; - } -- buf_len += sprintf(buf + buf_len, "%d:%s ", key, status); - } -- buf_len += sprintf(buf + buf_len, "\n"); - -- return buf_len; -+ if (rsh_log_clear_on_read) -+ writeq(0, rsh_scratch_buf_ctl); -+ else -+ writeq(idx, rsh_scratch_buf_ctl); -+ -+done: -+ /* Release the semaphore. */ -+ rsh_log_sem_unlock(); -+ -+ return p - buf; - } - --static DEVICE_ATTR_RW(post_reset_wdog); --static DEVICE_ATTR_RW(reset_action); --static DEVICE_ATTR_RW(second_reset_action); --static DEVICE_ATTR_RO(lifecycle_state); --static DEVICE_ATTR_RO(secure_boot_fuse_state); -+static DRIVER_ATTR_RW(post_reset_wdog); -+static DRIVER_ATTR_RW(reset_action); -+static DRIVER_ATTR_RW(second_reset_action); -+static DRIVER_ATTR_RO(lifecycle_state); -+static DRIVER_ATTR_RO(secure_boot_fuse_state); -+static DRIVER_ATTR_WO(fw_reset); -+static DRIVER_ATTR_RW(oob_mac); -+static DRIVER_ATTR_RW(opn); -+static DRIVER_ATTR_RW(sku); -+static DRIVER_ATTR_RW(modl); -+static DRIVER_ATTR_RW(sn); -+static DRIVER_ATTR_RW(uuid); -+static DRIVER_ATTR_RW(rev); -+static DRIVER_ATTR_WO(mfg_lock); -+static DRIVER_ATTR_RW(rsh_log); - --static struct attribute *mlxbf_bootctl_attrs[] = { -- &dev_attr_post_reset_wdog.attr, -- &dev_attr_reset_action.attr, -- &dev_attr_second_reset_action.attr, -- &dev_attr_lifecycle_state.attr, -- &dev_attr_secure_boot_fuse_state.attr, -+static struct attribute *mbc_dev_attrs[] = { -+ &driver_attr_post_reset_wdog.attr, -+ &driver_attr_reset_action.attr, -+ &driver_attr_second_reset_action.attr, -+ &driver_attr_lifecycle_state.attr, -+ &driver_attr_secure_boot_fuse_state.attr, -+ &driver_attr_fw_reset.attr, -+ &driver_attr_oob_mac.attr, -+ &driver_attr_opn.attr, -+ &driver_attr_sku.attr, -+ &driver_attr_modl.attr, -+ &driver_attr_sn.attr, -+ &driver_attr_uuid.attr, -+ &driver_attr_rev.attr, -+ &driver_attr_mfg_lock.attr, -+ &driver_attr_rsh_log.attr, - NULL - }; - --ATTRIBUTE_GROUPS(mlxbf_bootctl); -+static struct attribute_group mbc_attr_group = { -+ .attrs = mbc_dev_attrs -+}; - --static const struct acpi_device_id mlxbf_bootctl_acpi_ids[] = { -+static const struct attribute_group *mbc_attr_groups[] = { -+ &mbc_attr_group, -+ NULL -+}; -+ -+static const struct of_device_id mbc_dt_ids[] = { -+ {.compatible = "mellanox,bootctl"}, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, mbc_dt_ids); -+ -+static const struct acpi_device_id mbc_acpi_ids[] = { - {"MLNXBF04", 0}, -- {} -+ {}, - }; - --MODULE_DEVICE_TABLE(acpi, mlxbf_bootctl_acpi_ids); -+MODULE_DEVICE_TABLE(acpi, mbc_acpi_ids); - --static bool mlxbf_bootctl_guid_match(const guid_t *guid, -- const struct arm_smccc_res *res) -+static ssize_t mbc_bootfifo_read_raw(struct file *filp, struct kobject *kobj, -+ struct bin_attribute *bin_attr, -+ char *buf, loff_t pos, size_t count) - { -- guid_t id = GUID_INIT(res->a0, res->a1, res->a1 >> 16, -- res->a2, res->a2 >> 8, res->a2 >> 16, -- res->a2 >> 24, res->a3, res->a3 >> 8, -- res->a3 >> 16, res->a3 >> 24); -+ unsigned long timeout = jiffies + HZ / 2; -+ char *p = buf; -+ int cnt = 0; -+ u64 data; - -- return guid_equal(guid, &id); -+ /* Give up reading if no more data within 500ms. */ -+ while (count >= sizeof(data)) { -+ if (!cnt) { -+ cnt = readq(rsh_boot_cnt); -+ if (!cnt) { -+ if (time_after(jiffies, timeout)) -+ break; -+ udelay(10); -+ continue; -+ } -+ } -+ -+ data = readq(rsh_boot_data); -+ memcpy(p, &data, sizeof(data)); -+ count -= sizeof(data); -+ p += sizeof(data); -+ cnt--; -+ timeout = jiffies + HZ / 2; -+ } -+ -+ return p - buf; - } - --static int mlxbf_bootctl_probe(struct platform_device *pdev) -+static struct bin_attribute mbc_bootfifo_sysfs_attr = { -+ .attr = { .name = "bootfifo", .mode = 0400 }, -+ .read = mbc_bootfifo_read_raw, -+}; -+ -+static int mbc_probe(struct platform_device *pdev) - { -- struct arm_smccc_res res = { 0 }; -- guid_t guid; -- int ret; -+ struct resource *resource; -+ struct arm_smccc_res res; -+ void __iomem *data; -+ int err; - -- /* Ensure we have the UUID we expect for this service. */ -- arm_smccc_smc(MLXBF_BOOTCTL_SIP_SVC_UID, 0, 0, 0, 0, 0, 0, 0, &res); -- guid_parse(mlxbf_bootctl_svc_uuid_str, &guid); -- if (!mlxbf_bootctl_guid_match(&guid, &res)) -+ resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!resource) - return -ENODEV; -+ rsh_boot_data = devm_ioremap_resource(&pdev->dev, resource); -+ if (IS_ERR(rsh_boot_data)) -+ return PTR_ERR(rsh_boot_data); -+ -+ resource = platform_get_resource(pdev, IORESOURCE_MEM, 1); -+ if (!resource) -+ return -ENODEV; -+ rsh_boot_cnt = devm_ioremap_resource(&pdev->dev, resource); -+ if (IS_ERR(rsh_boot_cnt)) -+ return PTR_ERR(rsh_boot_cnt); -+ -+ resource = platform_get_resource(pdev, IORESOURCE_MEM, 2); -+ if (resource) { -+ data = devm_ioremap_resource(&pdev->dev, resource); -+ if (!IS_ERR(data)) -+ rsh_semaphore = data; -+ } -+ -+ resource = platform_get_resource(pdev, IORESOURCE_MEM, 3); -+ if (resource) { -+ data = devm_ioremap_resource(&pdev->dev, resource); -+ if (!IS_ERR(data)) { -+ rsh_scratch_buf_ctl = data + RSH_SCRATCH_BUF_CTL_OFF; -+ rsh_scratch_buf_data = data + RSH_SCRATCH_BUF_DATA_OFF; -+ } -+ } - - /* -- * When watchdog is used, it sets boot mode to MLXBF_BOOTCTL_SWAP_EMMC -+ * Ensure we have the UUID we expect for this service. -+ * Note that the functionality we want is present in the first -+ * released version of this service, so we don't check the version. -+ */ -+ arm_smccc_smc(MLNX_SIP_SVC_UID, 0, 0, 0, 0, 0, 0, 0, &res); -+ if (res.a0 != 0x89c036b4 || res.a1 != 0x11e6e7d7 || -+ res.a2 != 0x1a009787 || res.a3 != 0xc4bf00ca) -+ return -ENODEV; -+ -+ /* -+ * When watchdog is used, it sets the boot mode to MLNX_BOOT_SWAP_EMMC - * in case of boot failures. However it doesn't clear the state if there - * is no failure. Restore the default boot mode here to avoid any - * unnecessary boot partition swapping. - */ -- ret = mlxbf_bootctl_smc(MLXBF_BOOTCTL_SET_RESET_ACTION, -- MLXBF_BOOTCTL_EMMC); -- if (ret < 0) -- dev_warn(&pdev->dev, "Unable to reset the EMMC boot mode\n"); -+ if (smc_call1(MLNX_SET_RESET_ACTION, MLNX_BOOT_EMMC) < 0) -+ pr_err("Unable to reset the EMMC boot mode\n"); -+ -+ err = sysfs_create_bin_file(&pdev->dev.kobj, &mbc_bootfifo_sysfs_attr); -+ if (err) { -+ pr_err("Unable to create bootfifo sysfs file, error %d\n", err); -+ return err; -+ } -+ -+ pr_info("%s (version %s)\n", DRIVER_DESCRIPTION, DRIVER_VERSION); -+ -+ return 0; -+} -+ -+static int mbc_remove(struct platform_device *pdev) -+{ -+ sysfs_remove_bin_file(&pdev->dev.kobj, &mbc_bootfifo_sysfs_attr); - - return 0; - } - --static struct platform_driver mlxbf_bootctl_driver = { -- .probe = mlxbf_bootctl_probe, -+static struct platform_driver mbc_driver = { -+ .probe = mbc_probe, -+ .remove = mbc_remove, - .driver = { -- .name = "mlxbf-bootctl", -- .dev_groups = mlxbf_bootctl_groups, -- .acpi_match_table = mlxbf_bootctl_acpi_ids, -+ .name = DRIVER_NAME, -+ .groups = mbc_attr_groups, -+ .of_match_table = mbc_dt_ids, -+ .acpi_match_table = ACPI_PTR(mbc_acpi_ids), - } - }; - --module_platform_driver(mlxbf_bootctl_driver); -+module_platform_driver(mbc_driver); - --MODULE_DESCRIPTION("Mellanox boot control driver"); --MODULE_LICENSE("GPL v2"); --MODULE_AUTHOR("Mellanox Technologies"); -+MODULE_DESCRIPTION(DRIVER_DESCRIPTION); -+MODULE_VERSION(DRIVER_VERSION); -+MODULE_AUTHOR("Shravan Kumar Ramani "); -+MODULE_LICENSE("Dual BSD/GPL"); -diff --git a/drivers/platform/mellanox/mlxbf-bootctl.h b/drivers/platform/mellanox/mlxbf-bootctl.h -index 148fdb43b435..3e9dda829d6d 100644 ---- a/drivers/platform/mellanox/mlxbf-bootctl.h -+++ b/drivers/platform/mellanox/mlxbf-bootctl.h -@@ -1,11 +1,22 @@ --/* SPDX-License-Identifier: GPL-2.0 */ -+// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause - /* -- * Copyright (c) 2019, Mellanox Technologies. All rights reserved. -+ * Copyright (C) 2020 Mellanox Technologies. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License v2.0 as published by -+ * the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. - */ - - #ifndef __MLXBF_BOOTCTL_H__ - #define __MLXBF_BOOTCTL_H__ - -+/* BlueField-specific SMC function IDs */ -+ - /* - * Request that the on-chip watchdog be enabled, or disabled, after - * the next chip soft reset. This call does not affect the current -@@ -14,14 +25,14 @@ - * will not be enabled after the next soft reset. Non-zero errors are - * returned as documented below. - */ --#define MLXBF_BOOTCTL_SET_POST_RESET_WDOG 0x82000000 -+#define MLNX_SET_POST_RESET_WDOG 0x82000000 - - /* - * Query the status which has been requested for the on-chip watchdog - * after the next chip soft reset. Returns the interval as set by -- * MLXBF_BOOTCTL_SET_POST_RESET_WDOG. -+ * MLNX_SET_POST_RESET_WDOG. - */ --#define MLXBF_BOOTCTL_GET_POST_RESET_WDOG 0x82000001 -+#define MLNX_GET_POST_RESET_WDOG 0x82000001 - - /* - * Request that a specific boot action be taken at the next soft -@@ -32,72 +43,77 @@ - * invoked. See below for the available MLNX_BOOT_xxx parameter - * values. Non-zero errors are returned as documented below. - */ --#define MLXBF_BOOTCTL_SET_RESET_ACTION 0x82000002 -+#define MLNX_SET_RESET_ACTION 0x82000002 - - /* - * Return the specific boot action which will be taken at the next - * soft reset. Returns the reset action (see below for the parameter -- * values for MLXBF_BOOTCTL_SET_RESET_ACTION). -+ * values for MLNX_SET_RESET_ACTION). - */ --#define MLXBF_BOOTCTL_GET_RESET_ACTION 0x82000003 -+#define MLNX_GET_RESET_ACTION 0x82000003 - - /* - * Request that a specific boot action be taken at the soft reset - * after the next soft reset. For a specified valid boot mode, the - * effect of this call is identical to that of invoking -- * MLXBF_BOOTCTL_SET_RESET_ACTION after the next chip soft reset; in -+ * MLNX_SET_RESET_ACTION after the next chip soft reset; in - * particular, after that reset, the action for the now next reset can -- * be queried with MLXBF_BOOTCTL_GET_RESET_ACTION and modified with -- * MLXBF_BOOTCTL_SET_RESET_ACTION. You may also specify the parameter as -+ * be queried with MLNX_GET_RESET_ACTION and modified with -+ * MLNX_SET_RESET_ACTION. You may also specify the parameter as - * MLNX_BOOT_NONE, which is equivalent to specifying that no call to -- * MLXBF_BOOTCTL_SET_RESET_ACTION be taken after the next chip soft reset. -+ * MLNX_SET_RESET_ACTION be taken after the next chip soft reset. - * This call does not affect the action to be taken at the next soft - * reset. Non-zero errors are returned as documented below. - */ --#define MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION 0x82000004 -+#define MLNX_SET_SECOND_RESET_ACTION 0x82000004 - - /* - * Return the specific boot action which will be taken at the soft - * reset after the next soft reset; this will be one of the valid -- * actions for MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION. -+ * actions for MLNX_SET_SECOND_RESET_ACTION. - */ --#define MLXBF_BOOTCTL_GET_SECOND_RESET_ACTION 0x82000005 -+#define MLNX_GET_SECOND_RESET_ACTION 0x82000005 - - /* - * Return the fuse status of the current chip. The caller should specify - * with the second argument if the state of the lifecycle fuses or the - * version of secure boot fuse keys left should be returned. - */ --#define MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS 0x82000006 -+#define MLNX_GET_TBB_FUSE_STATUS 0x82000006 - --/* Reset eMMC by programming the RST_N register. */ --#define MLXBF_BOOTCTL_SET_EMMC_RST_N 0x82000007 -+/* -+ * Initiate Firmware Reset via TYU. This might be invoked during the reset -+ * flow in isolation mode. -+ */ -+#define MLNX_HANDLE_FW_RESET 0x8200000D - --#define MLXBF_BOOTCTL_GET_DIMM_INFO 0x82000008 -+/* -+ * SMC function IDs to set, get and reset the manufacturing information -+ * stored within the eeprom. -+ */ -+#define MLNX_HANDLE_SET_MFG_INFO 0x8200000E -+#define MLNX_HANDLE_GET_MFG_INFO 0x8200000F -+#define MLNX_HANDLE_LOCK_MFG_INFO 0x82000011 - - /* SMC function IDs for SiP Service queries */ --#define MLXBF_BOOTCTL_SIP_SVC_CALL_COUNT 0x8200ff00 --#define MLXBF_BOOTCTL_SIP_SVC_UID 0x8200ff01 --#define MLXBF_BOOTCTL_SIP_SVC_VERSION 0x8200ff03 -- --/* ARM Standard Service Calls version numbers */ --#define MLXBF_BOOTCTL_SVC_VERSION_MAJOR 0x0 --#define MLXBF_BOOTCTL_SVC_VERSION_MINOR 0x2 -+#define MLNX_SIP_SVC_CALL_COUNT 0x8200ff00 -+#define MLNX_SIP_SVC_UID 0x8200ff01 -+#define MLNX_SIP_SVC_VERSION 0x8200ff03 - - /* Number of svc calls defined. */ --#define MLXBF_BOOTCTL_NUM_SVC_CALLS 12 -+#define MLNX_NUM_SVC_CALLS 16 - --/* Valid reset actions for MLXBF_BOOTCTL_SET_RESET_ACTION. */ --#define MLXBF_BOOTCTL_EXTERNAL 0 /* Not boot from eMMC */ --#define MLXBF_BOOTCTL_EMMC 1 /* From primary eMMC boot partition */ --#define MLNX_BOOTCTL_SWAP_EMMC 2 /* Swap eMMC boot partitions and reboot */ --#define MLXBF_BOOTCTL_EMMC_LEGACY 3 /* From primary eMMC in legacy mode */ -+/* Valid reset actions for MLNX_SET_RESET_ACTION. */ -+#define MLNX_BOOT_EXTERNAL 0 /* Do not boot from eMMC */ -+#define MLNX_BOOT_EMMC 1 /* Boot from primary eMMC boot partition */ -+#define MLNX_BOOT_SWAP_EMMC 2 /* Swap eMMC boot partitions and reboot */ -+#define MLNX_BOOT_EMMC_LEGACY 3 /* Boot from primary eMMC in legacy mode */ - - /* Valid arguments for requesting the fuse status. */ --#define MLXBF_BOOTCTL_FUSE_STATUS_LIFECYCLE 0 /* Return lifecycle status. */ --#define MLXBF_BOOTCTL_FUSE_STATUS_KEYS 1 /* Return secure boot key status */ -+#define MLNX_FUSE_STATUS_LIFECYCLE 0 /* Return the lifecycle status. */ -+#define MLNX_FUSE_STATUS_KEYS 1 /* Return secure boot key status */ - --/* Additional value to disable the MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION. */ --#define MLXBF_BOOTCTL_NONE 0x7fffffff /* Don't change next boot action */ -+/* Additional parameter value to disable the MLNX_SET_SECOND_RESET_ACTION. */ -+#define MLNX_BOOT_NONE 0x7fffffff /* Don't change next boot action */ - - #endif /* __MLXBF_BOOTCTL_H__ */ --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch b/platform/mellanox/non-upstream-patches/patches/0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch deleted file mode 100644 index f46df5f9dd43..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0077-UBUNTU-SAUCE-mlx-bootctl-support-icm-carveout-eeprom.patch +++ /dev/null @@ -1,118 +0,0 @@ -From 61618188dadb1cc9b6708916e0e7a1c2e31d469d Mon Sep 17 00:00:00 2001 -From: Asmaa Mnebhi -Date: Mon, 31 Oct 2022 12:18:52 -0400 -Subject: [PATCH backport 6.1.42 77/85] UBUNTU: SAUCE: mlx-bootctl: support icm - carveout eeprom region read/write - -BugLink: https://bugs.launchpad.net/bugs/1995296 - -The BlueField-3 ICM carveout feature will enable NIC FW to bypass the SMMU block -to access DRAM memory. The amount of memory accessible by FW will be controlled by ARM. -This patch enables setting the size of the large ICM carveout from -userspace. The max size is 1TB, has a granularity of 128MB and will be passed -and printed in hex. The size unit is MB. - -Signed-off-by: Asmaa Mnebhi -Acked-by: Tim Gardner -Acked-by: Cory Todd -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/mlxbf-bootctl.c | 40 +++++++++++++++++++++++ - drivers/platform/mellanox/mlxbf-bootctl.h | 9 +++++ - 2 files changed, 49 insertions(+) - -diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c -index 2302e1e09c7e..e8877a19dda9 100644 ---- a/drivers/platform/mellanox/mlxbf-bootctl.c -+++ b/drivers/platform/mellanox/mlxbf-bootctl.c -@@ -104,6 +104,7 @@ enum { - - /* This mutex is used to serialize MFG write and lock operations. */ - static DEFINE_MUTEX(mfg_ops_lock); -+static DEFINE_MUTEX(icm_ops_lock); - - #define MLNX_MFG_OOB_MAC_LEN ETH_ALEN - #define MLNX_MFG_OPN_VAL_LEN 24 -@@ -383,6 +384,43 @@ static ssize_t oob_mac_store(struct device_driver *drv, const char *buf, - return res.a0 ? -EPERM : count; - } - -+static ssize_t large_icm_show(struct device_driver *drv, char *buf) -+{ -+ char icm_str[MAX_ICM_BUFFER_SIZE] = { 0 }; -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(MLNX_HANDLE_GET_ICM_INFO, 0, 0, 0, 0, -+ 0, 0, 0, &res); -+ if (res.a0) -+ return -EPERM; -+ -+ sprintf(icm_str, "0x%lx", res.a1); -+ -+ return snprintf(buf, sizeof(icm_str), "%s", icm_str); -+} -+ -+static ssize_t large_icm_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ struct arm_smccc_res res; -+ unsigned long icm_data; -+ int err; -+ -+ err = kstrtoul(buf, 16, &icm_data); -+ if (err) -+ return err; -+ -+ if (((icm_data != 0) && (icm_data < 0x80)) || -+ (icm_data > 0x100000) || (icm_data % 128)) -+ return -EPERM; -+ -+ mutex_lock(&icm_ops_lock); -+ arm_smccc_smc(MLNX_HANDLE_SET_ICM_INFO, icm_data, 0, 0, 0, 0, 0, 0, &res); -+ mutex_unlock(&icm_ops_lock); -+ -+ return res.a0 ? -EPERM : count; -+} -+ - static ssize_t opn_show(struct device_driver *drv, char *buf) - { - u64 opn_data[MLNX_MFG_VAL_QWORD_CNT(OPN)] = { 0 }; -@@ -1170,6 +1208,7 @@ static DRIVER_ATTR_RW(uuid); - static DRIVER_ATTR_RW(rev); - static DRIVER_ATTR_WO(mfg_lock); - static DRIVER_ATTR_RW(rsh_log); -+static DRIVER_ATTR_RW(large_icm); - - static struct attribute *mbc_dev_attrs[] = { - &driver_attr_post_reset_wdog.attr, -@@ -1187,6 +1226,7 @@ static struct attribute *mbc_dev_attrs[] = { - &driver_attr_rev.attr, - &driver_attr_mfg_lock.attr, - &driver_attr_rsh_log.attr, -+ &driver_attr_large_icm.attr, - NULL - }; - -diff --git a/drivers/platform/mellanox/mlxbf-bootctl.h b/drivers/platform/mellanox/mlxbf-bootctl.h -index 3e9dda829d6d..c70204770af3 100644 ---- a/drivers/platform/mellanox/mlxbf-bootctl.h -+++ b/drivers/platform/mellanox/mlxbf-bootctl.h -@@ -95,6 +95,15 @@ - #define MLNX_HANDLE_GET_MFG_INFO 0x8200000F - #define MLNX_HANDLE_LOCK_MFG_INFO 0x82000011 - -+/* -+ * SMC function IDs to set and get the large ICM carveout size -+ * stored in the eeprom. -+ */ -+#define MLNX_HANDLE_SET_ICM_INFO 0x82000012 -+#define MLNX_HANDLE_GET_ICM_INFO 0x82000013 -+ -+#define MAX_ICM_BUFFER_SIZE 10 -+ - /* SMC function IDs for SiP Service queries */ - #define MLNX_SIP_SVC_CALL_COUNT 0x8200ff00 - #define MLNX_SIP_SVC_UID 0x8200ff01 --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch b/platform/mellanox/non-upstream-patches/patches/0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch deleted file mode 100644 index 94cc1d37bb56..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0078-UBUNTU-SAUCE-mlxbf-bootctl-support-SMC-call-for-sett.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 63f46d5beb56293f64ebb39f94a005acbe381f25 Mon Sep 17 00:00:00 2001 -From: Asmaa Mnebhi -Date: Thu, 30 Mar 2023 14:42:33 -0400 -Subject: [PATCH backport 6.1.42 78/85] UBUNTU: SAUCE: mlxbf-bootctl: support - SMC call for setting ARM boot state - -BugLink: https://bugs.launchpad.net/bugs/2013383 - -Add a new SMC call which allows setting the ARM boot progress state to "OS is up". - -Signed-off-by: Asmaa Mnebhi -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/mlxbf-bootctl.c | 23 +++++++++++++++++++++++ - drivers/platform/mellanox/mlxbf-bootctl.h | 5 +++++ - 2 files changed, 28 insertions(+) - -diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c -index e8877a19dda9..a68bf5b27013 100644 ---- a/drivers/platform/mellanox/mlxbf-bootctl.c -+++ b/drivers/platform/mellanox/mlxbf-bootctl.c -@@ -105,6 +105,7 @@ enum { - /* This mutex is used to serialize MFG write and lock operations. */ - static DEFINE_MUTEX(mfg_ops_lock); - static DEFINE_MUTEX(icm_ops_lock); -+static DEFINE_MUTEX(os_up_lock); - - #define MLNX_MFG_OOB_MAC_LEN ETH_ALEN - #define MLNX_MFG_OPN_VAL_LEN 24 -@@ -747,6 +748,26 @@ static ssize_t mfg_lock_store(struct device_driver *drv, const char *buf, - return count; - } - -+static ssize_t os_up_store(struct device_driver *drv, const char *buf, -+ size_t count) -+{ -+ unsigned long val; -+ int err; -+ -+ err = kstrtoul(buf, 10, &val); -+ if (err) -+ return err; -+ -+ if (val != 1) -+ return -EINVAL; -+ -+ mutex_lock(&os_up_lock); -+ smc_call0(MLNX_HANDLE_OS_UP); -+ mutex_unlock(&os_up_lock); -+ -+ return count; -+} -+ - /* Log header format. */ - #define RSH_LOG_TYPE_SHIFT 56 - #define RSH_LOG_LEN_SHIFT 48 -@@ -1209,6 +1230,7 @@ static DRIVER_ATTR_RW(rev); - static DRIVER_ATTR_WO(mfg_lock); - static DRIVER_ATTR_RW(rsh_log); - static DRIVER_ATTR_RW(large_icm); -+static DRIVER_ATTR_WO(os_up); - - static struct attribute *mbc_dev_attrs[] = { - &driver_attr_post_reset_wdog.attr, -@@ -1227,6 +1249,7 @@ static struct attribute *mbc_dev_attrs[] = { - &driver_attr_mfg_lock.attr, - &driver_attr_rsh_log.attr, - &driver_attr_large_icm.attr, -+ &driver_attr_os_up.attr, - NULL - }; - -diff --git a/drivers/platform/mellanox/mlxbf-bootctl.h b/drivers/platform/mellanox/mlxbf-bootctl.h -index c70204770af3..dc73f7e88914 100644 ---- a/drivers/platform/mellanox/mlxbf-bootctl.h -+++ b/drivers/platform/mellanox/mlxbf-bootctl.h -@@ -102,6 +102,11 @@ - #define MLNX_HANDLE_SET_ICM_INFO 0x82000012 - #define MLNX_HANDLE_GET_ICM_INFO 0x82000013 - -+/* -+ * SMC function ID to set the ARM boot state to up -+ */ -+#define MLNX_HANDLE_OS_UP 0x82000014 -+ - #define MAX_ICM_BUFFER_SIZE 10 - - /* SMC function IDs for SiP Service queries */ --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch b/platform/mellanox/non-upstream-patches/patches/0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch deleted file mode 100644 index 1b7f14260bc1..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0079-UBUNTU-SAUCE-mlxbf-ptm-power-and-thermal-management-.patch +++ /dev/null @@ -1,281 +0,0 @@ -From 2734b1f7ca9acafd126706be280844d962e1b368 Mon Sep 17 00:00:00 2001 -From: Jitendra Lanka -Date: Mon, 16 Jan 2023 11:39:34 -0500 -Subject: [PATCH backport 6.1.42 79/85] UBUNTU: SAUCE: mlxbf-ptm: power and - thermal management debugfs driver - -BugLink: https://bugs.launchpad.net/bugs/2002852 - -mlxbf-ptm driver implements debugfs interface for Bluefield -devices power and thermal management. It provides some parameters -that can be monitored by system software. - -Signed-off-by: Jitendra Lanka -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/Kconfig | 10 ++ - drivers/platform/mellanox/Makefile | 1 + - drivers/platform/mellanox/mlxbf-ptm.c | 216 ++++++++++++++++++++++++++ - 3 files changed, 227 insertions(+) - create mode 100644 drivers/platform/mellanox/mlxbf-ptm.c - -diff --git a/drivers/platform/mellanox/Kconfig b/drivers/platform/mellanox/Kconfig -index 70b628834b4f..75efd345b22e 100644 ---- a/drivers/platform/mellanox/Kconfig -+++ b/drivers/platform/mellanox/Kconfig -@@ -90,6 +90,16 @@ config MLXBF_PMC - to performance monitoring counters within various blocks in the - Mellanox BlueField SoC via a sysfs interface. - -+config MLXBF_PTM -+ tristate "BlueField Power and Thermal Management debugfs interface" -+ depends on ARM64 -+ depends on DEBUG_FS -+ help -+ If you say yes to this option, support will added for the -+ mlxbf-ptm driver. This driver provides debugfs interface -+ to userspace with information related to power and thermal -+ management of the Bluefield device. -+ - config NVSW_SN2201 - tristate "Nvidia SN2201 platform driver support" - depends on HWMON -diff --git a/drivers/platform/mellanox/Makefile b/drivers/platform/mellanox/Makefile -index ba56485cbe8c..d7f4d940c505 100644 ---- a/drivers/platform/mellanox/Makefile -+++ b/drivers/platform/mellanox/Makefile -@@ -7,6 +7,7 @@ obj-$(CONFIG_MLX_PLATFORM) += mlx-platform.o - obj-$(CONFIG_MLXBF_BOOTCTL) += mlxbf-bootctl.o - obj-$(CONFIG_MLXBF_PMC) += mlxbf-pmc.o - obj-$(CONFIG_MLXBF_TMFIFO) += mlxbf-tmfifo.o -+obj-$(CONFIG_MLXBF_PTM) += mlxbf-ptm.o - obj-$(CONFIG_MLXREG_HOTPLUG) += mlxreg-hotplug.o - obj-$(CONFIG_MLXREG_IO) += mlxreg-io.o - obj-$(CONFIG_MLXREG_LC) += mlxreg-lc.o -diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c -new file mode 100644 -index 000000000000..3692018b9d60 ---- /dev/null -+++ b/drivers/platform/mellanox/mlxbf-ptm.c -@@ -0,0 +1,216 @@ -+// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause -+/* -+ * Nvidia Bluefield power and thermal debugfs driver -+ * This driver provides a debugfs interface for systems management -+ * software to monitor power and thermal actions. -+ * -+ * Copyright (C) 2023 NVIDIA Corporation. All rights reserved. -+ * This Software is licensed under one of the following licenses: -+ * -+ * 1) under the terms of the "Common Public License 1.0" a copy of which is -+ * available from the Open Source Initiative, see -+ * http://www.opensource.org/licenses/cpl.php. -+ * -+ * 2) under the terms of the "The BSD License" a copy of which is -+ * available from the Open Source Initiative, see -+ * http://www.opensource.org/licenses/bsd-license.php. -+ * -+ * 3) under the terms of the "GNU General Public License (GPL) Version 2" a -+ * copy of which is available from the Open Source Initiative, see -+ * http://www.opensource.org/licenses/gpl-license.php. -+ * -+ * Licensee has the right to choose one of the above licenses. -+ * -+ * Redistributions of source code must retain the above copyright -+ * notice and one of the license notices. -+ * -+ * Redistributions in binary form must reproduce both the above copyright -+ * notice, one of the license notices in the documentation -+ * and/or other materials provided with the distribution. -+ */ -+ -+#include -+#include -+#include -+#include -+ -+/* SMC IDs */ -+#define MLNX_PTM_GET_VR0_POWER 0x82000101 -+#define MLNX_PTM_GET_VR1_POWER 0x82000102 -+#define MLNX_PTM_GET_THROTTLE_STATE 0x82000103 -+#define MLNX_PTM_GET_DDR_THLD 0x82000104 -+#define MLNX_PTM_GET_STATUS_REG 0x82000105 -+#define MLNX_PTM_GET_PTHROTTLE 0x82000106 -+#define MLNX_PTM_GET_TTHROTTLE 0x82000107 -+#define MLNX_PTM_GET_MAX_TEMP 0x82000108 -+#define MLNX_PTM_GET_PWR_EVT_CNT 0x82000109 -+#define MLNX_PTM_GET_TEMP_EVT_CNT 0x8200010A -+ -+#define MLNX_POWER_ERROR 300 -+ -+struct dentry *monitors; -+ -+static int smc_call1(unsigned int smc_op, int smc_arg) -+{ -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(smc_op, smc_arg, 0, 0, 0, 0, 0, 0, &res); -+ -+ return res.a0; -+} -+ -+#define smc_call0(smc_op) smc_call1(smc_op, 0) -+ -+static int throttling_state_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_THROTTLE_STATE); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(throttling_state_fops, -+ throttling_state_show, NULL, "%llu\n"); -+ -+static int pthrottling_state_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_PTHROTTLE); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(pthrottling_state_fops, -+ pthrottling_state_show, NULL, "%llu\n"); -+ -+static int tthrottling_state_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_TTHROTTLE); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(tthrottling_state_fops, -+ tthrottling_state_show, NULL, "%llu\n"); -+ -+static int core_temp_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_MAX_TEMP); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(core_temp_fops, -+ core_temp_show, NULL, "%lld\n"); -+ -+static int pwr_evt_counter_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_PWR_EVT_CNT); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(pwr_evt_counter_fops, -+ pwr_evt_counter_show, NULL, "%llu\n"); -+ -+static int temp_evt_counter_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_TEMP_EVT_CNT); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(temp_evt_counter_fops, -+ temp_evt_counter_show, NULL, "%llu\n"); -+ -+static int vr0_power_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_VR0_POWER); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(vr0_power_fops, vr0_power_show, NULL, "%llu\n"); -+ -+static int vr1_power_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_VR1_POWER); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(vr1_power_fops, vr1_power_show, NULL, "%llu\n"); -+ -+static int total_power_show(void *data, u64 *val) -+{ -+ u64 v0, v1; -+ -+ v0 = smc_call0(MLNX_PTM_GET_VR0_POWER); -+ if (v0 > MLNX_POWER_ERROR) -+ v0 = 0; -+ v1 = smc_call0(MLNX_PTM_GET_VR1_POWER); -+ if (v1 > MLNX_POWER_ERROR) -+ v1 = 0; -+ *val = (v0 + v1); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(total_power_fops, total_power_show, NULL, "%llu\n"); -+ -+static int ddr_thld_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_DDR_THLD); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(ddr_thld_fops, ddr_thld_show, NULL, "%llu\n"); -+ -+static int error_status_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_STATUS_REG); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(error_status_fops, -+ error_status_show, NULL, "%llu\n"); -+ -+ -+static int __init mlxbf_ptm_init(void) -+{ -+ struct dentry *ptm_root, *status; -+ -+ ptm_root = debugfs_lookup("mlxbf-ptm", NULL); -+ if (!ptm_root) -+ ptm_root = debugfs_create_dir("mlxbf-ptm", NULL); -+ -+ monitors = debugfs_create_dir("monitors", ptm_root); -+ status = debugfs_create_dir("status", monitors); -+ -+ debugfs_create_file("vr0_power", S_IRUGO, status, NULL, -+ &vr0_power_fops); -+ debugfs_create_file("vr1_power", S_IRUGO, status, NULL, -+ &vr1_power_fops); -+ debugfs_create_file("total_power", S_IRUGO, status, NULL, -+ &total_power_fops); -+ debugfs_create_file("ddr_temp", S_IRUGO, status, -+ NULL, &ddr_thld_fops); -+ debugfs_create_file("core_temp", S_IRUGO, status, -+ NULL, &core_temp_fops); -+ debugfs_create_file("power_throttling_event_count", S_IRUGO, status, -+ NULL, &pwr_evt_counter_fops); -+ debugfs_create_file("thermal_throttling_event_count", S_IRUGO, status, -+ NULL, &temp_evt_counter_fops); -+ debugfs_create_file("throttling_state", S_IRUGO, status, -+ NULL, &throttling_state_fops); -+ debugfs_create_file("power_throttling_state", S_IRUGO, status, -+ NULL, &pthrottling_state_fops); -+ debugfs_create_file("thermal_throttling_state", S_IRUGO, status, -+ NULL, &tthrottling_state_fops); -+ debugfs_create_file("error_state", S_IRUGO, status, -+ NULL, &error_status_fops); -+ -+ return 0; -+} -+ -+static void __exit mlxbf_ptm_exit(void) -+{ -+ debugfs_remove_recursive(monitors); -+} -+ -+module_init(mlxbf_ptm_init); -+module_exit(mlxbf_ptm_exit); -+ -+MODULE_AUTHOR("Jitendra Lanka "); -+MODULE_DESCRIPTION("Nvidia Bluefield power and thermal debugfs driver"); -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_VERSION("1.0"); --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch b/platform/mellanox/non-upstream-patches/patches/0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch deleted file mode 100644 index d2d604bb3a86..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0080-UBUNTU-SAUCE-mlxbf-ptm-update-license.patch +++ /dev/null @@ -1,60 +0,0 @@ -From d6703416953dd1c3fe6e84a76c6d85a73fcbdc4b Mon Sep 17 00:00:00 2001 -From: Jitendra Lanka -Date: Wed, 22 Mar 2023 11:39:54 -0400 -Subject: [PATCH backport 6.1.42 80/85] UBUNTU: SAUCE: mlxbf-ptm: update - license - -BugLink: https://bugs.launchpad.net/bugs/2011738 - -Update license - -Signed-off-by: Jitendra Lanka -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/mlxbf-ptm.c | 26 ++------------------------ - 1 file changed, 2 insertions(+), 24 deletions(-) - -diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c -index 3692018b9d60..79c3e2902070 100644 ---- a/drivers/platform/mellanox/mlxbf-ptm.c -+++ b/drivers/platform/mellanox/mlxbf-ptm.c -@@ -1,32 +1,10 @@ - // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause - /* -+ * Copyright (C) 2023 NVIDIA Corporation & Affiliates. -+ * - * Nvidia Bluefield power and thermal debugfs driver - * This driver provides a debugfs interface for systems management - * software to monitor power and thermal actions. -- * -- * Copyright (C) 2023 NVIDIA Corporation. All rights reserved. -- * This Software is licensed under one of the following licenses: -- * -- * 1) under the terms of the "Common Public License 1.0" a copy of which is -- * available from the Open Source Initiative, see -- * http://www.opensource.org/licenses/cpl.php. -- * -- * 2) under the terms of the "The BSD License" a copy of which is -- * available from the Open Source Initiative, see -- * http://www.opensource.org/licenses/bsd-license.php. -- * -- * 3) under the terms of the "GNU General Public License (GPL) Version 2" a -- * copy of which is available from the Open Source Initiative, see -- * http://www.opensource.org/licenses/gpl-license.php. -- * -- * Licensee has the right to choose one of the above licenses. -- * -- * Redistributions of source code must retain the above copyright -- * notice and one of the license notices. -- * -- * Redistributions in binary form must reproduce both the above copyright -- * notice, one of the license notices in the documentation -- * and/or other materials provided with the distribution. - */ - - #include --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch b/platform/mellanox/non-upstream-patches/patches/0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch deleted file mode 100644 index c9816d481c8b..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0081-UBUNTU-SAUCE-mlxbf-ptm-use-0444-instead-of-S_IRUGO.patch +++ /dev/null @@ -1,64 +0,0 @@ -From c3c93684288a230ebf63ca8e07cc420db07d5f89 Mon Sep 17 00:00:00 2001 -From: Jitendra Lanka -Date: Wed, 22 Mar 2023 11:39:55 -0400 -Subject: [PATCH backport 6.1.42 81/85] UBUNTU: SAUCE: mlxbf-ptm: use 0444 - instead of S_IRUGO - -BugLink: https://bugs.launchpad.net/bugs/2011738 - -As recommended by checkscript, change S_IRUGO to 0444 - -Signed-off-by: Jitendra Lanka -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/mlxbf-ptm.c | 22 +++++++++++----------- - 1 file changed, 11 insertions(+), 11 deletions(-) - -diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c -index 79c3e2902070..aeb68dc42e32 100644 ---- a/drivers/platform/mellanox/mlxbf-ptm.c -+++ b/drivers/platform/mellanox/mlxbf-ptm.c -@@ -154,27 +154,27 @@ static int __init mlxbf_ptm_init(void) - monitors = debugfs_create_dir("monitors", ptm_root); - status = debugfs_create_dir("status", monitors); - -- debugfs_create_file("vr0_power", S_IRUGO, status, NULL, -+ debugfs_create_file("vr0_power", 0444, status, NULL, - &vr0_power_fops); -- debugfs_create_file("vr1_power", S_IRUGO, status, NULL, -+ debugfs_create_file("vr1_power", 0444, status, NULL, - &vr1_power_fops); -- debugfs_create_file("total_power", S_IRUGO, status, NULL, -+ debugfs_create_file("total_power", 0444, status, NULL, - &total_power_fops); -- debugfs_create_file("ddr_temp", S_IRUGO, status, -+ debugfs_create_file("ddr_temp", 0444, status, - NULL, &ddr_thld_fops); -- debugfs_create_file("core_temp", S_IRUGO, status, -+ debugfs_create_file("core_temp", 0444, status, - NULL, &core_temp_fops); -- debugfs_create_file("power_throttling_event_count", S_IRUGO, status, -+ debugfs_create_file("power_throttling_event_count", 0444, status, - NULL, &pwr_evt_counter_fops); -- debugfs_create_file("thermal_throttling_event_count", S_IRUGO, status, -+ debugfs_create_file("thermal_throttling_event_count", 0444, status, - NULL, &temp_evt_counter_fops); -- debugfs_create_file("throttling_state", S_IRUGO, status, -+ debugfs_create_file("throttling_state", 0444, status, - NULL, &throttling_state_fops); -- debugfs_create_file("power_throttling_state", S_IRUGO, status, -+ debugfs_create_file("power_throttling_state", 0444, status, - NULL, &pthrottling_state_fops); -- debugfs_create_file("thermal_throttling_state", S_IRUGO, status, -+ debugfs_create_file("thermal_throttling_state", 0444, status, - NULL, &tthrottling_state_fops); -- debugfs_create_file("error_state", S_IRUGO, status, -+ debugfs_create_file("error_state", 0444, status, - NULL, &error_status_fops); - - return 0; --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch b/platform/mellanox/non-upstream-patches/patches/0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch deleted file mode 100644 index 2fbe1b9a843d..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0082-UBUNTU-SAUCE-mlxbf-ptm-add-atx-debugfs-nodes.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 82305cf0e95a8c711cbcb9f74193c5a2fe62f6fa Mon Sep 17 00:00:00 2001 -From: Jitendra Lanka -Date: Wed, 22 Mar 2023 11:39:56 -0400 -Subject: [PATCH backport 6.1.42 82/85] UBUNTU: SAUCE: mlxbf-ptm: add atx - debugfs nodes - -BugLink: https://bugs.launchpad.net/bugs/2011738 - -Add additional debugfs nodes that provide ATX status and -power profile data. - -Signed-off-by: Jitendra Lanka -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/mlxbf-ptm.c | 36 +++++++++++++++++++++++++++ - 1 file changed, 36 insertions(+) - -diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c -index aeb68dc42e32..a2845aa57c5b 100644 ---- a/drivers/platform/mellanox/mlxbf-ptm.c -+++ b/drivers/platform/mellanox/mlxbf-ptm.c -@@ -23,6 +23,9 @@ - #define MLNX_PTM_GET_MAX_TEMP 0x82000108 - #define MLNX_PTM_GET_PWR_EVT_CNT 0x82000109 - #define MLNX_PTM_GET_TEMP_EVT_CNT 0x8200010A -+#define MLNX_PTM_GET_POWER_ENVELOPE 0x8200010B -+#define MLNX_PTM_GET_ATX_PWR_STATE 0x8200010C -+#define MLNX_PTM_GET_CUR_PPROFILE 0x8200010D - - #define MLNX_POWER_ERROR 300 - -@@ -142,6 +145,33 @@ static int error_status_show(void *data, u64 *val) - DEFINE_SIMPLE_ATTRIBUTE(error_status_fops, - error_status_show, NULL, "%llu\n"); - -+static int power_envelope_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_POWER_ENVELOPE); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(power_envelope_fops, -+ power_envelope_show, NULL, "%llu\n"); -+ -+static int atx_status_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_ATX_PWR_STATE); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(atx_status_fops, -+ atx_status_show, NULL, "%lld\n"); -+ -+static int current_pprofile_show(void *data, u64 *val) -+{ -+ *val = smc_call0(MLNX_PTM_GET_CUR_PPROFILE); -+ -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(current_pprofile_fops, -+ current_pprofile_show, NULL, "%llu\n"); -+ - - static int __init mlxbf_ptm_init(void) - { -@@ -176,6 +206,12 @@ static int __init mlxbf_ptm_init(void) - NULL, &tthrottling_state_fops); - debugfs_create_file("error_state", 0444, status, - NULL, &error_status_fops); -+ debugfs_create_file("power_envelope", 0444, status, -+ NULL, &power_envelope_fops); -+ debugfs_create_file("atx_power_available", 0444, status, -+ NULL, &atx_status_fops); -+ debugfs_create_file("active_power_profile", 0444, status, -+ NULL, ¤t_pprofile_fops); - - return 0; - } --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch b/platform/mellanox/non-upstream-patches/patches/0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch deleted file mode 100644 index 4498da412ef8..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0083-UBUNTU-SAUCE-mlxbf-ptm-update-module-version.patch +++ /dev/null @@ -1,31 +0,0 @@ -From efaf25dc1e11de91140b9010e743182bc763124c Mon Sep 17 00:00:00 2001 -From: Jitendra Lanka -Date: Wed, 22 Mar 2023 11:39:57 -0400 -Subject: [PATCH backport 6.1.42 83/85] UBUNTU: SAUCE: mlxbf-ptm: update module - version - -BugLink: https://bugs.launchpad.net/bugs/2011738 - -update module version - -Signed-off-by: Jitendra Lanka -Acked-by: Tim Gardner -Acked-by: Bartlomiej Zolnierkiewicz -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/mlxbf-ptm.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/platform/mellanox/mlxbf-ptm.c b/drivers/platform/mellanox/mlxbf-ptm.c -index a2845aa57c5b..eb4460cb058b 100644 ---- a/drivers/platform/mellanox/mlxbf-ptm.c -+++ b/drivers/platform/mellanox/mlxbf-ptm.c -@@ -227,4 +227,4 @@ module_exit(mlxbf_ptm_exit); - MODULE_AUTHOR("Jitendra Lanka "); - MODULE_DESCRIPTION("Nvidia Bluefield power and thermal debugfs driver"); - MODULE_LICENSE("Dual BSD/GPL"); --MODULE_VERSION("1.0"); -+MODULE_VERSION("1.1"); --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch b/platform/mellanox/non-upstream-patches/patches/0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch deleted file mode 100644 index 433d88f1363a..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/0084-UBUNTU-SAUCE-mlxbf-bootctl-Fix-kernel-panic-due-to-b.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 9c9944b7c98fc61161c204b7ef397a3ac05977ba Mon Sep 17 00:00:00 2001 -From: Asmaa Mnebhi -Date: Thu, 20 Jul 2023 16:37:37 -0400 -Subject: [PATCH backport 6.1.42 13/20] UBUNTU: SAUCE: mlxbf-bootctl: Fix - kernel panic due to buffer overflow - -BugLink: https://bugs.launchpad.net/bugs/2028309 - -Running the following LTP (linux-test-project) script, causes -a kernel panic and a reboot of the DPU: -ltp/testcases/bin/read_all -d /sys -q -r 10 - -The above test reads all directory and files under /sys. -Reading the sysfs entry "large_icm" causes the kernel panic -due to a garbage value returned via i2c read. That garbage -value causes a buffer overflow in sprintf. - -Replace sprintf with snprintf. And also add missing lock and -increase the buffer size to PAGE_SIZE. - -Signed-off-by: Asmaa Mnebhi -Acked-by: Bartlomiej Zolnierkiewicz -Acked-by: Tim Gardner -Signed-off-by: Bartlomiej Zolnierkiewicz ---- - drivers/platform/mellanox/mlxbf-bootctl.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - -diff --git a/drivers/platform/mellanox/mlxbf-bootctl.c b/drivers/platform/mellanox/mlxbf-bootctl.c -index a68bf5b27013..52666ee360b2 100644 ---- a/drivers/platform/mellanox/mlxbf-bootctl.c -+++ b/drivers/platform/mellanox/mlxbf-bootctl.c -@@ -387,17 +387,16 @@ static ssize_t oob_mac_store(struct device_driver *drv, const char *buf, - - static ssize_t large_icm_show(struct device_driver *drv, char *buf) - { -- char icm_str[MAX_ICM_BUFFER_SIZE] = { 0 }; - struct arm_smccc_res res; - -+ mutex_lock(&icm_ops_lock); - arm_smccc_smc(MLNX_HANDLE_GET_ICM_INFO, 0, 0, 0, 0, - 0, 0, 0, &res); -+ mutex_unlock(&icm_ops_lock); - if (res.a0) - return -EPERM; - -- sprintf(icm_str, "0x%lx", res.a1); -- -- return snprintf(buf, sizeof(icm_str), "%s", icm_str); -+ return snprintf(buf, PAGE_SIZE, "0x%lx", res.a1); - } - - static ssize_t large_icm_store(struct device_driver *drv, const char *buf, --- -2.25.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch b/platform/mellanox/non-upstream-patches/patches/8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch deleted file mode 100644 index ba8f2fd77720..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/8000-mlxsw-Use-weak-reverse-dependencies-for-firmware-fla.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 646a7ca330eddb18e915380c9e8296a8cbce3c81 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Wed, 20 Oct 2021 09:49:28 +0000 -Subject: [PATCH backport 6.1.42 40/85] mlxsw: Use weak reverse dependencies - for firmware flashing selection - -Replace configuration options "select" by "imply". It allows to set -'MLXFW' symbol to 'n' from a direct dependency or with a visible -prompt. - -User might wish to disable this option in case only 'mlxsw_minimal' is -configured, since it does not support firmware flashing. - -Signed-off-by: Vadim Pasternak ---- - drivers/net/ethernet/mellanox/mlxsw/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/Kconfig b/drivers/net/ethernet/mellanox/mlxsw/Kconfig -index a510bf2cff2f..efc7ec8fa33c 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/Kconfig -+++ b/drivers/net/ethernet/mellanox/mlxsw/Kconfig -@@ -6,7 +6,7 @@ - config MLXSW_CORE - tristate "Mellanox Technologies Switch ASICs support" - select NET_DEVLINK -- select MLXFW -+ imply MLXFW - select AUXILIARY_BUS - help - This driver supports Mellanox Technologies Switch ASICs family. --- -2.20.1 - diff --git a/platform/mellanox/non-upstream-patches/patches/8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch b/platform/mellanox/non-upstream-patches/patches/8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch deleted file mode 100644 index 3a220713e0ff..000000000000 --- a/platform/mellanox/non-upstream-patches/patches/8004-mlxsw-minimal-Downstream-Ignore-error-reading-SPAD-r.patch +++ /dev/null @@ -1,36 +0,0 @@ -From a742d55ed36a0bd3b6346563665b951dad9ad469 Mon Sep 17 00:00:00 2001 -From: root -Date: Tue, 5 Apr 2022 21:35:55 +0300 -Subject: [PATH backport v6.1 2/3] mlxsw: minimal: Downstream: Ignore error - reading SPAD register - -SPAD register is not supported for IB systems. - -Signed-off-by: Vadim Pasternak ---- - drivers/net/ethernet/mellanox/mlxsw/minimal.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -index 15116d9305f8..7396b37bc880 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -@@ -53,6 +53,7 @@ struct mlxsw_m_port { - - static int mlxsw_m_base_mac_get(struct mlxsw_m *mlxsw_m) - { -+#if 0 - char spad_pl[MLXSW_REG_SPAD_LEN] = {0}; - int err; - -@@ -60,6 +61,7 @@ static int mlxsw_m_base_mac_get(struct mlxsw_m *mlxsw_m) - if (err) - return err; - mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_m->base_mac); -+#endif - return 0; - } - --- -2.20.1 -