Are there any plans to provide support for the RISC-V architecture ?

[michalbiesek]

I saw that RISC-V arch is supported on capstone disassembly framework.

[kubo]

I don't have any plans yet. The priority is low for me.
I may not use capstone for RISC-V because the instruction format is well organized.

[navytux]

For the reference I see that @michalbiesek added some RISC-V support in michalbiesek@725a8263.

Not sure about its status.