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feat: add BitVec.getElem_[add|add_add_bool|mul|rotateLeft|rotateRight… #5508

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merged 13 commits into from
Oct 1, 2024

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tobiasgrosser
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@tobiasgrosser tobiasgrosser commented Sep 28, 2024

…|twoPow|one|replicate]

... and mark getElem_setWidth as @[simp].

getElem_rotateLeft and getElem_rotateRight have a non-trivial rhs but we follow getLsbD_[rotateLeft|rotateRight]for consistency.

…|twoPow|one|replicate]

... and mark getElem_setWidth as `@[simp]`.
@tobiasgrosser tobiasgrosser marked this pull request as ready for review September 28, 2024 10:46
@github-actions github-actions bot added the toolchain-available A toolchain is available for this PR, at leanprover/lean4-pr-releases:pr-release-NNNN label Sep 28, 2024
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leanprover-community-bot commented Sep 28, 2024

Mathlib CI status (docs):

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@tobiasgrosser
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@kim-em, I just tried this for getElem_rotateRight, but I seem unable to access the condition of the if-condition from omega:

@[simp]
theorem getElem_rotateLeft {x : BitVec w} {r i : Nat} (h : i < w) :
    (x.rotateLeft r)[i] =
      if (i < r % w) then
      (x[(w - (r % w) + i)]'(by /- I do not get `i < r % w` here -/ sorry)) else
      (x[i - (r % w)]'(by omega)) := by
  simp [← BitVec.getLsbD_eq_getElem, h]

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kim-em commented Sep 29, 2024

@kim-em, I just tried this for getElem_rotateRight, but I seem unable to access the condition of the if-condition from omega:

@[simp]
theorem getElem_rotateLeft {x : BitVec w} {r i : Nat} (h : i < w) :
    (x.rotateLeft r)[i] =
      if (i < r % w) then
      (x[(w - (r % w) + i)]'(by /- I do not get `i < r % w` here -/ sorry)) else
      (x[i - (r % w)]'(by omega)) := by
  simp [← BitVec.getLsbD_eq_getElem, h]

You need to name the condition: if h : c then t else e.

@tobiasgrosser
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@kim-em, I just tried this for getElem_rotateRight, but I seem unable to access the condition of the if-condition from omega:

@[simp]
theorem getElem_rotateLeft {x : BitVec w} {r i : Nat} (h : i < w) :
    (x.rotateLeft r)[i] =
      if (i < r % w) then
      (x[(w - (r % w) + i)]'(by /- I do not get `i < r % w` here -/ sorry)) else
      (x[i - (r % w)]'(by omega)) := by
  simp [← BitVec.getLsbD_eq_getElem, h]

You need to name the condition: if h : c then t else e.

Perfect. This was the hint I needed.

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Otherwise LGTM now.

tobiasgrosser and others added 3 commits September 30, 2024 05:16
Co-authored-by: Kim Morrison <scott@tqft.net>
Co-authored-by: Kim Morrison <scott@tqft.net>
Co-authored-by: Kim Morrison <scott@tqft.net>
Co-authored-by: Kim Morrison <scott@tqft.net>
@tobiasgrosser
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All comments addressed. This now looks very neat.

@kim-em kim-em added this pull request to the merge queue Oct 1, 2024
Merged via the queue into leanprover:master with commit bfb73c4 Oct 1, 2024
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3 participants