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F1C200S_KIT.sch-bak
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F1C200S_KIT.sch-bak
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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 5
Title "F1C200S KIT"
Date ""
Rev "V1.0"
Comp "WUJIQUE"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 5350 1100 1500 5050
U 5E3A4A8E
F0 "CPU" 50
F1 "CPU.sch" 50
F2 "USB_D-" B L 5350 3000 50
F3 "USB_D+" B L 5350 3100 50
F4 "CPU_RXD" I L 5350 2650 50
F5 "CPU_TXD" O L 5350 2750 50
F6 "USB_ID" I L 5350 3200 50
F7 "SDIO_CLK" O L 5350 3500 50
F8 "SDIO_D2" B L 5350 3800 50
F9 "SDIO_D3" B L 5350 3900 50
F10 "SDIO_CMD" B L 5350 3400 50
F11 "SDIO_D0" B L 5350 3600 50
F12 "SDIO_D1" B L 5350 3700 50
F13 "SPI0_CS" O L 5350 4200 50
F14 "SPI0_CLK" O L 5350 4300 50
F15 "SPI0_MISO" I L 5350 4400 50
F16 "SPI0_MOSI" O L 5350 4500 50
F17 "HP_L" I R 6850 1800 50
F18 "HP_R" I R 6850 1900 50
F19 "HP_COM" I R 6850 1700 50
F20 "VRA1" I R 6850 2550 50
F21 "VRA2" I R 6850 2450 50
F22 "FMINL" I R 6850 2150 50
F23 "FMINR" I R 6850 2250 50
F24 "LINL" I R 6850 2750 50
F25 "MICIN" I R 6850 2900 50
F26 "LRADC0" I R 6850 3050 50
F27 "TV_IN0" I R 6850 3950 50
F28 "TV_IN1" I R 6850 4050 50
F29 "TV_VRP" I R 6850 3750 50
F30 "TV_VRN" I R 6850 3850 50
F31 "TV_VCC" I R 6850 3550 50
F32 "TV_OUT" I R 6850 4200 50
F33 "PA0_UART1_RTS_SPI1_CS" I L 5350 4750 50
F34 "PA1_UART1_CTS_SPI1_MOSI" I L 5350 4850 50
F35 "PA2_UART1_RX_SPI1_CLK" I L 5350 4950 50
F36 "PA3_UART1_TX_SPI1_MISO" I L 5350 5050 50
F37 "PE7_UART2_TX_SPI1_CS" I L 5350 5300 50
F38 "PE8_UART2_RX_SPI1_MOSI" I L 5350 5400 50
F39 "PE9_UART2_RTS_SPI1_CLK" I L 5350 5500 50
F40 "PE10_UART2_CTS_SPI1_MISO" I L 5350 5600 50
F41 "PE12_TWI0_SDA" I L 5350 5800 50
F42 "PE11_TWI0_SCK" I L 5350 5700 50
F43 "PE5" I L 5350 5200 50
F44 "HP_COMFB" I R 6850 1600 50
$EndSheet
Wire Wire Line
2200 2650 2050 2650
Wire Wire Line
2050 2650 2050 1650
Wire Wire Line
2050 1650 2200 1650
$Sheet
S 2200 1100 1400 750
U 5E3A4AC6
F0 "Power" 50
F1 "Power.sch" 50
F2 "VBUS" I L 2200 1650 50
$EndSheet
$Sheet
S 2200 2500 1400 3650
U 5E3A651C
F0 "Misc" 50
F1 "Misc.sch" 50
F2 "CPU_RXD" O R 3600 2650 50
F3 "CPU_TXD" I R 3600 2750 50
F4 "VBUS" O L 2200 2650 50
F5 "USB_D-" B R 3600 3000 50
F6 "USB_D+" B R 3600 3100 50
F7 "SDIO_CLK" I R 3600 3500 50
F8 "SDIO_D0" B R 3600 3600 50
F9 "SDIO_D3" B R 3600 3900 50
F10 "SDIO_CMD" B R 3600 3400 50
F11 "SDIO_D1" B R 3600 3700 50
F12 "USB_ID" O R 3600 3200 50
F13 "SDIO_D2" B R 3600 3800 50
F14 "SPI0_CS" I R 3600 4200 50
F15 "SPI0_CLK" I R 3600 4300 50
F16 "SPI0_MISO" O R 3600 4400 50
F17 "SPI0_MOSI" I R 3600 4500 50
F18 "PE7_UART2_TX_SPI1_CS" I R 3600 5300 50
F19 "PE8_UART2_RX_SPI1_MOSI" I R 3600 5400 50
F20 "PE9_UART2_RTS_SPI1_CLK" I R 3600 5500 50
F21 "PE10_UART2_CTS_SPI1_MISO" I R 3600 5600 50
F22 "PA0_UART1_RTS_SPI1_CS" I R 3600 4750 50
F23 "PA1_UART1_CTS_SPI1_MOSI" I R 3600 4850 50
F24 "PA2_UART1_RX_SPI1_CLK" I R 3600 4950 50
F25 "PA3_UART1_TX_SPI1_MISO" I R 3600 5050 50
F26 "PE11_TWI0_SCK" I R 3600 5700 50
F27 "PE12_TWI0_SDA" I R 3600 5800 50
F28 "PE5" I R 3600 5200 50
$EndSheet
Wire Wire Line
3600 2650 5350 2650
Wire Wire Line
3600 2750 5350 2750
Wire Wire Line
3600 3000 5350 3000
Wire Wire Line
3600 3100 5350 3100
Wire Wire Line
3600 3200 5350 3200
Wire Wire Line
3600 3400 5350 3400
Wire Wire Line
3600 3500 5350 3500
Wire Wire Line
3600 3600 5350 3600
Wire Wire Line
3600 3700 5350 3700
Wire Wire Line
3600 3800 5350 3800
Wire Wire Line
3600 3900 5350 3900
Wire Wire Line
3600 4200 5350 4200
Wire Wire Line
3600 4300 5350 4300
Wire Wire Line
3600 4400 5350 4400
Wire Wire Line
3600 4500 5350 4500
$Sheet
S 7700 1500 700 2850
U 5E5BEA7B
F0 "TV" 50
F1 "TV.sch" 50
F2 "HP_L" I L 7700 1800 50
F3 "HP_COM" I L 7700 1700 50
F4 "HP_R" I L 7700 1900 50
F5 "MICIN" I L 7700 2900 50
F6 "LINL" I L 7700 2750 50
F7 "FMINR" I L 7700 2250 50
F8 "FMINL" I L 7700 2150 50
F9 "VRA2" I L 7700 2450 50
F10 "VRA1" I L 7700 2550 50
F11 "LRADC0" I L 7700 3050 50
F12 "TV_IN0" I L 7700 3950 50
F13 "TV_IN1" I L 7700 4050 50
F14 "TV_VRP" I L 7700 3750 50
F15 "TV_VRN" I L 7700 3850 50
F16 "TV_VCC" I L 7700 3550 50
F17 "TV_OUT" I L 7700 4200 50
F18 "HP_COMFB" I L 7700 1600 50
$EndSheet
Wire Wire Line
5350 5300 3600 5300
Wire Wire Line
5350 4750 3600 4750
Wire Wire Line
5350 5200 3600 5200
Wire Wire Line
5350 5400 3600 5400
Wire Wire Line
5350 5500 3600 5500
Wire Wire Line
5350 5600 3600 5600
Wire Wire Line
3600 5700 5350 5700
Wire Wire Line
5350 5800 3600 5800
Wire Wire Line
3600 4850 5350 4850
Wire Wire Line
5350 4950 3600 4950
Wire Wire Line
3600 5050 5350 5050
Wire Wire Line
6850 1600 7700 1600
Wire Wire Line
6850 2150 7700 2150
Wire Wire Line
6850 2450 7700 2450
Wire Wire Line
6850 2750 7700 2750
Wire Wire Line
6850 3550 7700 3550
Wire Wire Line
6850 3750 7700 3750
Wire Wire Line
6850 4200 7700 4200
Wire Wire Line
6850 3850 7700 3850
Wire Wire Line
6850 3950 7700 3950
Wire Wire Line
6850 4050 7700 4050
Wire Wire Line
6850 2900 7700 2900
Wire Wire Line
6850 3050 7700 3050
Wire Wire Line
6850 2250 7700 2250
Wire Wire Line
6850 2550 7700 2550
Wire Wire Line
6850 1900 7700 1900
Wire Wire Line
6850 1800 7700 1800
Wire Wire Line
6850 1700 7700 1700
$EndSCHEMATC