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+https://www.lowrisc.org/news/2024/05/safetydetectives-interview/
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lowRISC: Collaborative open silicon engineering
Open to the core
lowRISC is a not-for-profit company with a full stack engineering team based in Cambridge, UK.
-We use collaborative engineering to develop and maintain open source silicon designs and tools.
Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
-CAMBRIDGE, England – February 13, 2024 – lowRISC C.I.C., the open silicon ecosystem organization, and the OpenTitan coalition today announced a historic milestone as the first open-source silicon project to reach commercial availability, with validated chips in hand. The capstone moment is the result of an unprecedented amount of support and investment by the nine coalition members, including Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient, hosted by the non-profit lowRISC CIC.
Our work is open and permissively licensed, helping to move the industry forward with flexible, accessible and effective systems and tools. We implement and have expertise in the free and open RISC-V ISA.
Durable technology
lowRISC creates infrastructure which will be used, useful and sustainable for future generations of computer systems, by getting the foundations right and not cutting corners.
Full stack technical excellence
High quality, robust engineering and great documentation are essential to provide useful and maintainable technology. lowRISC create, support and maintain open cores, hardware IP blocks, compiler infrastructure and test and verification systems.
Collaborative engineering
We work closely with others, testing new ideas and developing systems together, and sharing what we learn and build. lowRISC is part of the open technology ecosystem, and fosters inclusive and participatory communities.
Pragmatic
We make choices that enable us to take concrete steps as best we can towards open source silicon being used at scale. lowRISC aims to show that it's entirely possible to develop open source silicon solutions at a quality suitable for large-scale production and deployment.
Independent and not-for-profit
lowRISC is a neutral home for multi-partner projects delivering verified, high quality IP and tools. This enables shared investment into pre-competitive technology and open standards, providing the solid foundations necessary for the rapid development cycles of next generation silicon products.
Announcing OpenTitan, the first transparent silicon root of trust
We are excited to unveil the OpenTitan silicon root of trust project, a new effort built using the successful collaborative engineering model created by lowRISC in partnership with Google and other commercial and academic partners.
This effort sets a new bar for transparency in trusted silicon, and lowRISC is proud to serve as both steward and not-for-profit engineering contributor to OpenTitan, the world’s first open source silicon root of trust.
Silicon root of trust chips increase trust in the integrity of the infrastructure on which software runs.
+We use collaborative engineering to develop and maintain open source silicon designs and tools.
lowRISC’s CEO, Dr. Gavin Ferris, was recently interviewed by SafetyDetectives’ Shauli Zacks. The article is reproduced here by kind permission:
+In an exclusive interview with SafetyDetectives, Gavin Ferris, CEO of lowRISC, shares invaluable insights into the transformative world of open-source silicon. lowRISC, a trailblazer in the field, not only champions the groundbreaking OpenTitan project but also fosters a collaborative ecosystem that includes tech giants and academic luminaries. This initiative marks a significant leap toward redefining hardware security through transparency and innovation.
Our work is open and permissively licensed, helping to move the industry forward with flexible, accessible and effective systems and tools. We implement and have expertise in the free and open RISC-V ISA.
Durable technology
lowRISC creates infrastructure which will be used, useful and sustainable for future generations of computer systems, by getting the foundations right and not cutting corners.
Full stack technical excellence
High quality, robust engineering and great documentation are essential to provide useful and maintainable technology. lowRISC create, support and maintain open cores, hardware IP blocks, compiler infrastructure and test and verification systems.
Collaborative engineering
We work closely with others, testing new ideas and developing systems together, and sharing what we learn and build. lowRISC is part of the open technology ecosystem, and fosters inclusive and participatory communities.
Pragmatic
We make choices that enable us to take concrete steps as best we can towards open source silicon being used at scale. lowRISC aims to show that it's entirely possible to develop open source silicon solutions at a quality suitable for large-scale production and deployment.
Independent and not-for-profit
lowRISC is a neutral home for multi-partner projects delivering verified, high quality IP and tools. This enables shared investment into pre-competitive technology and open standards, providing the solid foundations necessary for the rapid development cycles of next generation silicon products.
Announcing OpenTitan, the first transparent silicon root of trust
We are excited to unveil the OpenTitan silicon root of trust project, a new effort built using the successful collaborative engineering model created by lowRISC in partnership with Google and other commercial and academic partners.
This effort sets a new bar for transparency in trusted silicon, and lowRISC is proud to serve as both steward and not-for-profit engineering contributor to OpenTitan, the world’s first open source silicon root of trust.
Silicon root of trust chips increase trust in the integrity of the infrastructure on which software runs.
Open sourcing the silicon design makes it more transparent, trustworthy, and ultimately, secure.
Collaborative engineering for open source silicon.
\ No newline at end of file
diff --git a/index.xml b/index.xml
index ca70fdbc..5ee362c2 100644
--- a/index.xml
+++ b/index.xml
@@ -1,4 +1,87 @@
-lowRISC: Collaborative open silicon engineeringhttps://www.lowrisc.org/Latest news from lowRISCen-usTue, 13 Feb 2024 00:00:00 +0000 The text content on this website is licensed under a Creative Commons Attribution 4.0 International License, except where otherwise noted. No license is granted for logos or other trademarks. Other content Copyright lowRISC Contributors.OpenTitan® Partnership Makes History as First Open-Source Silicon Project to Reach Commercial Availabilityhttps://www.lowrisc.org/news/2024/02/opentitan-commercial-availability/https://www.lowrisc.org/news/2024/02/opentitan-commercial-availability/Tue, 13 Feb 2024 00:00:00 +0000info@lowrisc.org (lowRISC)lowRISC: Collaborative open silicon engineeringhttps://www.lowrisc.org/Latest news from lowRISCen-usFri, 10 May 2024 00:00:00 +0100 The text content on this website is licensed under a Creative Commons Attribution 4.0 International License, except where otherwise noted. No license is granted for logos or other trademarks. Other content Copyright lowRISC Contributors.SafetyDetectives Interview With Gavin Ferris - CEO at lowRISChttps://www.lowrisc.org/news/2024/05/safetydetectives-interview/https://www.lowrisc.org/news/2024/05/safetydetectives-interview/Fri, 10 May 2024 00:00:00 +0100info@lowrisc.org (lowRISC)lowRISC’s CEO, Dr. Gavin Ferris, was recently interviewed by SafetyDetectives’ Shauli Zacks.
+The article is reproduced here by kind permission:
+
+
In an exclusive interview with SafetyDetectives, Gavin Ferris, CEO of lowRISC, shares invaluable insights into the transformative world of open-source silicon.
+lowRISC, a trailblazer in the field, not only champions the groundbreaking OpenTitan project but also fosters a collaborative ecosystem that includes tech giants and academic luminaries.
+This initiative marks a significant leap toward redefining hardware security through transparency and innovation.
+As OpenTitan becomes the first commercially available open-source silicon root of trust, Ferris discusses its impact, the challenges of hardware development, and the future of secure systems.
+Join us as we delve into the pioneering journey of lowRISC and its pivotal role in shaping the next generation of secure, open-source silicon.
+
+
Can you introduce yourself and give a brief overview of lowRISC and how its work enables OpenTitan?
+
+
My name is Gavin Ferris and I’m CEO of lowRISC, a UK-based nonprofit focused on developing open-source silicon designs.
+We provide a home for collaborative engineering to create and maintain high quality IP such as OpenTitan, the world’s first open-source silicon root of trust (RoT).
+
+
Our team of collaborators and partners (which includes Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient) are responsible for the creation of the Silicon Commons, the development of the RISC-V Ibex core, and successfully delivering the world’s first commercial-grade open-source chip, OpenTitan “Earl Grey.”
+
+
One key differentiator is our robust open-source design verification (DV) methodology, used to ensure quality across the OpenTitan family of designs.
+This approach has enabled OpenTitan to reach design parity with commercial silicon.
+
+
OpenTitan has recently achieved a significant milestone by becoming the first open source silicon project to reach commercial availability. Can you elaborate on the significance of this achievement?
+
+
In short, it’s so significant because we’ve finally made open-source silicon work the same way as open-source software, despite the cost, time, and correctness hurdles (not to mention the physical supply chain!) that makes hardware development so challenging.
+We’re all familiar with the hugely beneficial, industry-level transformation that took place once open-source software achieved critical mass, and with this milestone the silicon industry is now primed for a similar change.
+There’s still a long way to go of course, but the die is cast.
+
+
Focusing on some specifics, commercial availability of the first OpenTitan chip (“Earl Grey”) means manufacturers can immediately start building it into their systems at the PCB level.
+There’s an integratable variant too (“Darjeeling”), which allows the same high-quality OpenTitan IP to be included as a subsystem within third party chiplets and SoCs (and indeed, the first design wins here have already happened, for example with Rivos).
+
+
Furthermore, since the design of OpenTitan is modular and permissively licensed (Apache 2 with a CLA), sub-blocks of its design — such as its Ibex CPU core — are being picked up by others and used in their own products.
+It’s a trend we expect will go from strength to strength (and of course, encourage!).
+
+
Could you explain the concept of a root of trust (RoT) and its importance in hardware security?
+
+
All systems contain some sort of root of trust (RoT) — it’s the part that you assume ‘always works’ even when under attack, and upon which the security of the rest of the platform ultimately depends.
+The problem is that in many current designs, the RoT is implicit and inheres in low-software (for example, the BIOS) — a layer of the stack that’s now directly, and successfully, under attack by sophisticated cyber-attackers.
+And unfortunately for such hosts, once that software is compromised, there’s often no way for users or fleet managers to revert the system to a ‘known good’ state (nor even, in many cases, know which nodes have been compromised), short of returning to the manufacturer.
+
+
By contrast a silicon RoT (or SiRoT) is a highly secure ‘computer within your computer’ that sits below the operating system and ensures the overall reliability of the computing environment, locking down the boot process and ensuring that all subsequent operations and critical processes are verified and trustworthy.
+The more advanced SiRoTs (such as OpenTitan) also provide a secure execution environment in which critical cryptographic key material may be stored and used post-boot (for example, for digital signing).
+
+
By placing the RoT at the hardware level in this way, designers are wisely choosing to make the root of trust explicit, embodied in a subsystem that is far more resistant to attacks than inherently compromised software-based approaches.
+
+
Why was it important for lowRISC and the OpenTitan project to adopt an open source model for silicon development?
+
+
Similar to open-source software, we strongly believe that open-source silicon:
+
+
+
Enhances trust and security through design and implementation transparency — issues can be discovered early, the need for blind trust is reduced, and system audits are greatly facilitated.
+
Enables and encourages innovation through contributions to the open-source design via a collaborative approach to design.
+
Provides implementation choice and preserves a set of common interfaces and software compatibility guarantees through a common, open reference design.
+
+
+
Can you talk about how security works at the microchip level of a device and why a secure starting point for the system is essential to ensuring the integrity and authenticity of critical software components?
+
+
True security has to be anchored in trustworthy silicon, because once a system’s software is compromised by an attacker, any ‘defense’ implemented in that software (such as anti-virus, firewall, SBOM etc.) is (for obvious reasons!) relatively straightforward to circumvent.
+
+
By contrast, a SiRoT can:
+
+
+
Ensure that its device boots with the correct firmware and hasn’t been infected by low-level malware.
+
Provide a cryptographically unique machine identity, so an operator can verify that the device is legitimate.
+
Protect secrets such as encryption keys in a tamper-resistant manner, even for people with physical access (e.g., while a server or a device is being shipped through the supply chain).
+
Provide authoritative, tamper-evident audit records and other runtime security services.
+
+
+
Additionally the OpenTitan “Earl Grey” chip — and firmware — contains a number of sophisticated countermeasures against attack at different levels.
+These are described in detail in its extensive documentation, and include hardening against fault injection and side-channel analysis, vectors that are normally out-of-scope for off-the-shelf application processors.
+
+
How does lowRISC engage with the broader community, including developers, researchers, and industry partners, to further the OpenTitan project?
+
+
Collaborative engineering is absolutely central to lowRISC’s mission — it’s what we do. Our full-stack development team works closely with official partners, academics, and the wider community on a daily basis.
+
+
When we publicly announced OpenTitan as the world’s first open-source RoT in 2019, we did so with support from a broad and growing set of friends and partners, including Google, G+D Mobile Security, ETH Zurich, Nuvoton, Winbond, Seagate, Western Digital, Rivos, and now zeroRISC.
+We extend our heartfelt gratitude for their contributions and to the many individuals who have generously shared their expertise and creativity with us over the years.
+
+
lowRISC C.I.C. has been privileged to support this flourishing community since inception.
+Our Silicon Commons™ methodology, developed with OpenTitan’s partners to support distributed open silicon collaboration, has enabled commits to grow from 2,500 at launch to over 20,000 today, with more than 200 contributors merging over 15,000 pull requests containing more than 1 million lines of code!
+
+
Many organizations are facing monumental challenges to securing IoT devices, especially in the age of AI.
+It is critical now more than ever that the cybersecurity industry comes together against rising threats by focusing on the foundation of our systems first, and we believe OpenTitan’s open-source, commercially available silicon root of trust has a key part to play in that story.
+In keeping with our collaborative approach, we encourage anyone involved with commissioning, developing or securing IoT devices to reach out with questions or requests for further information — our door is always open!
+ ]]>OpenTitan® Partnership Makes History as First Open-Source Silicon Project to Reach Commercial Availabilityhttps://www.lowrisc.org/news/2024/02/opentitan-commercial-availability/https://www.lowrisc.org/news/2024/02/opentitan-commercial-availability/Tue, 13 Feb 2024 00:00:00 +0000info@lowrisc.org (lowRISC)Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
diff --git a/news/2024/05/safetydetectives-interview/index.html b/news/2024/05/safetydetectives-interview/index.html
new file mode 100644
index 00000000..3b6e8d8c
--- /dev/null
+++ b/news/2024/05/safetydetectives-interview/index.html
@@ -0,0 +1,23 @@
+SafetyDetectives Interview With Gavin Ferris - CEO at lowRISC · lowRISC: Collaborative open silicon engineering
SafetyDetectives Interview With Gavin Ferris - CEO at lowRISC
lowRISC’s CEO, Dr. Gavin Ferris, was recently interviewed by SafetyDetectives’ Shauli Zacks.
+The article is reproduced here by kind permission:
In an exclusive interview with SafetyDetectives, Gavin Ferris, CEO of lowRISC, shares invaluable insights into the transformative world of open-source silicon.
+lowRISC, a trailblazer in the field, not only champions the groundbreaking OpenTitan project but also fosters a collaborative ecosystem that includes tech giants and academic luminaries.
+This initiative marks a significant leap toward redefining hardware security through transparency and innovation.
+As OpenTitan becomes the first commercially available open-source silicon root of trust, Ferris discusses its impact, the challenges of hardware development, and the future of secure systems.
+Join us as we delve into the pioneering journey of lowRISC and its pivotal role in shaping the next generation of secure, open-source silicon.
Can you introduce yourself and give a brief overview of lowRISC and how its work enables OpenTitan?
My name is Gavin Ferris and I’m CEO of lowRISC, a UK-based nonprofit focused on developing open-source silicon designs.
+We provide a home for collaborative engineering to create and maintain high quality IP such as OpenTitan, the world’s first open-source silicon root of trust (RoT).
Our team of collaborators and partners (which includes Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient) are responsible for the creation of the Silicon Commons, the development of the RISC-V Ibex core, and successfully delivering the world’s first commercial-grade open-source chip, OpenTitan “Earl Grey.”
One key differentiator is our robust open-source design verification (DV) methodology, used to ensure quality across the OpenTitan family of designs.
+This approach has enabled OpenTitan to reach design parity with commercial silicon.
OpenTitan has recently achieved a significant milestone by becoming the first open source silicon project to reach commercial availability. Can you elaborate on the significance of this achievement?
In short, it’s so significant because we’ve finally made open-source silicon work the same way as open-source software, despite the cost, time, and correctness hurdles (not to mention the physical supply chain!) that makes hardware development so challenging.
+We’re all familiar with the hugely beneficial, industry-level transformation that took place once open-source software achieved critical mass, and with this milestone the silicon industry is now primed for a similar change.
+There’s still a long way to go of course, but the die is cast.
Focusing on some specifics, commercial availability of the first OpenTitan chip (“Earl Grey”) means manufacturers can immediately start building it into their systems at the PCB level.
+There’s an integratable variant too (“Darjeeling”), which allows the same high-quality OpenTitan IP to be included as a subsystem within third party chiplets and SoCs (and indeed, the first design wins here have already happened, for example with Rivos).
Furthermore, since the design of OpenTitan is modular and permissively licensed (Apache 2 with a CLA), sub-blocks of its design — such as its Ibex CPU core — are being picked up by others and used in their own products.
+It’s a trend we expect will go from strength to strength (and of course, encourage!).
Could you explain the concept of a root of trust (RoT) and its importance in hardware security?
All systems contain some sort of root of trust (RoT) — it’s the part that you assume ‘always works’ even when under attack, and upon which the security of the rest of the platform ultimately depends.
+The problem is that in many current designs, the RoT is implicit and inheres in low-software (for example, the BIOS) — a layer of the stack that’s now directly, and successfully, under attack by sophisticated cyber-attackers.
+And unfortunately for such hosts, once that software is compromised, there’s often no way for users or fleet managers to revert the system to a ‘known good’ state (nor even, in many cases, know which nodes have been compromised), short of returning to the manufacturer.
By contrast a silicon RoT (or SiRoT) is a highly secure ‘computer within your computer’ that sits below the operating system and ensures the overall reliability of the computing environment, locking down the boot process and ensuring that all subsequent operations and critical processes are verified and trustworthy.
+The more advanced SiRoTs (such as OpenTitan) also provide a secure execution environment in which critical cryptographic key material may be stored and used post-boot (for example, for digital signing).
By placing the RoT at the hardware level in this way, designers are wisely choosing to make the root of trust explicit, embodied in a subsystem that is far more resistant to attacks than inherently compromised software-based approaches.
Why was it important for lowRISC and the OpenTitan project to adopt an open source model for silicon development?
Similar to open-source software, we strongly believe that open-source silicon:
Enhances trust and security through design and implementation transparency — issues can be discovered early, the need for blind trust is reduced, and system audits are greatly facilitated.
Enables and encourages innovation through contributions to the open-source design via a collaborative approach to design.
Provides implementation choice and preserves a set of common interfaces and software compatibility guarantees through a common, open reference design.
Can you talk about how security works at the microchip level of a device and why a secure starting point for the system is essential to ensuring the integrity and authenticity of critical software components?
True security has to be anchored in trustworthy silicon, because once a system’s software is compromised by an attacker, any ‘defense’ implemented in that software (such as anti-virus, firewall, SBOM etc.) is (for obvious reasons!) relatively straightforward to circumvent.
By contrast, a SiRoT can:
Ensure that its device boots with the correct firmware and hasn’t been infected by low-level malware.
Provide a cryptographically unique machine identity, so an operator can verify that the device is legitimate.
Protect secrets such as encryption keys in a tamper-resistant manner, even for people with physical access (e.g., while a server or a device is being shipped through the supply chain).
Provide authoritative, tamper-evident audit records and other runtime security services.
Additionally the OpenTitan “Earl Grey” chip — and firmware — contains a number of sophisticated countermeasures against attack at different levels.
+These are described in detail in its extensive documentation, and include hardening against fault injection and side-channel analysis, vectors that are normally out-of-scope for off-the-shelf application processors.
How does lowRISC engage with the broader community, including developers, researchers, and industry partners, to further the OpenTitan project?
Collaborative engineering is absolutely central to lowRISC’s mission — it’s what we do. Our full-stack development team works closely with official partners, academics, and the wider community on a daily basis.
When we publicly announced OpenTitan as the world’s first open-source RoT in 2019, we did so with support from a broad and growing set of friends and partners, including Google, G+D Mobile Security, ETH Zurich, Nuvoton, Winbond, Seagate, Western Digital, Rivos, and now zeroRISC.
+We extend our heartfelt gratitude for their contributions and to the many individuals who have generously shared their expertise and creativity with us over the years.
lowRISC C.I.C. has been privileged to support this flourishing community since inception.
+Our Silicon Commons™ methodology, developed with OpenTitan’s partners to support distributed open silicon collaboration, has enabled commits to grow from 2,500 at launch to over 20,000 today, with more than 200 contributors merging over 15,000 pull requests containing more than 1 million lines of code!
Many organizations are facing monumental challenges to securing IoT devices, especially in the age of AI.
+It is critical now more than ever that the cybersecurity industry comes together against rising threats by focusing on the foundation of our systems first, and we believe OpenTitan’s open-source, commercially available silicon root of trust has a key part to play in that story.
+In keeping with our collaborative approach, we encourage anyone involved with commissioning, developing or securing IoT devices to reach out with questions or requests for further information — our door is always open!
\ No newline at end of file
diff --git a/news/index.html b/news/index.html
index d2b251c2..2785b720 100644
--- a/news/index.html
+++ b/news/index.html
@@ -1,6 +1,7 @@
lowRISC News · lowRISC: Collaborative open silicon engineering
Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
+
lowRISC’s CEO, Dr. Gavin Ferris, was recently interviewed by SafetyDetectives’ Shauli Zacks. The article is reproduced here by kind permission:
+In an exclusive interview with SafetyDetectives, Gavin Ferris, CEO of lowRISC, shares invaluable insights into the transformative world of open-source silicon. lowRISC, a trailblazer in the field, not only champions the groundbreaking OpenTitan project but also fosters a collaborative ecosystem that includes tech giants and academic luminaries. This initiative marks a significant leap toward redefining hardware security through transparency and innovation.
Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
CAMBRIDGE, England – February 13, 2024 – lowRISC C.I.C., the open silicon ecosystem organization, and the OpenTitan coalition today announced a historic milestone as the first open-source silicon project to reach commercial availability, with validated chips in hand. The capstone moment is the result of an unprecedented amount of support and investment by the nine coalition members, including Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient, hosted by the non-profit lowRISC CIC.
The lowRISC®/Sunburst team are pleased to announce that the initial Sonata prototype boards have been manufactured by our wholly owned subsidiary NewAE and are currently being tested, marking a significant milestone towards our goal of making CHERI technology widely available to embedded systems engineers.
lowRISC®’s Sonata Board - powered up and running!
Ibex Inside The CHERIoT Ibex core lies at the heart of the Sonata system. Ibex is a production-quality, open-source 32-bit RISC-V CPU core, written in SystemVerilog.
The Sunburst Project, supported by DSbD/UKRI grant (#107540), focuses on enhancing security within the embedded and operational technology (OpTe) sectors. Its primary goal is to promote the adoption of CHERIoT, an open-source microcontroller technology that integrates CHERI capabilities within the RISC-V architecture.
@@ -11,7 +12,5 @@
CAMBRIDGE, United Kingdom – October 20, 2023 – lowRISC C.I.C., the open source system on chip (SoC) organization, today announced the commercial availability of two pieces of hardware crucial for research and development with OpenTitan, a project creating the world’s first open source silicon root of trust (RoT) designs. The NAE-CW310-K410T (Bergen Board) and the new, larger NAE-CW340-OTKIT (Luna Board) are now available for purchase exclusively from trusted global distributor Mouser, and addresses the overwhelming demand from OpenTitan partners, organizations and academic institutions wanting to run the full OpenTitan design — or subcomponents of that design — in a flexible FPGA-based emulation platform.
UK Research and Innovation (UKRI) recently announced that its CHERI-based Digital Security by Design Programme (DSbD) technologies have already demonstrated significant value in sectors where high integrity, resilient, and safety-focused applications are paramount, including avionics, automotive and embedded systems.
DSbD aims to provide foundational support to developers centred around a technology enhancement in the central processor (CPU): Capability Hardware Enhanced RISC Instructions, or (CHERI). CHERI has the potential to prevent around 2/3rds of current exploits, whilst simultaneously providing new software methods to help maintain the operational resilience and integrity of applications.
OpenTitan® recently announced the RTL freeze of Earl Grey, the first chip tapeout of its open source silicon root of trust (RoT). The first engineering samples should be in our hands before the end of the year.
OpenTitan’s mission is to provide a secure root of trust, which is complemented by a secure processor core. To address this need, we elevated one of the most widely deployed, highest quality RISC-V cores in academia to the industrial-level of quality characteristic of this project.
We are delighted to announce an important development for OpenTitan®: RTL Freeze for the Earl Grey discrete, the first OpenTitan chip tapeout. This milestone is a source of immense pride for lowRISC and our OpenTitan partners, because it’s a concrete demonstration of the success of the Silicon Commons™ approach to making silicon radically more transparent and trustworthy.
-In partnership with Nuvoton, a major TPM vendor, this RTL freeze means that the OpenTitan coalition will have engineering samples of the discrete silicon root of trust (RoT) this calendar year.
We are excited to announce today that the OpenTitan project has hit a major tapeout milestone: a feature freeze of its open-source RTL.
-Together with our partners, we began the OpenTitan project in 2019 with the goal of producing the world’s first open-source silicon Root of Trust (RoT). With this new achievement we are a step closer to realising that goal.
-Getting to this point has taken a lot of coordinated work, as we’ve had to navigate the many stumbling blocks that have traditionally made open-source silicon development a challenge.
