diff --git a/blog/2024/02/opentitan-commercial-viability/index.html b/blog/2024/02/opentitan-commercial-viability/index.html
new file mode 100644
index 00000000..1bf427f5
--- /dev/null
+++ b/blog/2024/02/opentitan-commercial-viability/index.html
@@ -0,0 +1 @@
+
https://www.lowrisc.org/news/2024/02/opentitan-commercial-viability/
\ No newline at end of file
diff --git a/index.html b/index.html
index 4cb140ed..caad42d3 100644
--- a/index.html
+++ b/index.html
@@ -1,8 +1,7 @@
lowRISC: Collaborative open silicon engineering
Open to the core
lowRISC is a not-for-profit company with a full stack engineering team based in Cambridge, UK.
-We use collaborative engineering to develop and maintain open source silicon designs and tools.
The lowRISC®/Sunburst team are pleased to announce that the initial Sonata prototype boards have been manufactured by our wholly owned subsidiary NewAE and are currently being tested, marking a significant milestone towards our goal of making CHERI technology widely available to embedded systems engineers.
-lowRISC®’s Sonata Board - powered up and running!
-Ibex Inside The CHERIoT Ibex core lies at the heart of the Sonata system. Ibex is a production-quality, open-source 32-bit RISC-V CPU core, written in SystemVerilog.
Our work is open and permissively licensed, helping to move the industry forward with flexible, accessible and effective systems and tools. We implement and have expertise in the free and open RISC-V ISA.
Durable technology
lowRISC creates infrastructure which will be used, useful and sustainable for future generations of computer systems, by getting the foundations right and not cutting corners.
Full stack technical excellence
High quality, robust engineering and great documentation are essential to provide useful and maintainable technology. lowRISC create, support and maintain open cores, hardware IP blocks, compiler infrastructure and test and verification systems.
Collaborative engineering
We work closely with others, testing new ideas and developing systems together, and sharing what we learn and build. lowRISC is part of the open technology ecosystem, and fosters inclusive and participatory communities.
Pragmatic
We make choices that enable us to take concrete steps as best we can towards open source silicon being used at scale. lowRISC aims to show that it's entirely possible to develop open source silicon solutions at a quality suitable for large-scale production and deployment.
Independent and not-for-profit
lowRISC is a neutral home for multi-partner projects delivering verified, high quality IP and tools. This enables shared investment into pre-competitive technology and open standards, providing the solid foundations necessary for the rapid development cycles of next generation silicon products.
Announcing OpenTitan, the first transparent silicon root of trust
We are excited to unveil the OpenTitan silicon root of trust project, a new effort built using the successful collaborative engineering model created by lowRISC in partnership with Google and other commercial and academic partners.
This effort sets a new bar for transparency in trusted silicon, and lowRISC is proud to serve as both steward and not-for-profit engineering contributor to OpenTitan, the world’s first open source silicon root of trust.
Silicon root of trust chips increase trust in the integrity of the infrastructure on which software runs.
+We use collaborative engineering to develop and maintain open source silicon designs and tools.
Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
+CAMBRIDGE, England – February 13, 2024 – lowRISC C.I.C., the open silicon ecosystem organization, and the OpenTitan coalition today announced a historic milestone as the first open-source silicon project to reach commercial availability, with validated chips in hand. The capstone moment is the result of an unprecedented amount of support and investment by the nine coalition members, including Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient, hosted by the non-profit lowRISC CIC.
Our work is open and permissively licensed, helping to move the industry forward with flexible, accessible and effective systems and tools. We implement and have expertise in the free and open RISC-V ISA.
Durable technology
lowRISC creates infrastructure which will be used, useful and sustainable for future generations of computer systems, by getting the foundations right and not cutting corners.
Full stack technical excellence
High quality, robust engineering and great documentation are essential to provide useful and maintainable technology. lowRISC create, support and maintain open cores, hardware IP blocks, compiler infrastructure and test and verification systems.
Collaborative engineering
We work closely with others, testing new ideas and developing systems together, and sharing what we learn and build. lowRISC is part of the open technology ecosystem, and fosters inclusive and participatory communities.
Pragmatic
We make choices that enable us to take concrete steps as best we can towards open source silicon being used at scale. lowRISC aims to show that it's entirely possible to develop open source silicon solutions at a quality suitable for large-scale production and deployment.
Independent and not-for-profit
lowRISC is a neutral home for multi-partner projects delivering verified, high quality IP and tools. This enables shared investment into pre-competitive technology and open standards, providing the solid foundations necessary for the rapid development cycles of next generation silicon products.
Announcing OpenTitan, the first transparent silicon root of trust
We are excited to unveil the OpenTitan silicon root of trust project, a new effort built using the successful collaborative engineering model created by lowRISC in partnership with Google and other commercial and academic partners.
This effort sets a new bar for transparency in trusted silicon, and lowRISC is proud to serve as both steward and not-for-profit engineering contributor to OpenTitan, the world’s first open source silicon root of trust.
Silicon root of trust chips increase trust in the integrity of the infrastructure on which software runs.
Open sourcing the silicon design makes it more transparent, trustworthy, and ultimately, secure.
Collaborative engineering for open source silicon.
\ No newline at end of file
diff --git a/index.xml b/index.xml
index 09277320..40ec03bc 100644
--- a/index.xml
+++ b/index.xml
@@ -1,4 +1,98 @@
-lowRISC: Collaborative open silicon engineeringhttps://www.lowrisc.org/Latest news from lowRISCen-usMon, 15 Jan 2024 00:00:00 +0000 The text content on this website is licensed under a Creative Commons Attribution 4.0 International License, except where otherwise noted. No license is granted for logos or other trademarks. Other content Copyright lowRISC Contributors.Unveiling Sonata: Affordable CHERI Hardware for Embedded Systemshttps://www.lowrisc.org/news/2024/01/sonata-board-update/https://www.lowrisc.org/news/2024/01/sonata-board-update/Mon, 15 Jan 2024 00:00:00 +0000info@lowrisc.org (lowRISC)lowRISC: Collaborative open silicon engineeringhttps://www.lowrisc.org/Latest news from lowRISCen-usTue, 13 Feb 2024 00:00:00 +0000 The text content on this website is licensed under a Creative Commons Attribution 4.0 International License, except where otherwise noted. No license is granted for logos or other trademarks. Other content Copyright lowRISC Contributors.OpenTitan® Partnership Makes History as First Open-Source Silicon Project to Reach Commercial Availabilityhttps://www.lowrisc.org/news/2024/02/opentitan-commercial-viability/https://www.lowrisc.org/news/2024/02/opentitan-commercial-viability/Tue, 13 Feb 2024 00:00:00 +0000info@lowrisc.org (lowRISC)Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
+
+
CAMBRIDGE, England – February 13, 2024 – lowRISC C.I.C., the open silicon ecosystem organization, and the OpenTitan coalition today announced a historic milestone as the first open-source silicon project to reach commercial availability, with validated chips in hand.
+The capstone moment is the result of an unprecedented amount of support and investment by the nine coalition members, including Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient, hosted by the non-profit lowRISC CIC.
OpenTitan® – The World’s First Commercial-Grade Open-Source Silicon is Here!
+
+
“I am incredibly proud of the OpenTitan partnership for succeeding where every other project has failed – producing the first commercial quality open-source chip in the world,” said Dr. Gavin Ferris, CEO of lowRISC, OpenTitan’s host organization.
+“This is the culmination of the monumentally hard work of a vibrant and engaged community of contributors focused on a singular goal to achieve what’s never been done before – make open-source silicon work the same way as open-source software.
+I am grateful for this support and can’t wait for what’s to come.”
+
+
Google launched the OpenTitan project together with lowRISC and its partners in 2018 with the goal to make a completely transparent and trustworthy secure silicon platform.
+It is the world’s first open-source secure chip to include commercial-grade design verification, top-level testing and continuous integration.
+Capable of serving as the hardware root of trust, OpenTitan ensures that the hardware infrastructure and the software that runs on it remain in their intended, trustworthy state by verifying that the critical system components boot securely using only authorized and verifiable code.
+
+
With Google’s support, the project took off from its first year, setting it on a trajectory to make it the most active and successful open-source silicon project in history.
+Throughout its lifetime, the OpenTitan coalition thrived as an open silicon ecosystem, consistently following a well-defined roadmap from discrete to integrated secure silicon designs.
+The project partners are deeply engaged in this process, ensuring that the final designs are adaptable to many applications.
+OpenTitan also has a large and growing community of contributors beyond its formal partners.
+As a whole, the community resolves hundreds of pull requests and issues monthly.
+
+
“OpenTitan in silicon is the realization of many years of dedication and hard work from our team.
+It is a significant moment for us and all contributors to the project,” emphasized Miguel Osorio, OpenTitan Lead at Google.
+
+
This major milestone follows a series of significant successes for the OpenTitan project in 2023.
+Most critically, the project also accomplished the first discrete silicon tapeout in June 2023.
+In November 2023, the project coalition announced the first SoC secure execution environment, including RoT functionality, which has enabled coalition partners to embed OpenTitan in their SoC and chiplet designs.
+
+
Supporting Quotes from OpenTitan Members
+
+
“We’ve been privileged to work closely with our OpenTitan coalition partners from early on and are even prouder now to bring the first ‘EarlGrey’ OpenTitan chip design to market, demonstrating our leadership in open, secure ICs,” said Erez Naory, VP of Client and Security Products at Nuvoton.
+“Open-source secure silicon is now proven as a radical leap forward in solving the market’s need for a truly trustworthy foundation.”
+
+
“Our mission is to advance the incredible work of the OpenTitan project by delivering an end-to-end supply chain security solution built on an open secure silicon foundation,” said Dom Rizzo, zeroRISC CEO.
+“That we’re able to deliver commercial products so soon after tapeout clearly illustrates the coalition’s momentum.
+With this first, crucial step for open silicon implementations, we look forward to a world where a transparent and trustworthy supply chain is the default.”
+
+
“The rigor at the heart of the OpenTitan project’s roadmap has ensured the success of this first-of-its-kind, silicon-proven integrated design,” said Tung-Yi Chan, Vice Chairman and Deputy CEO at Winbond.
+“By proving the viability of securely integrating certified IPs, OpenTitan opens up new possibilities for SoC vendors.
+Winbond supports the OpenTitan initiative with its certified Secure Flash solutions.”
+
+
“We’ve benefited tremendously from the collaborative relationships within the OpenTitan partnership,” said Mark Hayter, Founder and Chief Strategy Officer of Rivos Inc.
+“It’s made it easy for us to share our SoC experience to help the coalition provide silicon-proven IP that enables us to integrate RoT into our chiplets.”
+
+
“Seagate is a proud consortium member and contributor of the OpenTitan project,” according to Ed Gage, VP of Seagate Research.
+“Both the open-source IP and the OpenTitan chip will set a new baseline for hardware-based security.
+Seagate considers this high-quality security IP a key enabler of both enhanced storage device integrity and data protection.”
+
+
“It has been a privilege for Giesecke+Devrient to contribute to the success of OpenTitan so far, as we believe that a secure IP block based on OpenTitan will enable smooth, fast and cost-effective integration into larger SoCs, unlocking a host of new use cases, especially in the IoT ecosystem,” says Bernd Müller, Head of Connectivity and IoT Portfolio Strategy at Giesecke+Devrient.
+“With G+D’s trusted embedded operating systems pre-integrated on OpenTitan coupled with our broad portfolio of IoT and connectivity solutions, we are excited for the opportunity this provides us to support customers and projects in this emerging ecosystem.”
+
+
The OpenTitan coalition continues to work in unison to accelerate the project’s momentum.
+Upcoming key milestones include the full production release of the “Darjeeling” integrated OpenTitan secure extension environment (SEE) and the first production release of ‘Chai,’ the integrated OpenTitan SEE with support for secure external flash.
+In addition, the project will release an updated discrete “EarlGrey” chip design, with additional coverage and development.
+
+
About lowRISC
+
+
Founded in 2014 at the University of Cambridge Department of Computer Science and Technology, lowRISC is a not-for-profit company/CIC that provides a neutral home for collaborative engineering to develop and maintain open-source silicon designs and tools for the long term.
+The lowRISC not-for-profit structure combined with full-stack engineering capabilities in-house enables the hosting and management of high-quality projects like OpenTitan via the Silicon Commons approach.
+ ]]>Unveiling Sonata: Affordable CHERI Hardware for Embedded Systemshttps://www.lowrisc.org/news/2024/01/sonata-board-update/https://www.lowrisc.org/news/2024/01/sonata-board-update/Mon, 15 Jan 2024 00:00:00 +0000info@lowrisc.org (lowRISC)The lowRISC®/Sunburst team are pleased to announce that the initial Sonata prototype boards have been manufactured by our wholly owned subsidiary NewAE and are currently being tested, marking a significant milestone towards our goal of making CHERI technology widely available to embedded systems engineers.
diff --git a/news/2024/02/opentitan-commercial-viability/index.html b/news/2024/02/opentitan-commercial-viability/index.html
new file mode 100644
index 00000000..8596f813
--- /dev/null
+++ b/news/2024/02/opentitan-commercial-viability/index.html
@@ -0,0 +1,28 @@
+OpenTitan® Partnership Makes History as First Open-Source Silicon Project to Reach Commercial Availability · lowRISC: Collaborative open silicon engineering
OpenTitan® Partnership Makes History as First Open-Source Silicon Project to Reach Commercial Availability
Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
CAMBRIDGE, England – February 13, 2024 – lowRISC C.I.C., the open silicon ecosystem organization, and the OpenTitan coalition today announced a historic milestone as the first open-source silicon project to reach commercial availability, with validated chips in hand.
+The capstone moment is the result of an unprecedented amount of support and investment by the nine coalition members, including Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient, hosted by the non-profit lowRISC CIC.
OpenTitan® – The World’s First Commercial-Grade Open-Source Silicon is Here!
“I am incredibly proud of the OpenTitan partnership for succeeding where every other project has failed – producing the first commercial quality open-source chip in the world,” said Dr. Gavin Ferris, CEO of lowRISC, OpenTitan’s host organization.
+“This is the culmination of the monumentally hard work of a vibrant and engaged community of contributors focused on a singular goal to achieve what’s never been done before – make open-source silicon work the same way as open-source software.
+I am grateful for this support and can’t wait for what’s to come.”
Google launched the OpenTitan project together with lowRISC and its partners in 2018 with the goal to make a completely transparent and trustworthy secure silicon platform.
+It is the world’s first open-source secure chip to include commercial-grade design verification, top-level testing and continuous integration.
+Capable of serving as the hardware root of trust, OpenTitan ensures that the hardware infrastructure and the software that runs on it remain in their intended, trustworthy state by verifying that the critical system components boot securely using only authorized and verifiable code.
With Google’s support, the project took off from its first year, setting it on a trajectory to make it the most active and successful open-source silicon project in history.
+Throughout its lifetime, the OpenTitan coalition thrived as an open silicon ecosystem, consistently following a well-defined roadmap from discrete to integrated secure silicon designs.
+The project partners are deeply engaged in this process, ensuring that the final designs are adaptable to many applications.
+OpenTitan also has a large and growing community of contributors beyond its formal partners.
+As a whole, the community resolves hundreds of pull requests and issues monthly.
“OpenTitan in silicon is the realization of many years of dedication and hard work from our team.
+It is a significant moment for us and all contributors to the project,” emphasized Miguel Osorio, OpenTitan Lead at Google.
This major milestone follows a series of significant successes for the OpenTitan project in 2023.
+Most critically, the project also accomplished the first discrete silicon tapeout in June 2023.
+In November 2023, the project coalition announced the first SoC secure execution environment, including RoT functionality, which has enabled coalition partners to embed OpenTitan in their SoC and chiplet designs.
Supporting Quotes from OpenTitan Members
“We’ve been privileged to work closely with our OpenTitan coalition partners from early on and are even prouder now to bring the first ‘EarlGrey’ OpenTitan chip design to market, demonstrating our leadership in open, secure ICs,” said Erez Naory, VP of Client and Security Products at Nuvoton.
+“Open-source secure silicon is now proven as a radical leap forward in solving the market’s need for a truly trustworthy foundation.”
“Our mission is to advance the incredible work of the OpenTitan project by delivering an end-to-end supply chain security solution built on an open secure silicon foundation,” said Dom Rizzo, zeroRISC CEO.
+“That we’re able to deliver commercial products so soon after tapeout clearly illustrates the coalition’s momentum.
+With this first, crucial step for open silicon implementations, we look forward to a world where a transparent and trustworthy supply chain is the default.”
“The rigor at the heart of the OpenTitan project’s roadmap has ensured the success of this first-of-its-kind, silicon-proven integrated design,” said Tung-Yi Chan, Vice Chairman and Deputy CEO at Winbond.
+“By proving the viability of securely integrating certified IPs, OpenTitan opens up new possibilities for SoC vendors.
+Winbond supports the OpenTitan initiative with its certified Secure Flash solutions.”
“We’ve benefited tremendously from the collaborative relationships within the OpenTitan partnership,” said Mark Hayter, Founder and Chief Strategy Officer of Rivos Inc.
+“It’s made it easy for us to share our SoC experience to help the coalition provide silicon-proven IP that enables us to integrate RoT into our chiplets.”
“Seagate is a proud consortium member and contributor of the OpenTitan project,” according to Ed Gage, VP of Seagate Research.
+“Both the open-source IP and the OpenTitan chip will set a new baseline for hardware-based security.
+Seagate considers this high-quality security IP a key enabler of both enhanced storage device integrity and data protection.”
“It has been a privilege for Giesecke+Devrient to contribute to the success of OpenTitan so far, as we believe that a secure IP block based on OpenTitan will enable smooth, fast and cost-effective integration into larger SoCs, unlocking a host of new use cases, especially in the IoT ecosystem,” says Bernd Müller, Head of Connectivity and IoT Portfolio Strategy at Giesecke+Devrient.
+“With G+D’s trusted embedded operating systems pre-integrated on OpenTitan coupled with our broad portfolio of IoT and connectivity solutions, we are excited for the opportunity this provides us to support customers and projects in this emerging ecosystem.”
The OpenTitan coalition continues to work in unison to accelerate the project’s momentum.
+Upcoming key milestones include the full production release of the “Darjeeling” integrated OpenTitan secure extension environment (SEE) and the first production release of ‘Chai,’ the integrated OpenTitan SEE with support for secure external flash.
+In addition, the project will release an updated discrete “EarlGrey” chip design, with additional coverage and development.
About lowRISC
Founded in 2014 at the University of Cambridge Department of Computer Science and Technology, lowRISC is a not-for-profit company/CIC that provides a neutral home for collaborative engineering to develop and maintain open-source silicon designs and tools for the long term.
+The lowRISC not-for-profit structure combined with full-stack engineering capabilities in-house enables the hosting and management of high-quality projects like OpenTitan via the Silicon Commons approach.
The lowRISC®/Sunburst team are pleased to announce that the initial Sonata prototype boards have been manufactured by our wholly owned subsidiary NewAE and are currently being tested, marking a significant milestone towards our goal of making CHERI technology widely available to embedded systems engineers.
+
Definitive Project Success is Result of Five Years of Strong Collaboration and Investment by the OpenTitan Coalition to Bring First Trustworthy, Transparent, Secure Silicon Platform to Market
+CAMBRIDGE, England – February 13, 2024 – lowRISC C.I.C., the open silicon ecosystem organization, and the OpenTitan coalition today announced a historic milestone as the first open-source silicon project to reach commercial availability, with validated chips in hand. The capstone moment is the result of an unprecedented amount of support and investment by the nine coalition members, including Google, Winbond, Nuvoton, zeroRISC, Rivos, Western Digital, Seagate, ETH Zurich and Giesecke+Devrient, hosted by the non-profit lowRISC CIC.
The lowRISC®/Sunburst team are pleased to announce that the initial Sonata prototype boards have been manufactured by our wholly owned subsidiary NewAE and are currently being tested, marking a significant milestone towards our goal of making CHERI technology widely available to embedded systems engineers.
lowRISC®’s Sonata Board - powered up and running!
Ibex Inside The CHERIoT Ibex core lies at the heart of the Sonata system. Ibex is a production-quality, open-source 32-bit RISC-V CPU core, written in SystemVerilog.
The Sunburst Project, supported by DSbD/UKRI grant (#107540), focuses on enhancing security within the embedded and operational technology (OpTe) sectors. Its primary goal is to promote the adoption of CHERIoT, an open-source microcontroller technology that integrates CHERI capabilities within the RISC-V architecture.
Today lowRISC and NewAE are pleased to announce we’ve already made significant strides towards that goal, which we’ll briefly review in this blog!
@@ -12,5 +13,5 @@
OpenTitan’s mission is to provide a secure root of trust, which is complemented by a secure processor core. To address this need, we elevated one of the most widely deployed, highest quality RISC-V cores in academia to the industrial-level of quality characteristic of this project.
We are delighted to announce an important development for OpenTitan®: RTL Freeze for the Earl Grey discrete, the first OpenTitan chip tapeout. This milestone is a source of immense pride for lowRISC and our OpenTitan partners, because it’s a concrete demonstration of the success of the Silicon Commons™ approach to making silicon radically more transparent and trustworthy.
In partnership with Nuvoton, a major TPM vendor, this RTL freeze means that the OpenTitan coalition will have engineering samples of the discrete silicon root of trust (RoT) this calendar year.
We are excited to announce today that the OpenTitan project has hit a major tapeout milestone: a feature freeze of its open-source RTL.
Together with our partners, we began the OpenTitan project in 2019 with the goal of producing the world’s first open-source silicon Root of Trust (RoT). With this new achievement we are a step closer to realising that goal.
-Getting to this point has taken a lot of coordinated work, as we’ve had to navigate the many stumbling blocks that have traditionally made open-source silicon development a challenge.
We are thrilled to have been selected as the winner of the OpenUK 2022 Awards Hardware Category and would like to thank OpenUK, the award sponsors StackPublishing, the judges and all our hard working staff at lowRISC without whom this would not be possible.