adc_ctrl |
Low-power controller for a dual-channel ADC with filtering and debouncing capability |
aes |
AES encryption and decryption engine with SCA and FI countermeasures |
aon_timer |
Wakeup and watchdog timers running on a low-power, always-on clock |
ascon |
Ascon authenticated encryption and decryption engine |
csrng |
Takes entropy bits to produce cryptographically secure random numbers for consumption by hardware blocks and by software |
dma |
DMA Controller for the integrated OpenTitan. |
edn |
Distributes random numbers produced by CSRNG to hardware blocks |
entropy_src |
Filters and checks raw entropy bits from a random noise source and forwards them to CSRNG |
gpio |
General-purpose I/O pin control interface for software |
hmac |
Accelerator for SHA-2 256/384/512-based keyed HMAC and the hash function |
i2c |
I2C interface for host and device mode, supporting up to 1 Mbaud data rates |
keymgr |
Managing identities and root keys; shielding confidential assets from software; providing a key derivation interface for software |
keymgr_dpe |
Manage multiple DICE sessions in a DPE-compatible way |
kmac |
Accelerator for Keccak-based keyed hash message authentication code and SHA-3 hash functions; with SCA and FI countermeasures |
lc_ctrl |
Manages device life cycle states and transitions, and controls key manager, flash, OTP, and debug access |
mbx |
DOE mailbox for use as an integrated OpenTitan communication channel. |
otbn |
Programmable coprocessor for asymmetric cryptography with SCA and FI countermeasures |
otp_ctrl |
Interfaces integrated one-time programmable memory, supports scrambling, integrity and secure wipe |
pattgen |
Transmission of short time-dependent data patterns on two clock-parallel output channels |
pwm |
Transmission of pulse-width modulated output signals with adjustable duty cycle |
rom_ctrl |
Interfaces scrambled boot ROM with system bus and KMAC for initial health check after reset |
rv_core_ibex |
Dual-core lockstep 32-bit RISC-V processor running application and control software |
rv_dm |
Enables debug support for Ibex, access protected by life cycle |
rv_timer |
Memory-mapped timer unit implementing RISC-V mtime and mtimecmp registers |
soc_dbg_ctrl |
Control module to enable or disable debug access |
spi_device |
Serial peripheral interface supporting different device modes, suitable for bulk-load of data into and out of the chip |
spi_host |
Serial peripheral interface for host mode, suitable for interfacing external serial NOR flash devices |
sram_ctrl |
Interfacing on-chip SRAM blocks with system bus, supports lightweight scrambling, integrity and secure wipe |
sysrst_ctrl |
Manages board-level reset sequencing, interfaces reset and power manager |
uart |
Full duplex serial communication interface, supports bit rates of up to 1 Mbit/s |
usbdev |
USB 2.0 Full Speed device interface (12 Mbit/s) |