From 5b8c392f24d20595825205e6223fe298d10f9172 Mon Sep 17 00:00:00 2001 From: Robert Schilling Date: Sun, 15 Dec 2024 00:12:29 -0800 Subject: [PATCH] [hw,prim,ram_2p] Add DFT response channel Signed-off-by: Robert Schilling --- .../fpv/tb/prim_fifo_async_sram_adapter_tb.sv | 3 +- hw/ip/prim/prim_ram_1r1w.core | 1 + hw/ip/prim/rtl/prim_ram_1r1w_adv.sv | 6 +- hw/ip/prim/rtl/prim_ram_1r1w_async_adv.sv | 10 +- hw/ip/prim/rtl/prim_ram_2p_async_adv.sv | 6 +- .../prim_generic_ram_2p_pkg.core} | 5 +- .../prim_generic/rtl/prim_generic_ram_1r1w.sv | 4 +- hw/ip/prim_generic/rtl/prim_generic_ram_2p.sv | 4 +- .../rtl/prim_ram_2p_pkg.sv | 4 + hw/ip/spi_device/data/spi_device.hjson | 20 +++- hw/ip/spi_device/doc/interfaces.md | 17 +-- hw/ip/spi_device/pre_dv/tb/spid_readcmd_tb.sv | 3 +- hw/ip/spi_device/pre_dv/tb/spid_upload_tb.sv | 3 +- hw/ip/spi_device/rtl/spi_device.sv | 60 ++++++---- hw/ip/spi_device/rtl/spid_dpram.sv | 22 +++- .../data/autogen/top_darjeeling.gen.hjson | 113 +++++++++++++++++- hw/top_darjeeling/data/top_darjeeling.hjson | 5 +- .../rtl/autogen/top_darjeeling.sv | 7 +- .../data/autogen/top_earlgrey.gen.hjson | 71 ++++++++++- hw/top_earlgrey/data/top_earlgrey.hjson | 3 +- hw/top_earlgrey/rtl/autogen/top_earlgrey.sv | 5 +- 21 files changed, 310 insertions(+), 62 deletions(-) rename hw/ip/{prim/prim_ram_2p_pkg.core => prim_generic/prim_generic_ram_2p_pkg.core} (81%) rename hw/ip/{prim => prim_generic}/rtl/prim_ram_2p_pkg.sv (90%) diff --git a/hw/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv b/hw/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv index 4faac74935760..cb02d7f3927cc 100644 --- a/hw/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv +++ b/hw/ip/prim/fpv/tb/prim_fifo_async_sram_adapter_tb.sv @@ -127,7 +127,8 @@ if (FpgaSram == 1) begin : g_sram_fpga .b_wmask_i (r_sram_wmask ), .b_rdata_o (r_sram_rdata ), - .cfg_i ('0) + .cfg_i ('0), + .cfg_rsp_o () ); end else begin : g_sram_ff logic [SramDw-1:0] mem [2**SramAw]; diff --git a/hw/ip/prim/prim_ram_1r1w.core b/hw/ip/prim/prim_ram_1r1w.core index 18acb86209730..026a6ac51369f 100644 --- a/hw/ip/prim/prim_ram_1r1w.core +++ b/hw/ip/prim/prim_ram_1r1w.core @@ -9,6 +9,7 @@ filesets: primgen_dep: depend: - lowrisc:prim:prim_pkg + - lowrisc:prim:ram_1p_pkg - lowrisc:prim:ram_2p_pkg - lowrisc:prim:primgen diff --git a/hw/ip/prim/rtl/prim_ram_1r1w_adv.sv b/hw/ip/prim/rtl/prim_ram_1r1w_adv.sv index a2924433c0c8f..ff0511f1f9543 100644 --- a/hw/ip/prim/rtl/prim_ram_1r1w_adv.sv +++ b/hw/ip/prim/rtl/prim_ram_1r1w_adv.sv @@ -50,7 +50,8 @@ module prim_ram_1r1w_adv import prim_ram_2p_pkg::*; #( output logic b_rvalid_o, // read response (b_rdata_o) is valid output logic [1:0] b_rerror_o, // Bit1: Uncorrectable, Bit0: Correctable - input ram_2p_cfg_t cfg_i + input ram_2p_cfg_t cfg_i, + output ram_2p_cfg_rsp_t cfg_rsp_o ); prim_ram_1r1w_async_adv #( @@ -77,7 +78,8 @@ module prim_ram_1r1w_adv import prim_ram_2p_pkg::*; #( .b_rdata_o, .b_rvalid_o, .b_rerror_o, - .cfg_i + .cfg_i, + .cfg_rsp_o ); endmodule : prim_ram_1r1w_adv diff --git a/hw/ip/prim/rtl/prim_ram_1r1w_async_adv.sv b/hw/ip/prim/rtl/prim_ram_1r1w_async_adv.sv index 6e9d31b512c57..5597d2475e798 100644 --- a/hw/ip/prim/rtl/prim_ram_1r1w_async_adv.sv +++ b/hw/ip/prim/rtl/prim_ram_1r1w_async_adv.sv @@ -53,7 +53,8 @@ module prim_ram_1r1w_async_adv import prim_ram_2p_pkg::*; #( output logic [1:0] b_rerror_o, // Bit1: Uncorrectable, Bit0: Correctable // config - input ram_2p_cfg_t cfg_i + input ram_2p_cfg_t cfg_i, + output ram_2p_cfg_t cfg_rsp_o ); @@ -91,6 +92,7 @@ module prim_ram_1r1w_async_adv import prim_ram_2p_pkg::*; #( logic [Width-1:0] b_rdata_q, b_rdata_d ; logic [TotalWidth-1:0] b_rdata_sram ; logic [1:0] b_rerror_q, b_rerror_d ; + prim_ram_1p_pkg::ram_1p_cfg_rsp_t cfg_rsp; prim_ram_1r1w #( .MemInitFile (MemInitFile), @@ -111,9 +113,13 @@ module prim_ram_1r1w_async_adv import prim_ram_2p_pkg::*; #( .b_addr_i (b_addr_q), .b_rdata_o (b_rdata_sram), - .cfg_i + .cfg_i, + .cfg_rsp_o (cfg_rsp) ); + // DFT responeses need to match between prim_ram_1p and prim_ram_2p + assign cfg_rsp_o = ram_2p_cfg_rsp_t'(cfg_rsp); + always_ff @(posedge clk_b_i or negedge rst_b_ni) begin if (!rst_b_ni) begin b_rvalid_sram_q <= 1'b0; diff --git a/hw/ip/prim/rtl/prim_ram_2p_async_adv.sv b/hw/ip/prim/rtl/prim_ram_2p_async_adv.sv index 5c93fe2855846..2f2a32efcf8f4 100644 --- a/hw/ip/prim/rtl/prim_ram_2p_async_adv.sv +++ b/hw/ip/prim/rtl/prim_ram_2p_async_adv.sv @@ -58,7 +58,8 @@ module prim_ram_2p_async_adv import prim_ram_2p_pkg::*; #( output logic [1:0] b_rerror_o, // Bit1: Uncorrectable, Bit0: Correctable // config - input ram_2p_cfg_t cfg_i + input ram_2p_cfg_t cfg_i, + output ram_2p_cfg_rsp_t cfg_rsp_o ); @@ -129,7 +130,8 @@ module prim_ram_2p_async_adv import prim_ram_2p_pkg::*; #( .b_wmask_i (b_wmask_q), .b_rdata_o (b_rdata_sram), - .cfg_i + .cfg_i, + .cfg_rsp_o ); always_ff @(posedge clk_a_i or negedge rst_a_ni) begin diff --git a/hw/ip/prim/prim_ram_2p_pkg.core b/hw/ip/prim_generic/prim_generic_ram_2p_pkg.core similarity index 81% rename from hw/ip/prim/prim_ram_2p_pkg.core rename to hw/ip/prim_generic/prim_generic_ram_2p_pkg.core index 074bc6c382e8d..17f56248d9e94 100644 --- a/hw/ip/prim/prim_ram_2p_pkg.core +++ b/hw/ip/prim_generic/prim_generic_ram_2p_pkg.core @@ -3,8 +3,11 @@ CAPI=2: # Licensed under the Apache License, Version 2.0, see LICENSE for details. # SPDX-License-Identifier: Apache-2.0 -name: "lowrisc:prim:ram_2p_pkg" +name: "lowrisc:prim_generic:ram_2p_pkg" description: "Ram 2p package" +virtual: + - "lowrisc:prim:ram_2p_pkg" + filesets: files_rtl: files: diff --git a/hw/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv b/hw/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv index aafecf8adba8f..e166c3f2edd91 100644 --- a/hw/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv +++ b/hw/ip/prim_generic/rtl/prim_generic_ram_1r1w.sv @@ -28,7 +28,8 @@ module prim_generic_ram_1r1w import prim_ram_2p_pkg::*; #( input [Aw-1:0] b_addr_i, output logic [Width-1:0] b_rdata_o, - input ram_2p_cfg_t cfg_i + input ram_2p_cfg_t cfg_i, + output ram_2p_cfg_rsp_t cfg_rsp_o ); // For certain synthesis experiments we compile the design with generic models to get an unmapped @@ -43,6 +44,7 @@ module prim_generic_ram_1r1w import prim_ram_2p_pkg::*; #( logic unused_cfg; assign unused_cfg = ^cfg_i; + assign cfg_rsp_o.done = 1'b0; // Width of internal write mask. Note *_wmask_i input into the module is always assumed // to be the full bit mask. diff --git a/hw/ip/prim_generic/rtl/prim_generic_ram_2p.sv b/hw/ip/prim_generic/rtl/prim_generic_ram_2p.sv index f44e828bfbf44..5d7e091fb38c8 100644 --- a/hw/ip/prim_generic/rtl/prim_generic_ram_2p.sv +++ b/hw/ip/prim_generic/rtl/prim_generic_ram_2p.sv @@ -32,7 +32,8 @@ module prim_generic_ram_2p import prim_ram_2p_pkg::*; #( input logic [Width-1:0] b_wmask_i, output logic [Width-1:0] b_rdata_o, - input ram_2p_cfg_t cfg_i + input ram_2p_cfg_t cfg_i, + output ram_2p_cfg_rsp_t cfg_rsp_o ); // For certain synthesis experiments we compile the design with generic models to get an unmapped @@ -47,6 +48,7 @@ module prim_generic_ram_2p import prim_ram_2p_pkg::*; #( logic unused_cfg; assign unused_cfg = ^cfg_i; + assign cfg_rsp_o.done = 1'b0; // Width of internal write mask. Note *_wmask_i input into the module is always assumed // to be the full bit mask. diff --git a/hw/ip/prim/rtl/prim_ram_2p_pkg.sv b/hw/ip/prim_generic/rtl/prim_ram_2p_pkg.sv similarity index 90% rename from hw/ip/prim/rtl/prim_ram_2p_pkg.sv rename to hw/ip/prim_generic/rtl/prim_ram_2p_pkg.sv index eec37321be731..87702eebb82ef 100644 --- a/hw/ip/prim/rtl/prim_ram_2p_pkg.sv +++ b/hw/ip/prim_generic/rtl/prim_ram_2p_pkg.sv @@ -20,4 +20,8 @@ package prim_ram_2p_pkg; parameter ram_2p_cfg_t RAM_2P_CFG_DEFAULT = '0; + typedef struct packed { + logic done; + } ram_2p_cfg_rsp_t; + endpackage // prim_ram_2p_pkg diff --git a/hw/ip/spi_device/data/spi_device.hjson b/hw/ip/spi_device/data/spi_device.hjson index 0a66663a3feaa..c13cc64987ed8 100644 --- a/hw/ip/spi_device/data/spi_device.hjson +++ b/hw/ip/spi_device/data/spi_device.hjson @@ -280,9 +280,27 @@ { struct: "ram_2p_cfg", package: "prim_ram_2p_pkg", type: "uni", - name: "ram_cfg", + name: "ram_cfg_sys2spi", act: "rcv" } + { struct: "ram_2p_cfg", + package: "prim_ram_2p_pkg", + type: "uni", + name: "ram_cfg_rsp_sys2spi", + act: "req" + } + { struct: "ram_2p_cfg", + package: "prim_ram_2p_pkg", + type: "uni", + name: "ram_cfg_spi2sys", + act: "rcv" + } + { struct: "ram_2p_cfg", + package: "prim_ram_2p_pkg", + type: "uni", + name: "ram_cfg_rsp_spi2sys", + act: "req" + } { struct: "passthrough", package: "spi_device_pkg" type: "req_rsp" diff --git a/hw/ip/spi_device/doc/interfaces.md b/hw/ip/spi_device/doc/interfaces.md index 788d35d71ff23..1d2e99dd85d73 100644 --- a/hw/ip/spi_device/doc/interfaces.md +++ b/hw/ip/spi_device/doc/interfaces.md @@ -18,13 +18,16 @@ Referring to the [Comportable guideline for peripheral device functionality](htt ## [Inter-Module Signals](https://opentitan.org/book/doc/contributing/hw/comportability/index.html#inter-signal-handling) -| Port Name | Package::Struct | Type | Act | Width | Description | -|:------------|:----------------------------|:--------|:------|--------:|:--------------| -| ram_cfg | prim_ram_2p_pkg::ram_2p_cfg | uni | rcv | 1 | | -| passthrough | spi_device_pkg::passthrough | req_rsp | req | 1 | | -| mbist_en | logic | uni | rcv | 1 | | -| sck_monitor | logic | uni | req | 1 | | -| tl | tlul_pkg::tl | req_rsp | rsp | 1 | | +| Port Name | Package::Struct | Type | Act | Width | Description | +|:--------------------|:----------------------------|:--------|:------|--------:|:--------------| +| ram_cfg_sys2spi | prim_ram_2p_pkg::ram_2p_cfg | uni | rcv | 1 | | +| ram_cfg_rsp_sys2spi | prim_ram_2p_pkg::ram_2p_cfg | uni | req | 1 | | +| ram_cfg_spi2sys | prim_ram_2p_pkg::ram_2p_cfg | uni | rcv | 1 | | +| ram_cfg_rsp_spi2sys | prim_ram_2p_pkg::ram_2p_cfg | uni | req | 1 | | +| passthrough | spi_device_pkg::passthrough | req_rsp | req | 1 | | +| mbist_en | logic | uni | rcv | 1 | | +| sck_monitor | logic | uni | req | 1 | | +| tl | tlul_pkg::tl | req_rsp | rsp | 1 | | ## Interrupts diff --git a/hw/ip/spi_device/pre_dv/tb/spid_readcmd_tb.sv b/hw/ip/spi_device/pre_dv/tb/spid_readcmd_tb.sv index 445093cdeba3e..a4c1e175c3bec 100644 --- a/hw/ip/spi_device/pre_dv/tb/spid_readcmd_tb.sv +++ b/hw/ip/spi_device/pre_dv/tb/spid_readcmd_tb.sv @@ -846,7 +846,8 @@ module tb; .b_rdata_o (spi_mem_rdata), .b_rerror_o (spi_mem_rerror), - .cfg_i ('0) + .cfg_i ('0), + .cfg_rsp_o () ); diff --git a/hw/ip/spi_device/pre_dv/tb/spid_upload_tb.sv b/hw/ip/spi_device/pre_dv/tb/spid_upload_tb.sv index b05244ee7e19a..946eda7ea7822 100644 --- a/hw/ip/spi_device/pre_dv/tb/spid_upload_tb.sv +++ b/hw/ip/spi_device/pre_dv/tb/spid_upload_tb.sv @@ -583,7 +583,8 @@ module spid_upload_tb; .b_rdata_o (spi_mem_rdata), .b_rerror_o (spi_mem_rerror), - .cfg_i ('0) + .cfg_i ('0), + .cfg_rsp_o () ); // Arbiter for bus clock diff --git a/hw/ip/spi_device/rtl/spi_device.sv b/hw/ip/spi_device/rtl/spi_device.sv index c799c56ec317b..d9b2055a90292 100644 --- a/hw/ip/spi_device/rtl/spi_device.sv +++ b/hw/ip/spi_device/rtl/spi_device.sv @@ -53,7 +53,12 @@ module spi_device output logic intr_tpm_rdfifo_drop_o, // Memory configuration - input prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_i, + // When using a dual port RAM primitive only this RAM config port is used + input prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_sys2spi_i, + output prim_ram_2p_pkg::ram_2p_cfg_rsp_t ram_cfg_rsp_sys2spi_o, + // When using a 1R1W RAM primitive, both RAM config ports are used + input prim_ram_2p_pkg::ram_2p_cfg_t ram_cfg_spi2sys_i, + output prim_ram_2p_pkg::ram_2p_cfg_rsp_t ram_cfg_rsp_spi2sys_o, // External clock sensor output logic sck_monitor_o, @@ -1815,31 +1820,34 @@ module spi_device .EnableInputPipeline (0), .EnableOutputPipeline(0) ) u_spid_dpram ( - .clk_sys_i (clk_i), - .rst_sys_ni (rst_ni), - - .clk_spi_i (clk_spi_in_buf), - .rst_spi_ni (spi_dpram_rst_n), - - .sys_req_i (mem_a_req), - .sys_write_i (mem_a_write), - .sys_addr_i (mem_a_addr), - .sys_wdata_i (mem_a_wdata), - .sys_wmask_i (mem_a_wmask), - .sys_rvalid_o (mem_a_rvalid), - .sys_rdata_o (mem_a_rdata), - .sys_rerror_o (mem_a_rerror), - - .spi_req_i (mem_b_req), - .spi_write_i (mem_b_write), - .spi_addr_i (mem_b_addr), - .spi_wdata_i (mem_b_wdata), - .spi_wmask_i (mem_b_wmask), - .spi_rvalid_o (mem_b_rvalid), - .spi_rdata_o (mem_b_rdata), - .spi_rerror_o (mem_b_rerror), - - .cfg_i (ram_cfg_i) + .clk_sys_i (clk_i), + .rst_sys_ni (rst_ni), + + .clk_spi_i (clk_spi_in_buf), + .rst_spi_ni (spi_dpram_rst_n), + + .sys_req_i (mem_a_req), + .sys_write_i (mem_a_write), + .sys_addr_i (mem_a_addr), + .sys_wdata_i (mem_a_wdata), + .sys_wmask_i (mem_a_wmask), + .sys_rvalid_o (mem_a_rvalid), + .sys_rdata_o (mem_a_rdata), + .sys_rerror_o (mem_a_rerror), + + .spi_req_i (mem_b_req), + .spi_write_i (mem_b_write), + .spi_addr_i (mem_b_addr), + .spi_wdata_i (mem_b_wdata), + .spi_wmask_i (mem_b_wmask), + .spi_rvalid_o (mem_b_rvalid), + .spi_rdata_o (mem_b_rdata), + .spi_rerror_o (mem_b_rerror), + + .cfg_sys2spi_i (ram_cfg_sys2spi_i), + .cfg_rsp_sys2spi_o (ram_cfg_rsp_sys2spi_o), + .cfg_spi2sys_i (ram_cfg_spi2sys_i), + .cfg_rsp_spi2sys_o (ram_cfg_rsp_spi2sys_o) ); // Register module diff --git a/hw/ip/spi_device/rtl/spid_dpram.sv b/hw/ip/spi_device/rtl/spid_dpram.sv index 646cc3e58534e..8717659a8454a 100644 --- a/hw/ip/spi_device/rtl/spid_dpram.sv +++ b/hw/ip/spi_device/rtl/spid_dpram.sv @@ -45,8 +45,13 @@ module spid_dpram output logic [SramDw-1:0] spi_rdata_o, output logic [1:0] spi_rerror_o, - input ram_2p_cfg_t cfg_i - ); + // When using a dual port RAM primitive only this RAM config port is used + input ram_2p_cfg_t cfg_sys2spi_i, + output ram_2p_cfg_rsp_t cfg_rsp_sys2spi_o, + // When using a 1R1W RAM primitive, both RAM config ports are used + input ram_2p_cfg_t cfg_spi2sys_i, + output ram_2p_cfg_rsp_t cfg_rsp_spi2sys_o +); // SYS Wr, SPI Rd is for eFlash, Mailbox, and SFDP localparam sram_addr_t Sys2SpiOffset = SramEgressIdx; @@ -158,7 +163,8 @@ module spid_dpram .b_rdata_o (spi_rdata_o), .b_rerror_o (spi_rerror_o), - .cfg_i + .cfg_i (cfg_sys2spi_i), + .cfg_rsp_o (cfg_rsp_sys2spi_o) ); logic sys2spi_unused; @@ -174,8 +180,10 @@ module spid_dpram spi2sys_wr_req, spi2sys_wr_addr, spi2sys_rd_req, - spi2sys_rd_addr + spi2sys_rd_addr, + cfg_spi2sys_i }; + assign cfg_rsp_spi2sys_o = '0; end else if (SramType == SramType1r1w) begin : gen_ram1r1w prim_ram_1r1w_async_adv #( .Depth (Sys2SpiDepth), @@ -202,7 +210,8 @@ module spid_dpram .b_rvalid_o (spi_rvalid_o), .b_rerror_o (spi_rerror_o), - .cfg_i + .cfg_i (cfg_sys2spi_i), + .cfg_rsp_o (cfg_rsp_sys2spi_o) ); prim_ram_1r1w_async_adv #( @@ -231,7 +240,8 @@ module spid_dpram .b_rvalid_o (sys_rvalid_o), .b_rerror_o (sys_rerror_o), - .cfg_i + .cfg_i (cfg_spi2sys_i), + .cfg_rsp_o (cfg_rsp_spi2sys_o) ); end diff --git a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson index 4b7691144acb3..bfb709e4936ec 100644 --- a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson +++ b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson @@ -740,7 +740,33 @@ inter_signal_list: [ { - name: ram_cfg + name: ram_cfg_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: rcv + width: 1 + inst_name: spi_device + default: "" + top_signame: ast_spi_ram_2p_cfg + index: -1 + } + { + name: ram_cfg_rsp_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + default: "" + external: true + top_signame: spi_device_ram_2p_cfg_rsp_sys2spi + conn_type: false + index: -1 + } + { + name: ram_cfg_spi2sys struct: ram_2p_cfg package: prim_ram_2p_pkg type: uni @@ -751,6 +777,20 @@ top_signame: ast_spi_ram_2p_cfg index: -1 } + { + name: ram_cfg_rsp_spi2sys + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + default: "" + external: true + top_signame: spi_device_ram_2p_cfg_rsp_spi2sys + conn_type: false + index: -1 + } { name: passthrough struct: passthrough @@ -9436,7 +9476,8 @@ ] ast.spi_ram_2p_cfg: [ - spi_device.ram_cfg + spi_device.ram_cfg_sys2spi + spi_device.ram_cfg_spi2sys ] ast.rom_cfg: [ @@ -10081,6 +10122,8 @@ sram_ctrl_mbox.cfg_rsp: sram_ctrl_mbox_ram_1p_cfg_rsp otbn.ram_cfg_rsp_imem: otbn_imem_ram_1p_cfg_rsp otbn.ram_cfg_rsp_dmem: otbn_dmem_ram_1p_cfg_rsp + spi_device.ram_cfg_rsp_sys2spi: spi_device_ram_2p_cfg_rsp_sys2spi + spi_device.ram_cfg_rsp_spi2sys: spi_device_ram_2p_cfg_rsp_spi2sys pwrmgr_aon.boot_status: pwrmgr_boot_status clkmgr_aon.jitter_en: clk_main_jitter_en clkmgr_aon.io_clk_byp_req: io_clk_byp_req @@ -18316,7 +18359,33 @@ index: -1 } { - name: ram_cfg + name: ram_cfg_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: rcv + width: 1 + inst_name: spi_device + default: "" + top_signame: ast_spi_ram_2p_cfg + index: -1 + } + { + name: ram_cfg_rsp_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + default: "" + external: true + top_signame: spi_device_ram_2p_cfg_rsp_sys2spi + conn_type: false + index: -1 + } + { + name: ram_cfg_spi2sys struct: ram_2p_cfg package: prim_ram_2p_pkg type: uni @@ -18327,6 +18396,20 @@ top_signame: ast_spi_ram_2p_cfg index: -1 } + { + name: ram_cfg_rsp_spi2sys + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + default: "" + external: true + top_signame: spi_device_ram_2p_cfg_rsp_spi2sys + conn_type: false + index: -1 + } { name: passthrough struct: passthrough @@ -24568,6 +24651,30 @@ index: -1 netname: otbn_dmem_ram_1p_cfg_rsp } + { + package: prim_ram_2p_pkg + struct: ram_2p_cfg + signame: spi_device_ram_2p_cfg_rsp_sys2spi_o + width: 1 + type: uni + default: "" + direction: out + conn_type: false + index: -1 + netname: spi_device_ram_2p_cfg_rsp_sys2spi + } + { + package: prim_ram_2p_pkg + struct: ram_2p_cfg + signame: spi_device_ram_2p_cfg_rsp_spi2sys_o + width: 1 + type: uni + default: "" + direction: out + conn_type: false + index: -1 + netname: spi_device_ram_2p_cfg_rsp_spi2sys + } { package: pwrmgr_pkg struct: pwr_boot_status diff --git a/hw/top_darjeeling/data/top_darjeeling.hjson b/hw/top_darjeeling/data/top_darjeeling.hjson index 7abcd1c1e76a9..d68a3aed0e681 100644 --- a/hw/top_darjeeling/data/top_darjeeling.hjson +++ b/hw/top_darjeeling/data/top_darjeeling.hjson @@ -1120,7 +1120,8 @@ 'sram_ctrl_ret_aon.cfg', 'sram_ctrl_mbox.cfg', 'rv_core_ibex.ram_cfg'], - 'ast.spi_ram_2p_cfg' : ['spi_device.ram_cfg'], + 'ast.spi_ram_2p_cfg' : ['spi_device.ram_cfg_sys2spi', + 'spi_device.ram_cfg_spi2sys'] 'ast.rom_cfg' : ['rom_ctrl0.rom_cfg', 'rom_ctrl1.rom_cfg'], 'alert_handler.crashdump' : ['rstmgr_aon.alert_dump'], @@ -1315,6 +1316,8 @@ 'sram_ctrl_mbox.cfg_rsp' : 'sram_ctrl_mbox_ram_1p_cfg_rsp', 'otbn.ram_cfg_rsp_imem' : 'otbn_imem_ram_1p_cfg_rsp', 'otbn.ram_cfg_rsp_dmem' : 'otbn_dmem_ram_1p_cfg_rsp', + 'spi_device.ram_cfg_rsp_sys2spi' : 'spi_device_ram_2p_cfg_rsp_sys2spi', + 'spi_device.ram_cfg_rsp_spi2sys' : 'spi_device_ram_2p_cfg_rsp_spi2sys', 'pwrmgr_aon.boot_status' : 'pwrmgr_boot_status', 'clkmgr_aon.jitter_en' : 'clk_main_jitter_en', 'clkmgr_aon.io_clk_byp_req' : 'io_clk_byp_req', diff --git a/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv b/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv index d90f760cdc2d8..afa81def82486 100644 --- a/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv +++ b/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv @@ -171,6 +171,8 @@ module top_darjeeling #( output prim_ram_1p_pkg::ram_1p_cfg_rsp_t sram_ctrl_mbox_ram_1p_cfg_rsp_o, output prim_ram_1p_pkg::ram_1p_cfg_rsp_t otbn_imem_ram_1p_cfg_rsp_o, output prim_ram_1p_pkg::ram_1p_cfg_rsp_t otbn_dmem_ram_1p_cfg_rsp_o, + output prim_ram_2p_pkg::ram_2p_cfg_t spi_device_ram_2p_cfg_rsp_sys2spi_o, + output prim_ram_2p_pkg::ram_2p_cfg_t spi_device_ram_2p_cfg_rsp_spi2sys_o, output pwrmgr_pkg::pwr_boot_status_t pwrmgr_boot_status_o, output prim_mubi_pkg::mubi4_t clk_main_jitter_en_o, output prim_mubi_pkg::mubi4_t io_clk_byp_req_o, @@ -1048,7 +1050,10 @@ module top_darjeeling #( .alert_rx_i ( alert_rx[2:2] ), // Inter-module signals - .ram_cfg_i(ast_spi_ram_2p_cfg), + .ram_cfg_sys2spi_i(ast_spi_ram_2p_cfg), + .ram_cfg_rsp_sys2spi_o(spi_device_ram_2p_cfg_rsp_sys2spi_o), + .ram_cfg_spi2sys_i(ast_spi_ram_2p_cfg), + .ram_cfg_rsp_spi2sys_o(spi_device_ram_2p_cfg_rsp_spi2sys_o), .passthrough_o(spi_device_passthrough_req), .passthrough_i(spi_device_passthrough_rsp), .mbist_en_i('0), diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson index 586cbca8ffa3d..bd7b88b1534e9 100644 --- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson +++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson @@ -989,7 +989,29 @@ inter_signal_list: [ { - name: ram_cfg + name: ram_cfg_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: rcv + width: 1 + inst_name: spi_device + default: "" + top_signame: ast_spi_ram_2p_cfg + index: -1 + } + { + name: ram_cfg_rsp_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + index: -1 + } + { + name: ram_cfg_spi2sys struct: ram_2p_cfg package: prim_ram_2p_pkg type: uni @@ -1000,6 +1022,16 @@ top_signame: ast_spi_ram_2p_cfg index: -1 } + { + name: ram_cfg_rsp_spi2sys + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + index: -1 + } { name: passthrough struct: passthrough @@ -9153,7 +9185,8 @@ ] ast.spi_ram_2p_cfg: [ - spi_device.ram_cfg + spi_device.ram_cfg_sys2spi + spi_device.ram_cfg_spi2sys ] ast.usb_ram_1p_cfg: [ @@ -17331,7 +17364,29 @@ index: -1 } { - name: ram_cfg + name: ram_cfg_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: rcv + width: 1 + inst_name: spi_device + default: "" + top_signame: ast_spi_ram_2p_cfg + index: -1 + } + { + name: ram_cfg_rsp_sys2spi + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + index: -1 + } + { + name: ram_cfg_spi2sys struct: ram_2p_cfg package: prim_ram_2p_pkg type: uni @@ -17342,6 +17397,16 @@ top_signame: ast_spi_ram_2p_cfg index: -1 } + { + name: ram_cfg_rsp_spi2sys + struct: ram_2p_cfg + package: prim_ram_2p_pkg + type: uni + act: req + width: 1 + inst_name: spi_device + index: -1 + } { name: passthrough struct: passthrough diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson index 6630ab0bc5c02..e8ea8df3f2ac3 100644 --- a/hw/top_earlgrey/data/top_earlgrey.hjson +++ b/hw/top_earlgrey/data/top_earlgrey.hjson @@ -1086,7 +1086,8 @@ 'sram_ctrl_main.cfg', 'sram_ctrl_ret_aon.cfg', 'rv_core_ibex.ram_cfg'], - 'ast.spi_ram_2p_cfg' : ['spi_device.ram_cfg'], + 'ast.spi_ram_2p_cfg' : ['spi_device.ram_cfg_sys2spi', + 'spi_device.ram_cfg_spi2sys'] 'ast.usb_ram_1p_cfg' : ['usbdev.ram_cfg'], 'ast.rom_cfg' : ['rom_ctrl.rom_cfg'], 'alert_handler.crashdump' : ['rstmgr_aon.alert_dump'], diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv index 8b7954a4202be..933c89a70169d 100644 --- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv +++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv @@ -1241,7 +1241,10 @@ module top_earlgrey #( .alert_rx_i ( alert_rx[5:5] ), // Inter-module signals - .ram_cfg_i(ast_spi_ram_2p_cfg), + .ram_cfg_sys2spi_i(ast_spi_ram_2p_cfg), + .ram_cfg_rsp_sys2spi_o(), + .ram_cfg_spi2sys_i(ast_spi_ram_2p_cfg), + .ram_cfg_rsp_spi2sys_o(), .passthrough_o(spi_device_passthrough_req), .passthrough_i(spi_device_passthrough_rsp), .mbist_en_i('0),