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[lynchaj]

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[lynchaj]

First post! :-)

Andrew Lynch

[Vackon]

Hi,
I found your project and I became interested.
I built RC2014, but your project is much more robust and better configured.
I ordered the boards today - Clock, CPU, RAM, ROM and UART.
It's a pity you didn't use the SIO chip for the serial board anymore.
I have to order 16C550 :-) .
Unfortunately I will have to combine TTL chips - F, ALS, LS and HCT. I'm only planning a 4MHz speed, so maybe it won't matter.
Please, do you have experience with chip mixing at slow speed?
Thank you and have a nice day
Jan

[lynchaj]

Hi Jan OK, that's great! Yes, the default Z80 Serial V2/V3 uses 16C550 UARTs for backward compatibility sake with Z80 SBC but the soon to be released Z80 CTCDART V1 board will use the DART or SIO/0 by default. It should be out in a few days and I am expecting PCB delivery soon. You can also use other SIO type chips with different configuration just like the ECB Zilog Peripherals board. I think you could use the Z80 CTCDART as you primary terminal board but I would wait a few days to see what happens in build and test. Some people really like DART and SIO/0 so that's cool. At 4 MHz you can safely mix TTL families although I recommend 74LS whenever possible with the exception of the logic on Z80 RAM and Z80 ROM I specify 74F for speed purposes. At 4 MHz though it probably won't matter and 74LS will work just fine. I use a sprinkling of 74HCT components like for 74HCT688 where speed is generally less of an issue. I've had a one-time problem with 74ALS245 on the Z80 Serial V3 board because I think the 16C550 is sensitive to the timing but that's really about it. On other boards it works fine so I just swapped it. Best of luck! Thanks, and please post your progress so I can see how you're doing and help out if needed. Andrew Lynch On Tuesday, December 28, 2021, 08:18:25 AM EST, Vackon ***@***.***> wrote: Hi, I found your project and I became interested. I built RC2014, but your project is much more robust and better configured. I ordered the boards today - Clock, CPU, RAM, ROM and UART. It's a pity you didn't use the SIO chip for the serial board anymore. I have to order 16C550 :-) . Unfortunately I will have to combine TTL chips - F, ALS, LS and HCT. I'm only planning a 4MHz speed, so maybe it won't matter. Please, do you have experience with chip mixing at slow speed? Thank you and have a nice day Jan — Reply to this email directly, view it on GitHub, or unsubscribe. Triage notifications on the go with GitHub Mobile for iOS or Android. You are receiving this because you authored the thread.Message ID: ***@***.***>

[Vackon]

Hi,
thanks for the info.
I have it as a low-cost hobby :-), I use the cheapest delivery from JLCB to the Czech Republic, so I have to wait 20 days :-).
I'll have time to get all the parts.
I still have a question about the motherboard.
The little 8 slots is very cramped
I prefer the big 16 slots.
Are you planning to make any changes to it now? Upgrade or bug fixes?
Can I order it?
Didn't you try to combine two small ones into one big one? E.g. Flat cable.
Each of your boards has LS244 / LS245 input drivers and is very robust, so it shouldn't be a problem to connect over longer distances, should it?
Thanks
Jan

[lynchaj]

Hi Jan Yes, you can order either the 8 slot backplane or the 16 slot backplane. You just go straight to JLCPCB or your favorite PCB house -- no middle man marking up the prices of PCBs. You get them straight from the source at lowest cost. I think at some point there will be an upgrade to the 16 slot backplane to make it even larger and to add IO connectors. That will probably be the backplane V3 though. Both backplanes are available to use and the Gerbers are on the nhyodyne repo site. I like the smaller backplane for testing new boards and the larger one for the main system. I am not aware of any problems requiring fixes on the 16 slot backplane but things might come out later. I think you could connect two smaller backplanes together with a 50 pin ribbon cable (male 50 pin IDC on both sides, keeping the ribbon cable as short as necessary). Although I would add power to the second board so it is not trying to pull large amperage through the ribbon cable. The bus buffers and transceivers should have plenty of drive to push the signal through the ribbon cable. I have not tried joining the backplanes together so I don't know how far they can be separated. I would just give it a try and post your results. You can always shorten the cable and recrimp a new connector. If you see anything in your build on any board that is unclear in documentation or needs improvement please post and I will try and fix it. As people find things I make new board revisions so PCB respins are coming out all the time. Yes, the designs include bus buffers and transceivers for all signals on the bus. I try to keep the bus as a no-man's-land and do not let bus signals directly into the board without being buffered in some fashion. This protects the internal board circuitry and provides some protection against mis-connection. It is much cheaper to replace a blown 74ls244 than to replace a capital chip like an 8568 or V9938. Also bus buffers and transceivers are very robust and can take a horrific beating that most capital chips just can't. I try to avoid accidents but sometimes they just happen. Thanks, and best of luck with your build! Please post your progress and photos so others can learn and help. Andrew Lynch On Tuesday, December 28, 2021, 09:29:42 AM EST, Vackon ***@***.***> wrote: Hello, thanks for the info. I have it as a low-cost hobby :-), I use the cheapest delivery from JLCB to the Czech Republic, so I have to wait 20 days :-). I'll have time to get all the parts. I still have a question about the motherboard. The little 8 slots is very cramped I prefer the big 16 slots. Are you planning to make any changes to it now? Upgrade or bug fixes? Can I order it? Didn't you try to combine two small ones into one big one? E.g. Flat cable. Each of your boards has LS244 / LS245 input drivers and is very robust, so it shouldn't be a problem to connect over longer distances, should it? Thanks Jan — Reply to this email directly, view it on GitHub, or unsubscribe. Triage notifications on the go with GitHub Mobile for iOS or Android. You are receiving this because you authored the thread.Message ID: ***@***.***>

[Vackon]

Hi,
boards ordered, also the rest of the chips I don't have.

I will be studying your board design for now. He is very robust, smart and also interesting.
I only have experience with a simple Z80 design like the RC2014.

I was very interested in your design Wait state generator circuit.
Please, did you need to set wait cycles?

I still have a question about the clock board. Please, what are the uses or plans now with User LED1, LED2 and speaker?
THX
Jan

[lynchaj]

Hi Jan Great! I am looking forward to your build! It sounds like fun Regarding the wait state generator, I have not used it except to verify it work just fine. Since I am using 20 MHz CMOS Z80 CPUs there isn't any need for wait states yet. What few boards which require throttling the CPU use the WAIT# line to tailor their needs per application. The intent of the wait state generator is for upcoming legacy peripherals like ancient ROMs, sound chips, and anything else people come up with. It is more of a provision right now awaiting a good application. It works fine but I haven't really needed it yet. I think someone will cross the threshold sooner or later though. Much better to have it and not need it than to need it than need it and not have it. I presently set the memory wait states to none and IO to one as per Z80 defaults. RomWBW uses the Z80 clock LED0, LED1, and speaker during the boot process. You can tell where the CPU is in the code based on it's responses. Very handy for debugging start up issues. Thanks, Andrew Lynch On Saturday, January 1, 2022, 03:21:22 PM EST, Vackon ***@***.***> wrote: Hi, boards ordered, also the rest of the chips I don't have. I will be studying your board design for now. He is very robust, smart and also interesting. I only have experience with a simple Z80 design like the RC2014. I was very interested in your design Wait state generator circuit. Please, did you need to set wait cycles? I still have a question about the clock board. Please, what are the uses or plans now with User LED1, LED2 and speaker? THX Jan — Reply to this email directly, view it on GitHub, or unsubscribe. Triage notifications on the go with GitHub Mobile for iOS or Android. You are receiving this because you authored the thread.Message ID: ***@***.***>

[Vackon]

Hi,
thanks for the addition. I understand it now.
Now I'm going to study RAM and ROM board mapping :-).
Unfortunately, I still do not have an activated account at https://www.retrobrewcomputers.org/forum.
Can i have one question for DSKY V3?
What is the function of the LEDs D0 to D30 under the buttons? I still can't figure it out.
Thanks a lot for the help.
Jan

[lynchaj]

Hi Jan The LEDs under the buttons on the keyboard are for illuminated key switches. They can be selectively turned on and off as needed. They can show the key being pressed or light up so you can see the keyboard under less than bright lights. Also, they just look cool so that might be they're main purpose. You can never have enough blinkenlights! Dan Werner is the designer of DSKY V3 and maybe he can explain better. I think it's a great design and it works well. Thanks, Andrew Lynch On Sunday, January 2, 2022, 09:27:11 AM EST, Vackon ***@***.***> wrote: Hi, thanks for the addition. I understand it now. Now I'm going to study RAM and ROM board mapping :-). Unfortunately, I still do not have an activated account at https://www.retrobrewcomputers.org/forum. Can i have one question for DSKY V3? What is the function of the LEDs D0 to D30 under the buttons? I still can't figure it out. Thanks a lot for the help. Jan — Reply to this email directly, view it on GitHub, or unsubscribe. Triage notifications on the go with GitHub Mobile for iOS or Android. You are receiving this because you authored the thread.Message ID: ***@***.***>

[Vackon]

Hi,
I would have a question again.
I study RAM and ROM boards. Please, I'm reading your schematic correctly, that you work with memory just like on a N8VEM computer?
Same ports, similar decoding logic, but on two separate boards, right?
https://obsolescence.wixsite.com/obsolescence/the-n8vem-sbc
Have a nice day
John
PS: I already have all the parts, I'm waiting for the PCBs, they're on their way.

[lynchaj]

Hi John The RAM and ROM boards work similar to the original Z80 SBC but there is a difference. Since the original Z80 SBC had RAM and ROM in close proximity and sharing logic if the ROM were switched out by MPCL then the RAM would automatically fill in behind it. This is actually a big flaw in the design because there is no way to select no memory in the address space. The Z80 MBC RAM and ROM boards are fully independent and can be enabled or disabled separately. If you switch out the ROM you have to take steps to enable the RAM to backfill it. You can also deselect both RAM and ROM and use whatever memory is present on the bus which is handy for legacy ROM peripherals, shared memory devices, etc. Those kinds of things the original Z80 SBC could not use. From a practical difference the Z80 SBC and Z80 MBC are very similar with MPCLs but with the Z80 MBC you have to take care to enable memory and not rely on defaults. The difference in RomWBW between the Z80 SBC and Z80 MBC is like one line of code. Very little and highly compatible. Most programs will not notice the difference but there is a difference. Another difference is the Z80 RAM and Z80 ROM boards support "boot" mode. If the boot jumper is present they are active after reset. If not, the boards remain passive and have to be activated. This allows for multiple RAM and ROM boards present in the system for more than 1MB RAM or 1MB ROM. Only one each of Z80 RAM and Z80 ROM can be boot enabled per system or bus contention. Thanks, Andrew Lynch On Sunday, January 9, 2022, 04:04:24 PM EST, Vackon ***@***.***> wrote: Hi, I would have a question again. I study RAM and ROM boards. Please, I'm reading your schematic correctly, that you work with memory just like on a N8VEM computer? Same ports, similar decoding logic, but on two separate boards, right? https://obsolescence.wixsite.com/obsolescence/the-n8vem-sbc Have a nice day John PS: I already have all the parts, I'm waiting for the PCBs, they're on their way. — Reply to this email directly, view it on GitHub, or unsubscribe. Triage notifications on the go with GitHub Mobile for iOS or Android. You are receiving this because you authored the thread.Message ID: ***@***.***>

[Vackon]

Hi,
Thank you for adding information.
Your design is very robust and fully configurable.
I hope I can OK set the jumpers and run RomWbW from the first boot EPROM on the ROM card :-).
Thanks
John

[lynchaj]

Hi John Great! Be sure to use RomWBW-dev branch because it supports Z80 MBC directly Good luck! Thanks, Andrew Lynch On Tuesday, January 11, 2022, 03:40:42 PM EST, Vackon ***@***.***> wrote: Hi, Thank you for adding information. Your design is very robust and fully configurable. I hope I can OK set the jumpers and run RomWbW from the first boot EPROM on the ROM card :-). Thanks John — Reply to this email directly, view it on GitHub, or unsubscribe. Triage notifications on the go with GitHub Mobile for iOS or Android. You are receiving this because you authored the thread.Message ID: ***@***.***>

[rabs664]

Hi, I have not fully read through your project but it looks great. Thanks for sharing.

I am very much a novice and started a about a year ago learning about the z80 and the associated family of peripherals.

I have built myself a very, very, simple modular z80 system, including an 8255 PIO, CTC and DART but now I am,looking at the DMA.

Thanks Rob