From bf26f18df89099e491188d5382b990e190dfe450 Mon Sep 17 00:00:00 2001 From: Huang Yang Date: Mon, 20 May 2024 11:21:18 +0800 Subject: [PATCH] cpu: add loongson architecture support --- CMakeLists.txt | 2 ++ README.md | 3 ++- cmake/platform.cmake | 2 ++ src/cpu/README.md | 1 + src/cpu/platform.hpp | 10 ++++++++-- 5 files changed, 15 insertions(+), 3 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index af2522a0721..cb79b2edef4 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -95,6 +95,8 @@ if(NOT DNNL_TARGET_ARCH) set(DNNL_TARGET_ARCH "S390X") elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "^(rv.*|RV.*|riscv.*|RISCV.*)") set(DNNL_TARGET_ARCH "RV64") + elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "^(loongarch64.*|LOONGARCH64.*)") + set(DNNL_TARGET_ARCH "LOONGARCH64") else() set(DNNL_TARGET_ARCH "X64") endif() diff --git a/README.md b/README.md index accae32ea35..5902e02fd6c 100644 --- a/README.md +++ b/README.md @@ -74,10 +74,11 @@ oneDNN supports platforms based on the following architectures: - [OpenPOWER](https://openpowerfoundation.org/) / [IBM Power ISA](https://en.wikipedia.org/wiki/Power_ISA). - [IBMz z/Architecture (s390x)](https://en.wikipedia.org/wiki/Z/Architecture). - [RISC-V 64-bit (RV64)](https://en.wikipedia.org/wiki/RISC-V). +- [LOONGARCH 64 bit](https://docs.kernel.org/arch/loongarch/introduction.html). > **WARNING** > -> Power ISA (PPC64), IBMz (s390x), and RISC-V (RV64) support is +> Power ISA (PPC64), IBMz (s390x), RISC-V (RV64) and Loongson (LOONGARCH64) support is > **experimental** with limited testing validation. The library is optimized for the following CPUs: diff --git a/cmake/platform.cmake b/cmake/platform.cmake index b8cd44b5235..648014ca115 100644 --- a/cmake/platform.cmake +++ b/cmake/platform.cmake @@ -363,6 +363,8 @@ elseif(UNIX OR MINGW) elseif(DNNL_TARGET_ARCH STREQUAL "RV64") # G = General-purpose extensions, C = Compression extension (very common). append(DEF_ARCH_OPT_FLAGS "-march=rv64gc") + elseif(DNNL_TARGET_ARCH STREQUAL "LOONGARCH64") + append(DEF_ARCH_OPT_FLAGS "-march=loongarch64") elseif(DNNL_TARGET_ARCH STREQUAL "X64") platform_gnu_x64_arch_ccxx_flags(DEF_ARCH_OPT_FLAGS) endif() diff --git a/src/cpu/README.md b/src/cpu/README.md index 798aff47510..fe85e6d0739 100644 --- a/src/cpu/README.md +++ b/src/cpu/README.md @@ -46,6 +46,7 @@ enable or disable parts of code. There the following macros defined: - `DNNL_PPC64` is 1 on OpenPOWER / IBM Power architecture; - `DNNL_S390X` is 1 on IBMz / s390x architecture; - `DNNL_RV64` is 1 on RISC-V architecture; +- `DNNL_LOONGARCH64` is 1 on Loongson LOONGARCH64 architecture; - `DNNL_ARCH_GENERIC` is 1 on other platforms. Only one of the macros above is defined to 1. All others are defined to 0. diff --git a/src/cpu/platform.hpp b/src/cpu/platform.hpp index 1de81f578e6..523e48e03b8 100644 --- a/src/cpu/platform.hpp +++ b/src/cpu/platform.hpp @@ -30,12 +30,13 @@ // - DNNL_PPC64 // - DNNL_S390X // - DNNL_RV64 +// - DNNL_LOONGARCH64 // - DNNL_ARCH_GENERIC // Target architecture macro is set to 1, others to 0. All macros are defined. #if defined(DNNL_X64) + defined(DNNL_AARCH64) + defined(DNNL_PPC64) \ + defined(DNNL_S390X) + defined(DNNL_RV64) \ - + defined(DNNL_ARCH_GENERIC) \ + + defined(DNNL_LOONGARCH64) + defined(DNNL_ARCH_GENERIC) \ == 0 #if defined(__x86_64__) || defined(_M_X64) #define DNNL_X64 1 @@ -47,6 +48,8 @@ #define DNNL_S390X 1 #elif defined(__riscv) #define DNNL_RV64 1 +#elif defined(__loongarch64) +#define DNNL_LOONGARCH64 1 #else #define DNNL_ARCH_GENERIC 1 #endif @@ -54,7 +57,7 @@ #if defined(DNNL_X64) + defined(DNNL_AARCH64) + defined(DNNL_PPC64) \ + defined(DNNL_S390X) + defined(DNNL_RV64) \ - + defined(DNNL_ARCH_GENERIC) \ + + defined(DNNL_LOONGARCH64) + defined(DNNL_ARCH_GENERIC) \ != 1 #error One and only one architecture should be defined at a time #endif @@ -74,6 +77,9 @@ #if !defined(DNNL_RV64) #define DNNL_RV64 0 #endif +#if !defined(DNNL_LOONGARCH64) +#define DNNL_LOONGARCH64 0 +#endif #if !defined(DNNL_ARCH_GENERIC) #define DNNL_ARCH_GENERIC 0 #endif