From 6f6b5f2c7cbaf9dae38e5896135c08e28bcdcdbf Mon Sep 17 00:00:00 2001 From: omarahmed1111 Date: Fri, 23 Feb 2024 16:09:53 +0000 Subject: [PATCH] Add some missing validations in CTS --- test/conformance/device/urDeviceGet.cpp | 36 ++++++++ .../enqueue/urEnqueueMemBufferMap.cpp | 13 ++- .../memory/memory_adapter_cuda.match | 15 +++ .../memory/memory_adapter_hip.match | 15 +++ .../memory/memory_adapter_native_cpu.match | 37 ++++++++ .../memory/memory_adapter_opencl.match | 22 +++++ test/conformance/memory/urMemBufferCreate.cpp | 12 +++ test/conformance/memory/urMemImageCreate.cpp | 92 +++++++++++++++++++ .../platform/urPlatformGetInfo.cpp | 12 ++- test/conformance/program/urProgramBuild.cpp | 5 + .../program/urProgramCreateWithIL.cpp | 9 ++ .../queue/queue_adapter_native_cpu.match | 9 ++ test/conformance/queue/urQueueCreate.cpp | 11 ++- .../testing/include/uur/fixtures.h | 20 ++++ 14 files changed, 301 insertions(+), 7 deletions(-) diff --git a/test/conformance/device/urDeviceGet.cpp b/test/conformance/device/urDeviceGet.cpp index e8aa356a58..5ce4c45906 100644 --- a/test/conformance/device/urDeviceGet.cpp +++ b/test/conformance/device/urDeviceGet.cpp @@ -35,6 +35,42 @@ TEST_F(urDeviceGetTest, SuccessSubsetOfDevices) { } } +struct urDeviceGetTestWithDeviceTypeParam + : uur::urAllDevicesTest, + ::testing::WithParamInterface { + + void SetUp() override { + UUR_RETURN_ON_FATAL_FAILURE(uur::urAllDevicesTest::SetUp()); + } +}; + +INSTANTIATE_TEST_SUITE_P( + , urDeviceGetTestWithDeviceTypeParam, + ::testing::Values(UR_DEVICE_TYPE_DEFAULT, UR_DEVICE_TYPE_GPU, + UR_DEVICE_TYPE_CPU, UR_DEVICE_TYPE_FPGA, + UR_DEVICE_TYPE_MCA, UR_DEVICE_TYPE_VPU), + [](const ::testing::TestParamInfo &info) { + std::stringstream ss; + ss << info.param; + return ss.str(); + }); + +TEST_P(urDeviceGetTestWithDeviceTypeParam, Success) { + ur_device_type_t device_type = GetParam(); + uint32_t count = 0; + ASSERT_SUCCESS(urDeviceGet(platform, device_type, 0, nullptr, &count)); + ASSERT_GE(devices.size(), count); + + if (count > 0) { + std::vector devices(count); + ASSERT_SUCCESS( + urDeviceGet(platform, device_type, count, devices.data(), nullptr)); + for (auto device : devices) { + ASSERT_NE(nullptr, device); + } + } +} + TEST_F(urDeviceGetTest, InvalidNullHandlePlatform) { uint32_t count; ASSERT_EQ_RESULT( diff --git a/test/conformance/enqueue/urEnqueueMemBufferMap.cpp b/test/conformance/enqueue/urEnqueueMemBufferMap.cpp index 247c9bc3df..4e9af10592 100644 --- a/test/conformance/enqueue/urEnqueueMemBufferMap.cpp +++ b/test/conformance/enqueue/urEnqueueMemBufferMap.cpp @@ -21,14 +21,21 @@ TEST_P(urEnqueueMemBufferMapTest, SuccessRead) { } } -TEST_P(urEnqueueMemBufferMapTest, SuccessWrite) { +using urEnqueueMemBufferMapTestWithWriteFlagParam = + uur::urMemBufferQueueTestWithParam; +UUR_TEST_SUITE_P(urEnqueueMemBufferMapTestWithWriteFlagParam, + ::testing::Values(UR_MAP_FLAG_WRITE, + UR_MAP_FLAG_WRITE_INVALIDATE_REGION), + uur::deviceTestWithParamPrinter); + +TEST_P(urEnqueueMemBufferMapTestWithWriteFlagParam, SuccessWrite) { const std::vector input(count, 0); ASSERT_SUCCESS(urEnqueueMemBufferWrite(queue, buffer, true, 0, size, input.data(), 0, nullptr, nullptr)); uint32_t *map = nullptr; - ASSERT_SUCCESS(urEnqueueMemBufferMap(queue, buffer, true, UR_MAP_FLAG_WRITE, - 0, size, 0, nullptr, nullptr, + ASSERT_SUCCESS(urEnqueueMemBufferMap(queue, buffer, true, getParam(), 0, + size, 0, nullptr, nullptr, (void **)&map)); for (unsigned i = 0; i < count; ++i) { map[i] = 42; diff --git a/test/conformance/memory/memory_adapter_cuda.match b/test/conformance/memory/memory_adapter_cuda.match index 5fe265ae8e..891005ceba 100644 --- a/test/conformance/memory/memory_adapter_cuda.match +++ b/test/conformance/memory/memory_adapter_cuda.match @@ -1,6 +1,20 @@ urMemBufferCreateWithNativeHandleTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}_ {{OPT}}urMemGetInfoImageTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_MEM_INFO_SIZE {{OPT}}urMemGetInfoImageTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_MEM_INFO_CONTEXT +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_A +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_R +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RG +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RA +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGB +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_BGRA +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ARGB +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ABGR +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_INTENSITY +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_LUMINANCE +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RX +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGX +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGBX +urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_SRGBA {{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_FORMAT {{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ELEMENT_SIZE {{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ROW_PITCH @@ -15,3 +29,4 @@ urMemBufferCreateWithNativeHandleTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}_ {{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_WIDTH {{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_HEIGHT {{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_DEPTH +Aborted diff --git a/test/conformance/memory/memory_adapter_hip.match b/test/conformance/memory/memory_adapter_hip.match index 4bb9904b04..86248b2912 100644 --- a/test/conformance/memory/memory_adapter_hip.match +++ b/test/conformance/memory/memory_adapter_hip.match @@ -1,4 +1,19 @@ {{OPT}}urMemBufferCreateWithNativeHandleTest.Success/AMD_HIP_BACKEND___{{.*}} {{OPT}}urMemImageCreateTest.InvalidSize/AMD_HIP_BACKEND___{{.*}} +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_A +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_R +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RG +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RA +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RGB +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_BGRA +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_ARGB +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_ABGR +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_INTENSITY +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_LUMINANCE +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RX +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RGX +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RGBX +urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_SRGBA {{OPT}}urMemImageGetInfoTest.Success/AMD_HIP_BACKEND___{{.*}} {{OPT}}urMemImageGetInfoTest.Success/AMD_HIP_BACKEND___{{.*}} +Aborted diff --git a/test/conformance/memory/memory_adapter_native_cpu.match b/test/conformance/memory/memory_adapter_native_cpu.match index 75850127af..6fe641de96 100644 --- a/test/conformance/memory/memory_adapter_native_cpu.match +++ b/test/conformance/memory/memory_adapter_native_cpu.match @@ -14,6 +14,43 @@ urMemImageCreateTest.InvalidImageDescNumMipLevel/SYCL_NATIVE_CPU___SYCL_Native_C urMemImageCreateTest.InvalidImageDescNumSamples/SYCL_NATIVE_CPU___SYCL_Native_CPU_ urMemImageCreateTest.InvalidImageDescRowPitch/SYCL_NATIVE_CPU___SYCL_Native_CPU_ urMemImageCreateTest.InvalidImageDescSlicePitch/SYCL_NATIVE_CPU___SYCL_Native_CPU_ +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_A +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_R +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RG +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RA +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGB +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGBA +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_BGRA +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_ARGB +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_ABGR +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_INTENSITY +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_LUMINANCE +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RX +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGX +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGBX +urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_SRGBA +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SNORM_INT8 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SNORM_INT16 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_INT8 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_INT16 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_INT_101010 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SIGNED_INT8 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SIGNED_INT16 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SIGNED_INT32 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32 +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_HALF_FLOAT +urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_FLOAT +urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_BUFFER +urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE2D +urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE3D +urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE2D_ARRAY +urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE1D +urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE1D_ARRAY +urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE1D_BUFFER urMemImageGetInfoTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_INFO_FORMAT urMemImageGetInfoTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_INFO_ELEMENT_SIZE urMemImageGetInfoTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_INFO_ROW_PITCH diff --git a/test/conformance/memory/memory_adapter_opencl.match b/test/conformance/memory/memory_adapter_opencl.match index 23dfbbae8c..24f2c4d1df 100644 --- a/test/conformance/memory/memory_adapter_opencl.match +++ b/test/conformance/memory/memory_adapter_opencl.match @@ -1 +1,23 @@ urMemImageCreateTest.InvalidImageDescStype/Intel_R__OpenCL___{{.*}} +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_A +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RA +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGB +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_BGRA +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ARGB +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ABGR +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_INTENSITY +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_LUMINANCE +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RX +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGX +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGBX +urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_SRGBA +urMemImageCreateTestWithChannelTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565 +urMemImageCreateTestWithChannelTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555 +urMemImageCreateTestWithChannelTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_TYPE_INT_101010 +urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_BUFFER +urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE2D +urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE3D +urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE2D_ARRAY +urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE1D +urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE1D_ARRAY +urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE1D_BUFFER diff --git a/test/conformance/memory/urMemBufferCreate.cpp b/test/conformance/memory/urMemBufferCreate.cpp index a86ebd326e..2e9b46114d 100644 --- a/test/conformance/memory/urMemBufferCreate.cpp +++ b/test/conformance/memory/urMemBufferCreate.cpp @@ -48,6 +48,18 @@ UUR_TEST_SUITE_P(urMemBufferCreateWithHostPtrFlagsTest, UR_MEM_FLAG_USE_HOST_POINTER), uur::deviceTestWithParamPrinter); +TEST_P(urMemBufferCreateWithHostPtrFlagsTest, SUCCESS) { + uur::raii::Mem host_ptr_buffer = nullptr; + ASSERT_SUCCESS(urMemBufferCreate(context, UR_MEM_FLAG_ALLOC_HOST_POINTER, + 4096, nullptr, host_ptr_buffer.ptr())); + + ur_buffer_properties_t properties{UR_STRUCTURE_TYPE_BUFFER_PROPERTIES, + nullptr, host_ptr_buffer.ptr()}; + uur::raii::Mem buffer = nullptr; + ASSERT_SUCCESS(urMemBufferCreate(context, getParam(), 4096, &properties, + buffer.ptr())); +} + TEST_P(urMemBufferCreateWithHostPtrFlagsTest, InvalidHostPtr) { uur::raii::Mem buffer = nullptr; ASSERT_EQ_RESULT( diff --git a/test/conformance/memory/urMemImageCreate.cpp b/test/conformance/memory/urMemImageCreate.cpp index b64c09558b..a6b74ed581 100644 --- a/test/conformance/memory/urMemImageCreate.cpp +++ b/test/conformance/memory/urMemImageCreate.cpp @@ -33,6 +33,98 @@ TEST_P(urMemImageCreateTest, Success) { ASSERT_SUCCESS(urMemRelease(image_handle)); } +using urMemImageCreateTestWithChannelOrderParam = + uur::urContextTestWithParam; + +UUR_TEST_SUITE_P(urMemImageCreateTestWithChannelOrderParam, + ::testing::Values( + UR_IMAGE_CHANNEL_ORDER_A, UR_IMAGE_CHANNEL_ORDER_R, + UR_IMAGE_CHANNEL_ORDER_RG, UR_IMAGE_CHANNEL_ORDER_RA, + UR_IMAGE_CHANNEL_ORDER_RGB, UR_IMAGE_CHANNEL_ORDER_RGBA, + UR_IMAGE_CHANNEL_ORDER_BGRA, UR_IMAGE_CHANNEL_ORDER_ARGB, + UR_IMAGE_CHANNEL_ORDER_ABGR, + UR_IMAGE_CHANNEL_ORDER_INTENSITY, + UR_IMAGE_CHANNEL_ORDER_LUMINANCE, + UR_IMAGE_CHANNEL_ORDER_RX, UR_IMAGE_CHANNEL_ORDER_RGX, + UR_IMAGE_CHANNEL_ORDER_RGBX, UR_IMAGE_CHANNEL_ORDER_SRGBA), + uur::deviceTestWithParamPrinter); + +TEST_P(urMemImageCreateTestWithChannelOrderParam, Success) { + ur_image_format_t image_format_with_param{ + getParam(), UR_IMAGE_CHANNEL_TYPE_SIGNED_INT32}; + + ur_mem_handle_t image_handle = nullptr; + ASSERT_SUCCESS(urMemImageCreate(context, UR_MEM_FLAG_READ_WRITE, + &image_format_with_param, &image_desc, + nullptr, &image_handle)); + ASSERT_NE(nullptr, image_handle); + ASSERT_SUCCESS(urMemRelease(image_handle)); +} + +using urMemImageCreateTestWithChannelTypeParam = + uur::urContextTestWithParam; + +UUR_TEST_SUITE_P( + urMemImageCreateTestWithChannelTypeParam, + ::testing::Values( + UR_IMAGE_CHANNEL_TYPE_SNORM_INT8, UR_IMAGE_CHANNEL_TYPE_SNORM_INT16, + UR_IMAGE_CHANNEL_TYPE_UNORM_INT8, UR_IMAGE_CHANNEL_TYPE_UNORM_INT16, + UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565, + UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555, UR_IMAGE_CHANNEL_TYPE_INT_101010, + UR_IMAGE_CHANNEL_TYPE_SIGNED_INT8, UR_IMAGE_CHANNEL_TYPE_SIGNED_INT16, + UR_IMAGE_CHANNEL_TYPE_SIGNED_INT32, UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8, + UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16, + UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32, UR_IMAGE_CHANNEL_TYPE_HALF_FLOAT, + UR_IMAGE_CHANNEL_TYPE_FLOAT), + uur::deviceTestWithParamPrinter); + +TEST_P(urMemImageCreateTestWithChannelTypeParam, Success) { + ur_image_format_t image_format_with_param{UR_IMAGE_CHANNEL_ORDER_RGBA, + getParam()}; + + ur_mem_handle_t image_handle = nullptr; + ASSERT_SUCCESS(urMemImageCreate(context, UR_MEM_FLAG_READ_WRITE, + &image_format_with_param, &image_desc, + nullptr, &image_handle)); + ASSERT_NE(nullptr, image_handle); + ASSERT_SUCCESS(urMemRelease(image_handle)); +} + +using urMemImageCreateTestWithMemoryTypeParam = + uur::urContextTestWithParam; + +UUR_TEST_SUITE_P(urMemImageCreateTestWithMemoryTypeParam, + ::testing::Values(UR_MEM_TYPE_BUFFER, UR_MEM_TYPE_IMAGE2D, + UR_MEM_TYPE_IMAGE3D, + UR_MEM_TYPE_IMAGE2D_ARRAY, + UR_MEM_TYPE_IMAGE1D, + UR_MEM_TYPE_IMAGE1D_ARRAY, + UR_MEM_TYPE_IMAGE1D_BUFFER), + uur::deviceTestWithParamPrinter); + +TEST_P(urMemImageCreateTestWithMemoryTypeParam, Success) { + static ur_image_desc_t image_desc_with_param{ + UR_STRUCTURE_TYPE_IMAGE_DESC, ///< [in] type of this structure + nullptr, ///< [in][optional] pointer to extension-specific structure + getParam(), ///< [in] memory object type + 1, ///< [in] image width + 1, ///< [in] image height + 1, ///< [in] image depth + 1, ///< [in] image array size + 0, ///< [in] image row pitch + 0, ///< [in] image slice pitch + 0, ///< [in] number of MIP levels + 0 ///< [in] number of samples + }; + + ur_mem_handle_t image_handle = nullptr; + ASSERT_SUCCESS(urMemImageCreate(context, UR_MEM_FLAG_READ_WRITE, + &image_format, &image_desc_with_param, + nullptr, &image_handle)); + ASSERT_NE(nullptr, image_handle); + ASSERT_SUCCESS(urMemRelease(image_handle)); +} + TEST_P(urMemImageCreateTest, InvalidNullHandleContext) { ur_mem_handle_t image_handle = nullptr; ASSERT_EQ_RESULT(UR_RESULT_ERROR_INVALID_NULL_HANDLE, diff --git a/test/conformance/platform/urPlatformGetInfo.cpp b/test/conformance/platform/urPlatformGetInfo.cpp index fa95662ec6..1dc92b26d7 100644 --- a/test/conformance/platform/urPlatformGetInfo.cpp +++ b/test/conformance/platform/urPlatformGetInfo.cpp @@ -19,7 +19,7 @@ INSTANTIATE_TEST_SUITE_P( urPlatformGetInfo, urPlatformGetInfoTest, ::testing::Values(UR_PLATFORM_INFO_NAME, UR_PLATFORM_INFO_VENDOR_NAME, UR_PLATFORM_INFO_VERSION, UR_PLATFORM_INFO_EXTENSIONS, - UR_PLATFORM_INFO_PROFILE), + UR_PLATFORM_INFO_PROFILE, UR_PLATFORM_INFO_BACKEND), [](const ::testing::TestParamInfo &info) { std::stringstream ss; ss << info.param; @@ -30,11 +30,17 @@ TEST_P(urPlatformGetInfoTest, Success) { size_t size = 0; ur_platform_info_t info_type = GetParam(); ASSERT_SUCCESS(urPlatformGetInfo(platform, info_type, 0, nullptr, &size)); - ASSERT_NE(size, 0); + if (info_type == UR_PLATFORM_INFO_BACKEND) { + ASSERT_EQ(size, sizeof(ur_platform_backend_t)); + } else { + ASSERT_NE(size, 0); + } std::vector name(size); ASSERT_SUCCESS( urPlatformGetInfo(platform, info_type, size, name.data(), nullptr)); - ASSERT_EQ(size, std::strlen(name.data()) + 1); + if (info_type != UR_PLATFORM_INFO_BACKEND) { + ASSERT_EQ(size, std::strlen(name.data()) + 1); + } } TEST_P(urPlatformGetInfoTest, InvalidNullHandlePlatform) { diff --git a/test/conformance/program/urProgramBuild.cpp b/test/conformance/program/urProgramBuild.cpp index ec65074c78..97e4db77e3 100644 --- a/test/conformance/program/urProgramBuild.cpp +++ b/test/conformance/program/urProgramBuild.cpp @@ -12,6 +12,11 @@ TEST_P(urProgramBuildTest, Success) { ASSERT_SUCCESS(urProgramBuild(context, program, nullptr)); } +TEST_P(urProgramBuildTest, SuccessWithOptions) { + const char *pOptions = ""; + ASSERT_SUCCESS(urProgramBuild(context, program, pOptions)); +} + TEST_P(urProgramBuildTest, InvalidNullHandleContext) { ASSERT_EQ_RESULT(UR_RESULT_ERROR_INVALID_NULL_HANDLE, urProgramBuild(nullptr, program, nullptr)); diff --git a/test/conformance/program/urProgramCreateWithIL.cpp b/test/conformance/program/urProgramCreateWithIL.cpp index b439850bac..00f41da6ef 100644 --- a/test/conformance/program/urProgramCreateWithIL.cpp +++ b/test/conformance/program/urProgramCreateWithIL.cpp @@ -36,6 +36,15 @@ TEST_P(urProgramCreateWithILTest, Success) { ASSERT_SUCCESS(urProgramRelease(program)); } +TEST_P(urProgramCreateWithILTest, SuccessWithProperties) { + ur_program_properties_t properties{UR_STRUCTURE_TYPE_PROGRAM_PROPERTIES}; + ur_program_handle_t program = nullptr; + ASSERT_SUCCESS(urProgramCreateWithIL( + context, il_binary->data(), il_binary->size(), &properties, &program)); + ASSERT_NE(nullptr, program); + ASSERT_SUCCESS(urProgramRelease(program)); +} + TEST_P(urProgramCreateWithILTest, InvalidNullHandle) { ur_program_handle_t program = nullptr; ASSERT_EQ_RESULT(UR_RESULT_ERROR_INVALID_NULL_HANDLE, diff --git a/test/conformance/queue/queue_adapter_native_cpu.match b/test/conformance/queue/queue_adapter_native_cpu.match index 98c622a472..c2887b1063 100644 --- a/test/conformance/queue/queue_adapter_native_cpu.match +++ b/test/conformance/queue/queue_adapter_native_cpu.match @@ -1,5 +1,14 @@ urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_OUT_OF_ORDER_EXEC_MODE_ENABLE urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_PROFILING_ENABLE +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_ON_DEVICE +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_ON_DEVICE_DEFAULT +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_DISCARD_EVENTS +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_PRIORITY_LOW +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_PRIORITY_HIGH +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_SUBMISSION_BATCHED +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_SUBMISSION_IMMEDIATE +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_USE_DEFAULT_STREAM +urQueueCreateWithParamTest.SuccessWithProperties/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_FLAG_SYNC_WITH_DEFAULT_STREAM urQueueFinishTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU_ urQueueFlushTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU_ urQueueGetInfoTestWithInfoParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_QUEUE_INFO_CONTEXT diff --git a/test/conformance/queue/urQueueCreate.cpp b/test/conformance/queue/urQueueCreate.cpp index 1c5ca6e614..03cda76d50 100644 --- a/test/conformance/queue/urQueueCreate.cpp +++ b/test/conformance/queue/urQueueCreate.cpp @@ -17,7 +17,16 @@ TEST_P(urQueueCreateTest, Success) { using urQueueCreateWithParamTest = uur::urContextTestWithParam; UUR_TEST_SUITE_P(urQueueCreateWithParamTest, testing::Values(UR_QUEUE_FLAG_OUT_OF_ORDER_EXEC_MODE_ENABLE, - UR_QUEUE_FLAG_PROFILING_ENABLE), + UR_QUEUE_FLAG_PROFILING_ENABLE, + UR_QUEUE_FLAG_ON_DEVICE, + UR_QUEUE_FLAG_ON_DEVICE_DEFAULT, + UR_QUEUE_FLAG_DISCARD_EVENTS, + UR_QUEUE_FLAG_PRIORITY_LOW, + UR_QUEUE_FLAG_PRIORITY_HIGH, + UR_QUEUE_FLAG_SUBMISSION_BATCHED, + UR_QUEUE_FLAG_SUBMISSION_IMMEDIATE, + UR_QUEUE_FLAG_USE_DEFAULT_STREAM, + UR_QUEUE_FLAG_SYNC_WITH_DEFAULT_STREAM), uur::deviceTestWithParamPrinter); TEST_P(urQueueCreateWithParamTest, SuccessWithProperties) { diff --git a/test/conformance/testing/include/uur/fixtures.h b/test/conformance/testing/include/uur/fixtures.h index cf01015eb4..8e0c86f9b3 100644 --- a/test/conformance/testing/include/uur/fixtures.h +++ b/test/conformance/testing/include/uur/fixtures.h @@ -526,6 +526,26 @@ struct urMemBufferQueueTest : urQueueTest { ur_mem_handle_t buffer = nullptr; }; +template +struct urMemBufferQueueTestWithParam : urQueueTestWithParam { + void SetUp() override { + UUR_RETURN_ON_FATAL_FAILURE(uur::urQueueTestWithParam::SetUp()); + ASSERT_SUCCESS(urMemBufferCreate(this->context, UR_MEM_FLAG_READ_WRITE, + size, nullptr, &buffer)); + } + + void TearDown() override { + if (buffer) { + EXPECT_SUCCESS(urMemRelease(buffer)); + } + UUR_RETURN_ON_FATAL_FAILURE(uur::urQueueTestWithParam::TearDown()); + } + + const size_t count = 8; + const size_t size = sizeof(uint32_t) * count; + ur_mem_handle_t buffer = nullptr; +}; + struct urMemImageQueueTest : urQueueTest { void SetUp() override { UUR_RETURN_ON_FATAL_FAILURE(urQueueTest::SetUp());