MSS_RESET_M2F output of the MSS is "Z" in simulation

[gsriker77]

Customer design uses a reset scheme similar to the one depicted in MicroSemi’s “PolarFire® FPGA and PolarFire SoC FPGA Power-Up and Resets”. See screenshot attached.

We are asking you for this information because, as you know, MSS_RESET_N_M2F does not respond in simulation to MSS_RESET_N_F2M stimulus. He has figured out how to force the MSS_RESET_N_M2F MSS output using a Verilog testbench, and this is already a partial solution to problem.

You could significantly help us if you are able to supply us with timing/waveforms showing how MSS_RESET_N_M2F responds to a reset pulse at input MSS_RESET_N_F2M ?

[gsriker77]

Customer downloaded the PF SoC Icicle kit from Git Hub. The MSS_RESET_M2F output of the MSS is "Z" in simulation. Since this is connected to the reset block EXT_RST_N pin of the CLOCKS_AND_RESETS block, the fabric reset never is really asserted/de-asserted

[hughbreslin]

Hi @gsriker77

the Icicle Kit Reference Design has a BFM_SIMULATION argument to generate a test bench and setup to run simulations of the MSS / design which can be used for this.

The MSS_RESET_N_M2F signal is driven to Z in simulation but this allows the fabric reset to assert (it does however come up asserted and doesn't toggle which isn't ideal.

In the waveform below SW4 is connected to the reset generation block in the test bench and SW4 drives the MSS_RESET_N_F2M signal to the MSS. When SW4 asserts the MSS_RESET_N_M2F never changes from Z:

The customers solution sounds the best, they could include it in a custom .do file in the project like what is done in the reference design to add waves and this would toggle the reset before executing any BFM commands.

[hughbreslin]

The BFMs run sequentially (at least what is included in the reference design if thats what we're discussing), there can be a gap between BFMs starting so for me from the start I see the FIC3 BFM and then about 2 μs later I see the FIC0 BFM, do you just need to let the simulation run for longer to see the FIC0 BFM? E.g I see the following:

 AMBA BFM Model
 Version 2.1 22Dec08
  
 Opening BFM Script file PFSOC_MSS_FIC3.vec
 Read 170 Vectors - Compiler Version 26.28
  PFSOC_FIC_3_BFM :Filenames referenced in Vectors
   ICICLE_MSS_PFSOC_MSS_FIC3_user.bfm
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:MESSAGE:  START Running BFM file 'ICICLE_MSS_PFSOC_MSS_FIC3_user.bfm'
 PFSOC_FIC_3_BFM:MESSAGE:  to access FIC3
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:MESSAGE:  WAIT for some TIME after RESET released for Logic to stabilize before bus transactions
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:28:timeout 10000
 PFSOC_FIC_3_BFM:33:waitus 1  starting at 1011 ns
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:MESSAGE: TESTING CoreGPIO at base address 0x4200_0000
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:54:write w 00000000 420000a0 00000001 at 2051 ns
 PFSOC_FIC_3_BFM: Data Write 420000a0 00000001
 PFSOC_FIC_3_BFM:55:read w 00000000 420000a0 at 2211 ns
 PFSOC_FIC_3_BFM: Data Read 420000a0 00000001 at 2275.300000ns
 PFSOC_FIC_3_BFM:57:write w 00000000 420000a0 00000002 at 2371 ns
 PFSOC_FIC_3_BFM: Data Write 420000a0 00000002
 PFSOC_FIC_3_BFM:58:read w 00000000 420000a0 at 2531 ns
 PFSOC_FIC_3_BFM: Data Read 420000a0 00000002 at 2595.300000ns
 PFSOC_FIC_3_BFM:60:write w 00000000 420000a0 00000004 at 2691 ns
 PFSOC_FIC_3_BFM: Data Write 420000a0 00000004
 PFSOC_FIC_3_BFM:61:read w 00000000 420000a0 at 2851 ns
 PFSOC_FIC_3_BFM: Data Read 420000a0 00000004 at 2915.300000ns
 PFSOC_FIC_3_BFM:63:write w 00000000 420000a0 00000008 at 3011 ns
 PFSOC_FIC_3_BFM: Data Write 420000a0 00000008
 PFSOC_FIC_3_BFM:64:read w 00000000 420000a0 at 3171 ns
 PFSOC_FIC_3_BFM: Data Read 420000a0 00000008 at 3235.300000ns
 PFSOC_FIC_3_BFM:66:write w 00000000 420000a0 0000000f at 3331 ns
 PFSOC_FIC_3_BFM: Data Write 420000a0 0000000f
 PFSOC_FIC_3_BFM:67:read w 00000000 420000a0 at 3491 ns
 PFSOC_FIC_3_BFM: Data Read 420000a0 0000000f at 3555.300000ns
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:MESSAGE:  END running BFM file 'ICICLE_MSS_PFSOC_MSS_FIC3_user.bfm'
 PFSOC_FIC_3_BFM:-
 PFSOC_FIC_3_BFM:76:return

  
 FIC_3 BFM Simulation Complete - 26 Instructions - NO ERRORS
  

  
 PFSOC_FIC_0_BFM:MESSAGE:  WRITING 64 bit data to address 0x61000000
 PFSOC_FIC_0_BFM:48:write64 w 00000000  61000000 10111213 20212223 at 6020 ns
 PFSOC_FIC_0_BFM:MESSAGE:  READING 64 bit data from address 0x61000000
 PFSOC_FIC_0_BFM:50:read64 w 00000000 61000000 at 6036 ns
 PFSOC_FIC_0_BFM: Data Write 61000000 1011121320212223
 PFSOC_FIC_0_BFM:MESSAGE:  WRITING to address 0x61000008
 PFSOC_FIC_0_BFM:54:write w 00000000 61000008 ecd54431 at 6153 ns
 PFSOC_FIC_0_BFM:MESSAGE:  READING from address 0x61000008
 PFSOC_FIC_0_BFM:56:read w 00000000 61000008 at 6170 ns
 PFSOC_FIC_0_BFM: Data Read 61000000 1011121320212223 at 6269.587000ns
 PFSOC_FIC_0_BFM:MESSAGE:  WRITING to address 0x6100000C
 PFSOC_FIC_0_BFM:60:write h 00000000 6100000c 0000cd21 at 6286 ns

[gsriker77]

Can you please tell me what exactly gets either one of FIC0 or FIC3 user bfm programs started during Modelsim simulation?
How does it interact with either MSS_RESET_N_F2M or MSS_RESET_N_M2F?

[hughbreslin]

Unfortunately I don't know the exact mechanism that starts a BFM simulation running, thats somewhere in the internals of modelsim. The flow with BFM is:

1. Libero generates the .bfm files (or they can be manually imported)

2. The BFM files are compiled to .vec after being included in the run.do script in the Simulation folder

    source "${PROJECT_DIR}/simulation/ICICLE_MSS_PFSOC_MSS_FIC0_compile_bfm.tcl";
    source "${PROJECT_DIR}/simulation/ICICLE_MSS_PFSOC_MSS_FIC1_compile_bfm.tcl";
    source "${PROJECT_DIR}/simulation/ICICLE_MSS_PFSOC_MSS_FIC3_compile_bfm.tcl";
   

3. When ModelSim is launched the BFM compiler runs, below is from the log as an example:

   AMBA BFM Compiler (Version 3.0.0 Mar 2014) 
   
   @I: BFM101 : Reading input BFM file "ICICLE_MSS_PFSOC_MSS_FIC0_user.bfm".
   
   @I: BFM107 : Checking procedure calls.
   
   @I: BFM103 : Writing vectors output file "PFSOC_MSS_FIC0.vec".
   
   @I: BFM104 : 32 commands are generated in the output vectors output file.
   
   @I: BFM105 : 256 vectors are generated in the output vectors output file.
   
   @I: BFM106 : Output vectors files CheckSum ae42a581
   
   
   @I: BFM Compiler Completed Successfully.
   

4. The vec files are then called by ModelSim (here I am not sure what the order is, you will need to check with the owners of BFM / someone more familiar with the Libero / ModelSim flow) - it looks like the BFM file (and therefor vector file) being present and compiled is enough for ModelSim to run it:

   Opening BFM Script file PFSOC_MSS_FIC0.vec
   Read 256 Vectors - Compiler Version 26.28
    PFSOC_FIC_0_BFM :Filenames referenced in Vectors
     ICICLE_MSS_PFSOC_MSS_FIC0_user.bfm
   PFSOC_FIC_0_BFM:-
   PFSOC_FIC_0_BFM:MESSAGE:  START Running BFM file 'ICICLE_MSS_PFSOC_MSS_FIC0_user.bfm'
   PFSOC_FIC_0_BFM:MESSAGE:  to access FIC0
   PFSOC_FIC_0_BFM:-
   PFSOC_FIC_0_BFM:-
   PFSOC_FIC_0_BFM:MESSAGE:  WAIT for some TIME after RESET released for Logic to stabilize before bus transactions
   PFSOC_FIC_0_BFM:-
   PFSOC_FIC_0_BFM:28:timeout 10000
   PFSOC_FIC_0_BFM:33:waitus 5  starting at 1002 ns
   

The BFM files have no interaction with MSS_RESETN_F2M or MSS_RESETN_M2F as these are not part of the busses and outside the scope of the Bus Functional Model.

[gsriker77]

The last Question :
If for any reason any of the FIC 0 master bus signal values after reset indicate to the BFM software that the bus is “not ready” for transaction, could this be causing the “non responsive” behavior of FIC 0 user BFM in simulation?

If so, what are the FIC 0 signals to watch for, and perhaps try to fix by forcing them after reset to an appropriate value from the testbench, in order to produce expected simulation results?

Thanks Hugh,

[gsriker77]

They are now starting to bring up our design in the lab.
This allows us to instrument our design, and use the tools in Libero that provide internal visibility, to debug the actual circuitry while we are running software on the MSS.

Hopefully, this will help us do the necessary work beyond what is possible with the current state of the art with your user BFM simulation tools.

Thanks again, so we can ask questions that may arise from this new phase of work in project.