From 0e05a944dc46e15f8f3929e7c7b147ca568f00ef Mon Sep 17 00:00:00 2001
From: Lorenzo Leone <lleone@iis.ee.ethz.ch>
Date: Wed, 30 Oct 2024 07:50:24 +0100
Subject: [PATCH] Fix DataWidth mismatch in axi_iw converter (#52)

---
 hw/chimera_cluster_adapter.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/chimera_cluster_adapter.sv b/hw/chimera_cluster_adapter.sv
index 173643f..7e8c97c 100644
--- a/hw/chimera_cluster_adapter.sv
+++ b/hw/chimera_cluster_adapter.sv
@@ -257,7 +257,7 @@ module chimera_cluster_adapter #(
     .AxiMstPortMaxTxnsPerId(16),                              // TODO: Tune this
 
     .AxiAddrWidth(AddrWidth),
-    .AxiDataWidth(WideDataWidth),
+    .AxiDataWidth(NarrowDataWidth),
     .AxiUserWidth(UserWidth),
 
     .slv_req_t (narrow_in_req_t),