From 2b090dd7269965f13bb735c36744762ee39dfaee Mon Sep 17 00:00:00 2001
From: Sergio Mazzola <smazzola@iis.ee.ethz.ch>
Date: Fri, 1 Nov 2024 16:24:19 +0100
Subject: [PATCH] Hw: Fix HypNumPhys to 1 (previously was 2)

---
 hw/chimera_pkg.sv                     |  3 +++
 hw/chimera_top_wrapper.sv             |  4 +---
 target/sim/sim.mk                     |  2 --
 target/sim/src/fixture_chimera_soc.sv |  5 +----
 target/sim/src/tb_chimera_pkg.sv      |  4 ----
 target/sim/src/vip_chimera_soc.sv     | 10 ++++------
 6 files changed, 9 insertions(+), 19 deletions(-)

diff --git a/hw/chimera_pkg.sv b/hw/chimera_pkg.sv
index 5d82cd7..91229a6 100644
--- a/hw/chimera_pkg.sv
+++ b/hw/chimera_pkg.sv
@@ -130,6 +130,9 @@ ExtClusters
   //TODO(smazzola): Correct size of HyperRAM?
   localparam doub_bt HyperbusRegionEnd = HyperbusRegionStart + 64'h1000_0000;
 
+  localparam int unsigned HypNumPhys  = 1;
+  localparam int unsigned HypNumChips = 2;
+
   localparam int unsigned LogDepth = 3;
   localparam int unsigned SyncStages = 3;
 
diff --git a/hw/chimera_top_wrapper.sv b/hw/chimera_top_wrapper.sv
index 2acad1d..3f7325e 100644
--- a/hw/chimera_top_wrapper.sv
+++ b/hw/chimera_top_wrapper.sv
@@ -11,9 +11,7 @@ module chimera_top_wrapper
   import chimera_pkg::*;
   import chimera_reg_pkg::*;
 #(
-  parameter int unsigned SelectedCfg = 0,
-  parameter int unsigned HypNumPhys  = 2,
-  parameter int unsigned HypNumChips = 2
+  parameter int unsigned SelectedCfg = 0
 ) (
   input  logic                                         soc_clk_i,
   input  logic                                         clu_clk_i,
diff --git a/target/sim/sim.mk b/target/sim/sim.mk
index 52d67f7..d1d83fd 100644
--- a/target/sim/sim.mk
+++ b/target/sim/sim.mk
@@ -24,11 +24,9 @@ $(CHIM_SIM_DIR)/models/s27ks0641/s27ks0641.sv:
 # Defines for hyperram model preload at time 0
 HYP_USER_PRELOAD      ?= 0
 HYP0_PRELOAD_MEM_FILE ?= ""
-HYP1_PRELOAD_MEM_FILE ?= ""
 
 CHIM_VLOG_ARGS += +define+HYP_USER_PRELOAD="$(HYP_USER_PRELOAD)"
 CHIM_VLOG_ARGS += +define+HYP0_PRELOAD_MEM_FILE=\"$(HYP0_PRELOAD_MEM_FILE)\"
-CHIM_VLOG_ARGS += +define+HYP1_PRELOAD_MEM_FILE=\"$(HYP1_PRELOAD_MEM_FILE)\"
 # this path should be kept relative to the vsim directory to avoid CI issues:
 # an absolute path produce inter-CI-runner file accesses
 CHIM_VLOG_ARGS += +define+PATH_TO_HYP_SDF=\"../models/s27ks0641/s27ks0641.sdf\"
diff --git a/target/sim/src/fixture_chimera_soc.sv b/target/sim/src/fixture_chimera_soc.sv
index 59a9fc7..533499d 100644
--- a/target/sim/src/fixture_chimera_soc.sv
+++ b/target/sim/src/fixture_chimera_soc.sv
@@ -82,9 +82,7 @@ module fixture_chimera_soc #(
   wire  [HypNumPhys-1:0][            7:0] pad_hyper_dq;
 
   chimera_top_wrapper #(
-    .SelectedCfg(SelectedCfg),
-    .HypNumPhys (HypNumPhys),
-    .HypNumChips(HypNumChips)
+    .SelectedCfg(SelectedCfg)
   ) dut (
     .soc_clk_i                (soc_clk),
     .clu_clk_i                (clu_clk),
@@ -163,7 +161,6 @@ module fixture_chimera_soc #(
     // Mem files for hyperram model. The argument is considered only if HypUserPreload==1 in the
     // memory model.
     .Hyp0UserPreloadMemFile(`HYP0_PRELOAD_MEM_FILE),
-    .Hyp1UserPreloadMemFile(`HYP1_PRELOAD_MEM_FILE),
     .axi_ext_mst_req_t     (axi_mst_req_t),
     .axi_ext_mst_rsp_t     (axi_mst_rsp_t)
   ) vip (
diff --git a/target/sim/src/tb_chimera_pkg.sv b/target/sim/src/tb_chimera_pkg.sv
index 711f978..48068ae 100644
--- a/target/sim/src/tb_chimera_pkg.sv
+++ b/target/sim/src/tb_chimera_pkg.sv
@@ -38,8 +38,4 @@ package tb_chimera_pkg;
     DefaultCfg  // 0: Default configuration
   };
 
-  // HyperBus
-  localparam int HypNumPhys = 2;
-  localparam int HypNumChips = 2;
-
 endpackage
diff --git a/target/sim/src/vip_chimera_soc.sv b/target/sim/src/vip_chimera_soc.sv
index 6bc054c..0d922c9 100644
--- a/target/sim/src/vip_chimera_soc.sv
+++ b/target/sim/src/vip_chimera_soc.sv
@@ -11,11 +11,11 @@
 
 module vip_chimera_soc
   import cheshire_pkg::*;
+  import chimera_pkg::HypNumPhys;
+  import chimera_pkg::HypNumChips;
 #(
   // DUT (must be set)
   parameter cheshire_cfg_t DutCfg      = '0,
-  parameter int unsigned   HypNumPhys  = 2,
-  parameter int unsigned   HypNumChips = 2,
 
   parameter type         axi_ext_mst_req_t      = logic,
   parameter type         axi_ext_mst_rsp_t      = logic,
@@ -43,7 +43,6 @@ module vip_chimera_soc
   // HyperRAM (hardcoded to HypNumPhys = 2)
   parameter int unsigned HypUserPreload         = 0,
   parameter string       Hyp0UserPreloadMemFile = "",
-  parameter string       Hyp1UserPreloadMemFile = "",
   // Derived Parameters;  *do not override*
   parameter int unsigned AxiStrbWidth           = DutCfg.AxiDataWidth / 8,
   parameter int unsigned AxiStrbBits            = $clog2(DutCfg.AxiDataWidth / 8)
@@ -572,8 +571,7 @@ module vip_chimera_soc
   //////////////
 
   localparam string HypUserPreloadMemFiles[HypNumPhys] = '{
-      Hyp0UserPreloadMemFile,
-      Hyp1UserPreloadMemFile
+      Hyp0UserPreloadMemFile
   };
 
   for (genvar i = 0; i < HypNumPhys; i++) begin : hyperrams
@@ -621,7 +619,7 @@ endmodule
 module vip_cheshire_soc_tristate
   import cheshire_pkg::*;
 #(
-  parameter int unsigned HypNumPhys  = 2,
+  parameter int unsigned HypNumPhys  = 1,
   parameter int unsigned HypNumChips = 2
 ) (
   // I2C pad IO