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Sim: 🎨 Fix testbench codestyle
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sermazz committed Sep 25, 2024
1 parent 5c62a11 commit 3699884
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Showing 3 changed files with 186 additions and 183 deletions.
88 changes: 44 additions & 44 deletions target/sim/src/fixture_chimera_soc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -28,36 +28,36 @@ module fixture_chimera_soc #(
// DUT //
///////////

logic soc_clk;
logic clu_clk;
logic rst_n;
logic test_mode;
logic [ 1:0] boot_mode;
logic rtc;

logic jtag_tck;
logic jtag_trst_n;
logic jtag_tms;
logic jtag_tdi;
logic jtag_tdo;

logic uart_tx;
logic uart_rx;

logic i2c_sda_o;
logic i2c_sda_i;
logic i2c_sda_en;
logic i2c_scl_o;
logic i2c_scl_i;
logic i2c_scl_en;

logic spih_sck_o;
logic spih_sck_en;
logic [SpihNumCs-1:0] spih_csb_o;
logic [SpihNumCs-1:0] spih_csb_en;
logic [ 3:0] spih_sd_o;
logic [ 3:0] spih_sd_i;
logic [ 3:0] spih_sd_en;
logic soc_clk;
logic clu_clk;
logic rst_n;
logic test_mode;
logic [ 1:0] boot_mode;
logic rtc;

logic jtag_tck;
logic jtag_trst_n;
logic jtag_tms;
logic jtag_tdi;
logic jtag_tdo;

logic uart_tx;
logic uart_rx;

logic i2c_sda_o;
logic i2c_sda_i;
logic i2c_sda_en;
logic i2c_scl_o;
logic i2c_scl_i;
logic i2c_scl_en;

logic spih_sck_o;
logic spih_sck_en;
logic [ SpihNumCs-1:0] spih_csb_o;
logic [ SpihNumCs-1:0] spih_csb_en;
logic [ 3:0] spih_sd_o;
logic [ 3:0] spih_sd_i;
logic [ 3:0] spih_sd_en;

logic [HypNumPhys-1:0][HypNumChips-1:0] hyper_cs_no;
logic [HypNumPhys-1:0] hyper_ck_i;
Expand All @@ -67,17 +67,17 @@ module fixture_chimera_soc #(
logic [HypNumPhys-1:0] hyper_rwds_o;
logic [HypNumPhys-1:0] hyper_rwds_i;
logic [HypNumPhys-1:0] hyper_rwds_oe_o;
logic [HypNumPhys-1:0][7:0] hyper_dq_i;
logic [HypNumPhys-1:0][7:0] hyper_dq_o;
logic [HypNumPhys-1:0][ 7:0] hyper_dq_i;
logic [HypNumPhys-1:0][ 7:0] hyper_dq_o;
logic [HypNumPhys-1:0] hyper_dq_oe_o;
logic [HypNumPhys-1:0] hyper_reset_no;

wire [HypNumPhys-1:0][HypNumChips-1:0] pad_hyper_csn;
wire [HypNumPhys-1:0] pad_hyper_ck;
wire [HypNumPhys-1:0] pad_hyper_ckn;
wire [HypNumPhys-1:0] pad_hyper_rwds;
wire [HypNumPhys-1:0] pad_hyper_resetn;
wire [HypNumPhys-1:0][7:0] pad_hyper_dq;
wire [HypNumPhys-1:0][HypNumChips-1:0] pad_hyper_csn;
wire [HypNumPhys-1:0] pad_hyper_ck;
wire [HypNumPhys-1:0] pad_hyper_ckn;
wire [HypNumPhys-1:0] pad_hyper_rwds;
wire [HypNumPhys-1:0] pad_hyper_resetn;
wire [HypNumPhys-1:0][ 7:0] pad_hyper_dq;

chimera_top_wrapper #(
.SelectedCfg(SelectedCfg)
Expand Down Expand Up @@ -152,16 +152,16 @@ module fixture_chimera_soc #(
///////////

vip_chimera_soc #(
.DutCfg (DutCfg),
.DutCfg (DutCfg),
// Determine whether we preload the hyperram model or not User preload. If 0, the memory model
// is not preloaded at time 0.
.HypUserPreload ( `HYP_USER_PRELOAD ),
.HypUserPreload (`HYP_USER_PRELOAD),
// Mem files for hyperram model. The argument is considered only if HypUserPreload==1 in the
// memory model.
.Hyp0UserPreloadMemFile ( `HYP0_PRELOAD_MEM_FILE ),
.Hyp1UserPreloadMemFile ( `HYP1_PRELOAD_MEM_FILE ),
.axi_ext_mst_req_t(axi_mst_req_t),
.axi_ext_mst_rsp_t(axi_mst_rsp_t)
.Hyp0UserPreloadMemFile(`HYP0_PRELOAD_MEM_FILE),
.Hyp1UserPreloadMemFile(`HYP1_PRELOAD_MEM_FILE),
.axi_ext_mst_req_t (axi_mst_req_t),
.axi_ext_mst_rsp_t (axi_mst_rsp_t)
) vip (
.*
);
Expand Down
2 changes: 1 addition & 1 deletion target/sim/src/tb_chimera_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ package tb_chimera_pkg;
};

// HyperBus
localparam int HypNumPhys = 2;
localparam int HypNumPhys = 2;
localparam int HypNumChips = 2;

//TODO(smazzola): define correct parameters after HyperBus integration
Expand Down
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