Lleone/pmu

[Lore0599]

PMU Cluster Management

This PR introduces the necessary logic to handle power management controls for the clusters. To integrate the UPF files, some logic ports and signals have been added to the RTL to drive Isolation Cells, Power Switches, Retention, etc.

Added - HW

Ports

• pmu_rst-cluster: Control signals to reset all clusters independently. These reset signals are driven by the PMU controller when power strategies need to be applied. Otherwise, they can use the same reset signal as the rest of the system.
• pmu_iso_en/ack: These control signals are used by the PMU controller to isolate or un-isolate the cluster interface.

Logic

• chimera_clu_domain/axi_isolate: At each AXI interface between clusters and the rest of the SoC, isolation strategies must be applied. Typically, simple isolation cells can be inserted through the UPF description. However, AXI ports require more complex isolation logic to handle in-flight transactions and responses. As a result, these ISO cells are omitted from the UPF and explicitly inserted in the RTL.

[Scheremo]

Looks largely okay to me!

[Scheremo]

One more comment, then I'm happy :)

[Scheremo]

LGTM!