From 1ac78966d1dcca4383f02a0530b7291bf14aebd7 Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Mon, 10 Jan 2022 21:54:44 +0100 Subject: [PATCH 1/7] ati: Add ATI timing utilities --- Bender.yml | 2 + src/interfaces.sv | 15 ++++++++ src/timing_pkg.sv | 93 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 110 insertions(+) create mode 100644 src/interfaces.sv create mode 100644 src/timing_pkg.sv diff --git a/Bender.yml b/Bender.yml index b3a5868..fbb44a3 100644 --- a/Bender.yml +++ b/Bender.yml @@ -12,6 +12,7 @@ sources: # levels 1 and 0, etc. Files within a level are ordered alphabetically. # Level 0 - src/clk_rst_gen.sv + - src/interfaces.sv - src/rand_id_queue.sv - src/rand_stream_mst.sv - src/rand_synch_holdable_driver.sv @@ -19,6 +20,7 @@ sources: - src/sim_timeout.sv # Level 1 - src/rand_synch_driver.sv + - src/timing_pkg.sv # Level 2 - src/rand_stream_slv.sv diff --git a/src/interfaces.sv b/src/interfaces.sv new file mode 100644 index 0000000..252eed4 --- /dev/null +++ b/src/interfaces.sv @@ -0,0 +1,15 @@ +// Copyright (c) 2019 ETH Zurich, University of Bologna +// +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +interface clk_if(); + logic clk; + logic rst_n; +endinterface \ No newline at end of file diff --git a/src/timing_pkg.sv b/src/timing_pkg.sv new file mode 100644 index 0000000..fd70bb8 --- /dev/null +++ b/src/timing_pkg.sv @@ -0,0 +1,93 @@ +// Copyright (c) 2019 ETH Zurich, University of Bologna +// +// Copyright and related rights are licensed under the Solderpad Hardware +// License, Version 0.51 (the "License"); you may not use this file except in +// compliance with the License. You may obtain a copy of the License at +// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law +// or agreed to in writing, software, hardware and materials distributed under +// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR +// CONDITIONS OF ANY KIND, either express or implied. See the License for the +// specific language governing permissions and limitations under the License. + +// Package with functions and tasks commonly used in ATI timing +package timing_pkg; + + class ati_utility; + + typedef virtual clk_if clk_vif_t; + + bit initialized; + clk_vif_t clk_vif; + time appl_delay, test_delay; + + function new(clk_vif_t clk_vif); + this.clk_vif = clk_vif; + this.appl_delay = 0; + this.test_delay = 0; + this.initialized = 0; + endfunction + + function void uninit_warning(); + if (!this.initialized) $warning("ATI delays uninitialized"); + endfunction + + task init(time appl_delay, test_delay); + // Measure clock period + time st, clk_period; + @(posedge clk_vif.clk); + st = $time; + @(posedge clk_vif.clk); + clk_period = $time - st; + + // Consistency checks on delays + assert (appl_delay < clk_period) else $error("Application delay greater than clock period"); + assert (test_delay < clk_period) else $error("Test delay greater than clock period"); + + // Configure + this.appl_delay = appl_delay; + this.test_delay = test_delay; + this.initialized = 1; + endtask + + task wait_cycles(int unsigned n); + repeat(n) @(posedge(clk_vif.clk)); + endtask + + task appl_wait_cycles(int unsigned n); + uninit_warning(); + repeat(n) @(posedge(clk_vif.clk)); + #(appl_delay); + endtask + + task test_wait_cycles(int unsigned n); + uninit_warning(); + repeat(n) @(posedge(clk_vif.clk)); + #(test_delay); + endtask + + task test_wait_sig(ref logic sig); + uninit_warning(); + do begin + @(posedge(clk_vif.clk)); + #(test_delay); + end while(sig == 1'b0); + endtask + + task wait_test(); + uninit_warning(); + #(test_delay); + endtask + + task wait_appl(); + uninit_warning(); + #(appl_delay); + endtask + + task wait_appl_to_test(); + uninit_warning(); + #(test_delay - appl_delay); + endtask + + endclass + +endpackage \ No newline at end of file From 03985b6d79f40e3bb85b44fb3a3a80747d35e739 Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Wed, 12 Jan 2022 14:32:49 +0100 Subject: [PATCH 2/7] Update src/timing_pkg.sv Co-authored-by: Andreas Kurth --- src/timing_pkg.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/timing_pkg.sv b/src/timing_pkg.sv index fd70bb8..ea143f3 100644 --- a/src/timing_pkg.sv +++ b/src/timing_pkg.sv @@ -9,7 +9,7 @@ // CONDITIONS OF ANY KIND, either express or implied. See the License for the // specific language governing permissions and limitations under the License. -// Package with functions and tasks commonly used in ATI timing +/// Package with functions and tasks commonly used in ATI timing package timing_pkg; class ati_utility; From 5ec55959a9f14b75a0071d9f6359d4f141ded8b7 Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Wed, 12 Jan 2022 14:33:00 +0100 Subject: [PATCH 3/7] Update src/timing_pkg.sv Co-authored-by: Andreas Kurth --- src/timing_pkg.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/timing_pkg.sv b/src/timing_pkg.sv index ea143f3..4a1c391 100644 --- a/src/timing_pkg.sv +++ b/src/timing_pkg.sv @@ -55,7 +55,7 @@ package timing_pkg; task appl_wait_cycles(int unsigned n); uninit_warning(); - repeat(n) @(posedge(clk_vif.clk)); + this.wait_cycles(n); #(appl_delay); endtask From d95efef0753dd73c088a5df7ad625c37ae8064f1 Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Wed, 12 Jan 2022 14:33:20 +0100 Subject: [PATCH 4/7] Update src/timing_pkg.sv Co-authored-by: Andreas Kurth --- src/timing_pkg.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/timing_pkg.sv b/src/timing_pkg.sv index 4a1c391..1c1cf15 100644 --- a/src/timing_pkg.sv +++ b/src/timing_pkg.sv @@ -1,4 +1,4 @@ -// Copyright (c) 2019 ETH Zurich, University of Bologna +// Copyright (c) 2022 ETH Zurich, University of Bologna // // Copyright and related rights are licensed under the Solderpad Hardware // License, Version 0.51 (the "License"); you may not use this file except in From 0714cd8a608dae3092134c23fc80425092d9846e Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Wed, 12 Jan 2022 14:33:37 +0100 Subject: [PATCH 5/7] Update src/interfaces.sv Co-authored-by: Andreas Kurth --- src/interfaces.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/interfaces.sv b/src/interfaces.sv index 252eed4..ad1f841 100644 --- a/src/interfaces.sv +++ b/src/interfaces.sv @@ -1,4 +1,4 @@ -// Copyright (c) 2019 ETH Zurich, University of Bologna +// Copyright (c) 2022 ETH Zurich, University of Bologna // // Copyright and related rights are licensed under the Solderpad Hardware // License, Version 0.51 (the "License"); you may not use this file except in From 67963d77f981c8963c596c8d1aaaffed1d408fc6 Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Wed, 12 Jan 2022 14:33:51 +0100 Subject: [PATCH 6/7] Update src/timing_pkg.sv Co-authored-by: Andreas Kurth --- src/timing_pkg.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/timing_pkg.sv b/src/timing_pkg.sv index 1c1cf15..10f9def 100644 --- a/src/timing_pkg.sv +++ b/src/timing_pkg.sv @@ -61,7 +61,7 @@ package timing_pkg; task test_wait_cycles(int unsigned n); uninit_warning(); - repeat(n) @(posedge(clk_vif.clk)); + this.wait_cycles(n); #(test_delay); endtask From 15fb795c6d4f08a8e3b4965a0b27591d126f8675 Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Wed, 12 Jan 2022 14:41:47 +0100 Subject: [PATCH 7/7] ati: Add ATI timing utilities Provide convenience methods to time apply and acquire operations according to ATI specification. --- src/interfaces.sv | 2 +- src/timing_pkg.sv | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/interfaces.sv b/src/interfaces.sv index ad1f841..d0e9663 100644 --- a/src/interfaces.sv +++ b/src/interfaces.sv @@ -12,4 +12,4 @@ interface clk_if(); logic clk; logic rst_n; -endinterface \ No newline at end of file +endinterface diff --git a/src/timing_pkg.sv b/src/timing_pkg.sv index 10f9def..42d5813 100644 --- a/src/timing_pkg.sv +++ b/src/timing_pkg.sv @@ -90,4 +90,4 @@ package timing_pkg; endclass -endpackage \ No newline at end of file +endpackage