From f14e7e0a330836ae04d0613deb0bfb11cc95feb6 Mon Sep 17 00:00:00 2001 From: Georg Rutishauser Date: Fri, 28 Jun 2024 18:13:43 +0200 Subject: [PATCH] PULP DMA wrapper: INIT channel response is always valid --- src/pulp_idma_wrap.sv | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/pulp_idma_wrap.sv b/src/pulp_idma_wrap.sv index bd3f7d32..7b89b7dd 100644 --- a/src/pulp_idma_wrap.sv +++ b/src/pulp_idma_wrap.sv @@ -453,12 +453,12 @@ module pulp_idma_wrap #( // implement zero memory using init protocol assign init_read_rsp.rsp_chan.init = '0; - assign init_read_rsp.rsp_valid = init_read_req.req_valid; // might need spill register + assign init_read_rsp.rsp_valid = 1'b1; assign init_read_rsp.req_ready = 1'b1; // implement /dev/null assign init_write_rsp.rsp_chan.init = '0; - assign init_write_rsp.rsp_valid = init_read_req.req_valid; // might need spill register + assign init_write_rsp.rsp_valid = 1'b1; assign init_write_rsp.req_ready = 1'b1; @@ -572,12 +572,12 @@ axi_ar_chan_width, `MY_MAX(init_req_chan_width, obi_a_chan_width) // implement zero memory using init protocol assign init_read_rsp.rsp_chan.init = '0; - assign init_read_rsp.rsp_valid = init_read_req.req_valid; // might need spill register + assign init_read_rsp.rsp_valid = 1'b1; assign init_read_rsp.req_ready = 1'b1; // implement /dev/null assign init_write_rsp.rsp_chan.init = '0; - assign init_write_rsp.rsp_valid = init_read_req.req_valid; // might need spill register + assign init_write_rsp.rsp_valid = 1'b1; assign init_write_rsp.req_ready = 1'b1; end : gen_cpy_in end : gen_streams