From 0bc8ce21abbe80edf91e985d27c77ecfb56d378d Mon Sep 17 00:00:00 2001 From: Luca Colagrande Date: Mon, 11 Sep 2023 13:34:25 +0200 Subject: [PATCH] treewide: Alias narrow SPM address space to uncached region --- target/sim/cfg/full.hjson | 2 ++ target/sim/cfg/single-cluster.hjson | 2 ++ target/sim/sw/host/runtime/host.c | 3 ++- target/sim/sw/host/runtime/host.ld | 7 +++++++ util/occamygen/occamygen.py | 6 +++++- 5 files changed, 18 insertions(+), 2 deletions(-) diff --git a/target/sim/cfg/full.hjson b/target/sim/cfg/full.hjson index 95f363325..8766fd184 100644 --- a/target/sim/cfg/full.hjson +++ b/target/sim/cfg/full.hjson @@ -357,6 +357,8 @@ spm_narrow: { address: 1879048192, // 0x7000_0000 length: 524288, // 512 kiB 0x8_0000 + # An uncached alias address space of the same length + uncached_alias: 1879572480, // 0x7008_0000 }, spm_wide: { address: 1895825408, // 0x7100_0000 diff --git a/target/sim/cfg/single-cluster.hjson b/target/sim/cfg/single-cluster.hjson index 79d822c58..418f2cf0e 100644 --- a/target/sim/cfg/single-cluster.hjson +++ b/target/sim/cfg/single-cluster.hjson @@ -357,6 +357,8 @@ spm_narrow: { address: 1879048192, // 0x7000_0000 length: 524288, // 512 kiB 0x8_0000 + # An uncached alias address space of the same length + uncached_alias: 1879572480, // 0x7008_0000 }, spm_wide: { address: 1895825408, // 0x7100_0000 diff --git a/target/sim/sw/host/runtime/host.c b/target/sim/sw/host/runtime/host.c index b99d37e88..c7d340b3a 100644 --- a/target/sim/sw/host/runtime/host.c +++ b/target/sim/sw/host/runtime/host.c @@ -67,7 +67,8 @@ volatile uint64_t* const clint_mtimecmp0_ptr = // Globals //=============================================================== -volatile comm_buffer_t comm_buffer __attribute__((aligned(8))); +comm_buffer_t comm_buffer __attribute__((aligned(8))) +__attribute__((section(".nc_spm"))); //=============================================================== // Initialization diff --git a/target/sim/sw/host/runtime/host.ld b/target/sim/sw/host/runtime/host.ld index b72e72e29..cdb8ad70c 100644 --- a/target/sim/sw/host/runtime/host.ld +++ b/target/sim/sw/host/runtime/host.ld @@ -7,6 +7,7 @@ ENTRY(_start) MEMORY { DRAM (rwxa) : ORIGIN = 0x80000000, LENGTH = 0x80000000 + NC_SPM (rwxa) : ORIGIN = 0x70080000, LENGTH = 0x80000 } SECTIONS @@ -41,6 +42,12 @@ SECTIONS __bss_end = . ; } > DRAM + .nc_spm : + { + *(.nc_spm) + . = ALIGN(8); + } > NC_SPM + __end = .; .devicebin : { *(.devicebin) } > DRAM diff --git a/util/occamygen/occamygen.py b/util/occamygen/occamygen.py index 7b6fb02bc..bacea525f 100755 --- a/util/occamygen/occamygen.py +++ b/util/occamygen/occamygen.py @@ -270,10 +270,14 @@ def main(): occamy.cfg["pcie"]["address_mm"]).attach_to(am_soc_narrow_xbar) # Connect narrow SPM to Narrow AXI + bases = [] + bases.append(occamy.cfg["spm_narrow"]["address"]) + if "uncached_alias" in occamy.cfg["spm_narrow"]: + bases.append(occamy.cfg["spm_narrow"]["uncached_alias"]) am_spm_narrow = am.new_leaf( "spm_narrow", occamy.cfg["spm_narrow"]["length"], - occamy.cfg["spm_narrow"]["address"]).attach_to(am_soc_narrow_xbar) + *bases).attach_to(am_soc_narrow_xbar) # Connect wide SPM to Wide AXI am_spm_wide = am.new_leaf(