diff --git a/.github/workflows/build-docker.yml b/.github/workflows/build-docker.yml index 4af192dfa..48527c45e 100644 --- a/.github/workflows/build-docker.yml +++ b/.github/workflows/build-docker.yml @@ -27,6 +27,6 @@ jobs: context: . file: util/container/Dockerfile push: true - tags: ghcr.io/pulp-platform/occamy:latest + tags: ghcr.io/pulp-platform/occamy:${{ github.ref_name }} build-args: |- SNITCH_LLVM_VERSION=latest diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 9ae63a5ff..8153b7856 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -15,7 +15,7 @@ jobs: name: Build documentation runs-on: ubuntu-22.04 container: - image: ghcr.io/pulp-platform/occamy + image: ghcr.io/pulp-platform/occamy:main steps: - uses: actions/checkout@v2 - name: Build docs @@ -31,7 +31,7 @@ jobs: name: Build SW for Occamy runs-on: ubuntu-22.04 container: - image: ghcr.io/pulp-platform/occamy + image: ghcr.io/pulp-platform/occamy:main steps: - uses: actions/checkout@v2 with: @@ -48,7 +48,7 @@ jobs: name: Generate Occamy RTL sources runs-on: ubuntu-22.04 container: - image: ghcr.io/pulp-platform/occamy + image: ghcr.io/pulp-platform/occamy:main steps: - uses: actions/checkout@v2 with: diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 96cd46719..79ce49248 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -5,32 +5,9 @@ variables: GIT_STRATEGY: clone GIT_SUBMODULE_STRATEGY: recursive - PYTHON: /usr/local/anaconda3-2022.05/bin/python3 - BENDER: bender-0.27.1 - CLANG_FORMAT: clang-format-10.0.1 - CC: gcc-9.2.0 - CXX: g++-9.2.0 - QUESTA_SEPP: questa-2022.3 - LLVM_BINROOT: /usr/pack/riscv-1.0-kgf/pulp-llvm-0.12.0/bin - CLANG: /usr/pack/riscv-1.0-kgf/pulp-llvm-0.12.0/bin/clang - RISCV_GCC_VERSION: 8.3.0-2020.04.0 before_script: - # yamllint disable rule:line-length - - $PYTHON -m venv .venv - - source .venv/bin/activate - - $BENDER update - - pip install -r python-requirements.txt - # Install CVA6 compiler toolchain - - curl -Ls -o riscv-gcc.tar.gz https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-$RISCV_GCC_VERSION-x86_64-linux-ubuntu14.tar.gz - - mkdir -p .tools/riscv && chmod 777 .tools/riscv - - tar -C .tools/riscv -xf riscv-gcc.tar.gz --strip-components=1 - - export PATH="$(pwd)/.tools/riscv/bin:$PATH" - # Install verible - - mkdir -p .tools/verible && chmod 777 .tools/verible - - curl -L https://github.com/chipsalliance/verible/releases/download/v0.0-3222-gb19cdf44/verible-v0.0-3222-gb19cdf44-CentOS-7.9.2009-Core-x86_64.tar.gz | tar xz -C .tools/verible --strip-components=1 - - export PATH="$(pwd)/.tools/verible/bin:$PATH" - # yamllint enable rule:line-length + source iis-setup.sh ############## # Build docs # @@ -62,6 +39,6 @@ occamy-full-vsim: script: - cd target/sim - make CFG_OVERRIDE=cfg/full.hjson rtl - - make LENGTH=384 sw + - make sw - make bin/occamy_top.vsim - ./run.py sw/run-full-occamy.yaml --simulator vsim diff --git a/Bender.yml b/Bender.yml index 9a8b42b3b..dd0d0849d 100644 --- a/Bender.yml +++ b/Bender.yml @@ -29,8 +29,9 @@ dependencies: cva6: { path: hw/vendor/openhwgroup_cva6 } opentitan_peripherals: { path: hw/vendor/pulp_platform_opentitan_peripherals } register_interface: { git: https://github.com/pulp-platform/register_interface.git, version: 0.3.8 } - snitch_cluster: { git: https://github.com/pulp-platform/snitch_cluster.git, rev: ae02a03d7d401ed486dac80a3a1d77e1a89c395d } + snitch_cluster: { git: https://github.com/pulp-platform/snitch_cluster.git, rev: 269830af872fa943d8b079470120d42d62e1cb69 } tech_cells_generic: { git: https://github.com/pulp-platform/tech_cells_generic.git, rev: v0.2.11 } + cluster_icache: { git: https://github.com/pulp-platform/cluster_icache.git, version: 0.1.0 } workspace: package_links: diff --git a/hw/snitch_read_only_cache/src/snitch_read_only_cache.sv b/hw/snitch_read_only_cache/src/snitch_read_only_cache.sv index 290342471..6c27e06a9 100644 --- a/hw/snitch_read_only_cache/src/snitch_read_only_cache.sv +++ b/hw/snitch_read_only_cache/src/snitch_read_only_cache.sv @@ -273,7 +273,7 @@ module snitch_read_only_cache #( ); // The lookup module contains the actual cache RAMs and performs lookups. - snitch_icache_lookup #( + snitch_icache_lookup_parallel #( .CFG ( CFG ), .sram_cfg_tag_t ( sram_cfg_tag_t ), .sram_cfg_data_t ( sram_cfg_data_t ) diff --git a/iis-setup.sh b/iis-setup.sh new file mode 100644 index 000000000..66235571f --- /dev/null +++ b/iis-setup.sh @@ -0,0 +1,32 @@ +#!/usr/bin/env bash +# Copyright 2024 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +export BENDER=bender-0.27.1 +$BENDER checkout + +source deps/snitch_cluster/iis-setup.sh + +# TODO: uncomment if needed else remove +# export CLANG=/usr/pack/riscv-1.0-kgf/pulp-llvm-0.12.0/bin/clang +export CLANG_FORMAT=clang-format-10.0.1 + +# Install CVA6 compiler toolchain +RISCV_GCC_VERSION=8.3.0-2020.04.0 +mkdir -p tools/riscv +chmod 777 tools/riscv +cd tools/riscv +curl -Ls -o riscv-gcc.tar.gz https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-$RISCV_GCC_VERSION-x86_64-linux-ubuntu14.tar.gz +tar -xf riscv-gcc.tar.gz --strip-components=1 +export PATH=$(pwd)/bin:$PATH +cd - + +# Install verible +mkdir -p tools/verible +chmod 777 tools/verible +cd tools/verible +curl -Ls -o verible.tar.gz https://github.com/chipsalliance/verible/releases/download/v0.0-3222-gb19cdf44/verible-v0.0-3222-gb19cdf44-CentOS-7.9.2009-Core-x86_64.tar.gz +tar -xzf verible.tar.gz --strip-components=1 +export PATH=$(pwd)/bin:$PATH +cd - \ No newline at end of file diff --git a/target/sim/Makefile b/target/sim/Makefile index c95b88cc4..509969913 100644 --- a/target/sim/Makefile +++ b/target/sim/Makefile @@ -15,17 +15,28 @@ CFG_OVERRIDE ?= # Override default config file .DEFAULT_GOAL := help .PHONY: all clean all: rtl sw addrmap -clean: clean-bender clean-rtl clean-sw clean-addrmap clean-vlt clean-vsim clean-vcs clean-logs +clean: clean-bender clean-rtl clean-sw clean-addrmap clean-vlt clean-vcs clean-logs ############ # Makefrag # ############ +# Common definitions used by included Makefiles + MKFILE_PATH := $(abspath $(lastword $(MAKEFILE_LIST))) MKFILE_DIR := $(dir $(MKFILE_PATH)) ROOT := $(MKFILE_DIR)../.. SNITCH_ROOT := $(shell bender path snitch_cluster) +TARGET = occamy_top + +CVA6_TXT_TRACE = $(LOGS_DIR)/trace_hart_00000.txt +CVA6_PERF_DUMP = $(LOGS_DIR)/hart_00000_perf.json +CVA6_ANNOTATED_TRACE = $(LOGS_DIR)/trace_hart_00000.s +TXT_TRACES += $(CVA6_TXT_TRACE) +PERF_DUMPS += $(CVA6_PERF_DUMP) +ANNOTATED_TRACES += $(CVA6_ANNOTATED_TRACE) + include $(SNITCH_ROOT)/target/common/common.mk ############ @@ -510,7 +521,7 @@ $(VLT_BUILDDIR)/test/uartdpi/uartdpi.o: test/uartdpi/uartdpi.c $(CC) $(CFLAGS) $(VLT_CFLAGS) -c $< -o $@ # Link verilated archive wich $(VLT_COBJ) -$(BIN_DIR)/occamy_top.vlt: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a +$(BIN_DIR)/$(TARGET).vlt: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a mkdir -p $(dir $@) $(CXX) $(LDFLAGS) -std=c++14 -L ${VLT_BUILDDIR}/lib -o $@ $(VLT_COBJ) $(VLT_AR) -lfesvr -lpthread -lutil @@ -518,40 +529,25 @@ $(BIN_DIR)/occamy_top.vlt: $(VLT_AR) $(VLT_COBJ) ${VLT_BUILDDIR}/lib/libfesvr.a .PHONY: clean-vlt clean-vlt: clean-work rm -rf work-vlt - rm -f $(BIN_DIR)/occamy_top.vlt + rm -f $(BIN_DIR)/$(TARGET).vlt ############ -# Modelsim # +# Questasim # ############ -${VSIM_BUILDDIR}/compile.vsim.tcl: $(VSIM_SOURCES) ${TB_SRCS} ${TB_CC_SOURCES} test/bootrom.bin | $(VSIM_BUILDDIR) - $(VLIB) $(dir $@) - ${BENDER} script vsim ${VSIM_BENDER} --vlog-arg="${VLOG_FLAGS} -work $(dir $@) " > $@ - echo '${VLOG} -work $(dir $@) $(TB_CC_SOURCES) -ccflags "$(TB_CC_FLAGS)"' >> $@ - echo 'return 0' >> $@ - -# Build compilation script and compile all sources for Questasim simulation -$(BIN_DIR)/occamy_top.vsim: ${VSIM_BUILDDIR}/compile.vsim.tcl work/lib/libfesvr.a - $(call QUESTASIM,tb_bin) - @# Rename CVA6 trace to align with Snitch trace names - @echo "mv ${CVA6_TRACE} $(LOGS_DIR)/trace_hart_00000.txt" >> $@ - @echo "mv ${CVA6_TRACE} $(LOGS_DIR)/trace_hart_00000.txt" >> $@.gui - @# Move all other traces to logs folder as well - @echo "mv *trace*.log $(LOGS_DIR)/" >> $@ - @echo "mv *trace*.log $(LOGS_DIR)/" >> $@.gui - -# Clean all build directories and temporary files for Questasim simulation -clean-vsim: clean-work - rm -rf $(BIN_DIR)/occamy_top.vsim $(BIN_DIR)/occamy_top.vsim.gui $(VSIM_BUILDDIR) vsim.wlf +include $(SNITCH_ROOT)/target/common/vsim.mk + +# Add dependency on bootrom +$(BIN_DIR)/$(TARGET).vsim: test/bootrom.bin ####### # VCS # ####### # Build compilation script and compile all sources for VCS simulation -$(BIN_DIR)/occamy_top.vcs: work-vcs/compile.sh work/lib/libfesvr.a ${TB_CC_SOURCES} test/bootrom.bin +$(BIN_DIR)/$(TARGET).vcs: work-vcs/compile.sh work/lib/libfesvr.a ${TB_CC_SOURCES} test/bootrom.bin mkdir -p bin - vcs $(VCS_FLAGS) -o $(BIN_DIR)/occamy_top.vcs tb_bin -cc $(CC) -cpp $(CXX) \ + vcs $(VCS_FLAGS) -o $(BIN_DIR)/$(TARGET).vcs tb_bin -cc $(CC) -cpp $(CXX) \ $(TB_CC_SOURCES) -CFLAGS "$(TB_CC_FLAGS)" -LDFLAGS "-L${FESVR}/lib" -lfesvr -lutil # Clean all build directories and temporary files for VCS simulation @@ -559,7 +555,7 @@ $(BIN_DIR)/occamy_top.vcs: work-vcs/compile.sh work/lib/libfesvr.a ${TB_CC_SOURC clean-vcs: clean-work rm -rf AN.DB rm -rf work-vcs - rm -f $(BIN_DIR)/occamy_top.vcs + rm -f $(BIN_DIR)/$(TARGET).vcs ######## # FPGA # @@ -580,7 +576,7 @@ clean-work: rm -rf work clean-bender: - rm -rf $(ROOT)/Bender.lock $(ROOT)/.bender/ $(ROOT)/deps + rm -rf $(BENDER_LOCK) $(ROOT)/.bender/ $(ROOT)/deps clean-logs: rm -rf $(LOGS_DIR)/ @@ -594,9 +590,9 @@ help: @echo -e "" @echo -e "${Blue}help ${Black}Show an overview of all Makefile targets." @echo -e "" - @echo -e "${Blue}bin/occamy_top.vcs ${Black}Build compilation script and compile all sources for VCS simulation. @IIS: vcs-2020.12 make bin/occamy_top.vcs" - @echo -e "${Blue}bin/occamy_top.vlt ${Black}Build compilation script and compile all sources for Verilator simulation." - @echo -e "${Blue}bin/occamy_top.vsim ${Black}Build compilation script and compile all sources for Questasim simulation. @IIS: QUESTA_HOME=/usr/pack/modelsim-10.7b-kgf/questasim/ CC=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/gcc CXX=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/g++ LD=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/ld make bin/occamy_top.vsim" + @echo -e "${Blue}bin/$(TARGET).vcs ${Black}Build compilation script and compile all sources for VCS simulation. @IIS: vcs-2020.12 make bin/$(TARGET).vcs" + @echo -e "${Blue}bin/$(TARGET).vlt ${Black}Build compilation script and compile all sources for Verilator simulation." + @echo -e "${Blue}bin/$(TARGET).vsim ${Black}Build compilation script and compile all sources for Questasim simulation. @IIS: QUESTA_HOME=/usr/pack/modelsim-10.7b-kgf/questasim/ CC=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/gcc CXX=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/g++ LD=$(QUESTA_HOME)/gcc-5.3.0-linux_x86_64/bin/ld make bin/$(TARGET).vsim" @echo -e "" @echo -e "${Blue}all ${Black}Update all SW and HW related sources (by, e.g., re-generating the RegGen registers and their c-header files)." @echo -e "${Blue}fpga ${Black}Build a small Occamy version (CVA6 + 1xcluster) for the VCU128 FPGA board." diff --git a/target/sim/sw/run-full-occamy.yaml b/target/sim/sw/run-full-occamy.yaml index 0221ed562..abc662855 100644 --- a/target/sim/sw/run-full-occamy.yaml +++ b/target/sim/sw/run-full-occamy.yaml @@ -4,8 +4,10 @@ runs: - elf: host/apps/offload/build/offload-axpy.elf - cmd: [../../../deps/snitch_cluster/sw/blas/axpy/verify.py, --symbols-bin, - ./device/apps/blas/axpy/build/axpy.elf, "${sim_bin}", "${elf}"] + cmd: [../../../deps/snitch_cluster/sw/blas/axpy/scripts/verify.py, + --symbols-bin, ./device/apps/blas/axpy/build/axpy.elf, + "${sim_bin}", "${elf}"] - elf: host/apps/offload/build/offload-gemm.elf - cmd: [../../../deps/snitch_cluster/sw/blas/gemm/verify.py, --symbols-bin, - ./device/apps/blas/gemm/build/gemm.elf, "${sim_bin}", "${elf}"] + cmd: [../../../deps/snitch_cluster/sw/blas/gemm/scripts/verify.py, + --symbols-bin, ./device/apps/blas/gemm/build/gemm.elf, + "${sim_bin}", "${elf}"] diff --git a/target/sim/sw/run-single-cluster.yaml b/target/sim/sw/run-single-cluster.yaml index 8ec1d07b3..ed432924e 100644 --- a/target/sim/sw/run-single-cluster.yaml +++ b/target/sim/sw/run-single-cluster.yaml @@ -4,10 +4,12 @@ runs: - elf: host/apps/offload/build/offload-axpy.elf - cmd: [../../../deps/snitch_cluster/sw/blas/axpy/verify.py, --symbols-bin, - ./device/apps/blas/axpy/build/axpy.elf, "${sim_bin}", "${elf}"] + cmd: [../../../deps/snitch_cluster/sw/blas/axpy/scripts/verify.py, + --symbols-bin, ./device/apps/blas/axpy/build/axpy.elf, + "${sim_bin}", "${elf}"] - elf: host/apps/offload/build/offload-gemm.elf - cmd: [../../../deps/snitch_cluster/sw/blas/gemm/verify.py, --symbols-bin, - ./device/apps/blas/gemm/build/gemm.elf, "${sim_bin}", "${elf}"] + cmd: [../../../deps/snitch_cluster/sw/blas/gemm/scripts/verify.py, + --symbols-bin, ./device/apps/blas/gemm/build/gemm.elf, + "${sim_bin}", "${elf}"] - elf: host/apps/hello_world/build/hello_world.elf cmd: [./host/apps/hello_world/verify.py, "${sim_bin}", "${elf}"] diff --git a/util/occamygen/occamy.py b/util/occamygen/occamy.py index 73a3e748f..3ce5134ea 100644 --- a/util/occamygen/occamy.py +++ b/util/occamygen/occamy.py @@ -56,7 +56,7 @@ def __init__(self, cfg): # Overwrite boot address with base of bootrom self.cluster.cfg["boot_addr"] = self.cfg["peripherals"]["rom"]["address"] - self.cluster.cfg['tie_ports'] = False + self.cluster.cfg['cluster_base_expose'] = True if "ro_cache_cfg" in self.cfg["s1_quadrant"]: ro_cache = self.cfg["s1_quadrant"]["ro_cache_cfg"]