From 44790de641ec6364293c0e6bb337ee8656a7b6b5 Mon Sep 17 00:00:00 2001 From: eugeniomuscinelli Date: Thu, 18 Jul 2024 15:44:42 +0000 Subject: [PATCH] changes not working on compute server? --- Bender.lock | 14 +++++++++++--- Bender.yml | 2 +- Makefile | 1 + rtl/axi2mem_wrap.sv | 1 + 4 files changed, 14 insertions(+), 4 deletions(-) diff --git a/Bender.lock b/Bender.lock index 28879c3f..ac380ec7 100644 --- a/Bender.lock +++ b/Bender.lock @@ -85,6 +85,12 @@ packages: - common_cells - fpnew - tech_cells_generic + cv32e40x: + revision: baba1eeb3b845306c45be714f677ff786753f136 + version: null + source: + Git: https://github.com/pulp-platform/cv32e40x.git + dependencies: [] event_unit_flex: revision: 28e0499374117c7b0ef4c6ad81b60d7526af886f version: null @@ -109,7 +115,7 @@ packages: - common_cells hci: revision: afe0220f9a2f132dc8655c48da05aae5121a570b - version: null + version: 2.1.1 source: Git: https://github.com/pulp-platform/hci.git dependencies: @@ -178,17 +184,19 @@ packages: dependencies: - axi_slice redmule: - revision: 60ba008c339ec70b5ffa7120bec2cbf5a8f53c99 + revision: 971c41af81fa9433912fe48bf056db948a93853d version: null source: - Git: https://github.com/pulp-platform/redmule.git + Git: https://github.com/eugeniomuscinelli/redmule.git dependencies: - common_cells - cv32e40p + - cv32e40x - fpnew - hci - hwpe-ctrl - hwpe-stream + - ibex - tech_cells_generic redundancy_cells: revision: c37bdb47339bf70e8323de8df14ea8bbeafb6583 diff --git a/Bender.yml b/Bender.yml index 2f3bd5ad..ed3305bd 100644 --- a/Bender.yml +++ b/Bender.yml @@ -32,7 +32,7 @@ dependencies: hci: { git: "https://github.com/pulp-platform/hci.git", rev: afe0220 } # branch: master register_interface: { git: "https://github.com/pulp-platform/register_interface.git", version: 0.4.4 } redundancy_cells: { git: "https://github.com/pulp-platform/redundancy_cells.git", rev: c37bdb47339bf70e8323de8df14ea8bbeafb6583 } # branch: astral_rebase - redmule: { git: "https://github.com/pulp-platform/redmule.git", rev: 60ba008c339ec70b5ffa7120bec2cbf5a8f53c99 } # branch: fc/hci-v2.1 + redmule: { git: "https://github.com/eugeniomuscinelli/redmule.git", rev: 971c41af81fa9433912fe48bf056db948a93853d } # branch: EM neureka: { git: "https://github.com/pulp-platform/neureka.git", version: 1.0.0 } softex: { git: "https://github.com/belanoa/softex.git" , version: 1.0.0 } diff --git a/Makefile b/Makefile index 0764afd2..fb8b0214 100644 --- a/Makefile +++ b/Makefile @@ -46,6 +46,7 @@ bender_targs += -t mchan bender_targs += -t cluster_standalone bender_targs += -t scm_use_fpga_scm bender_targs += -t cv32e40p_use_ff_regfile +bender_targs += -t redmule_hwpe define generate_vsim echo 'set ROOT [file normalize [file dirname [info script]]/$3]' > $1 diff --git a/rtl/axi2mem_wrap.sv b/rtl/axi2mem_wrap.sv index 1e2268e0..0558bed4 100644 --- a/rtl/axi2mem_wrap.sv +++ b/rtl/axi2mem_wrap.sv @@ -15,6 +15,7 @@ * Igor Loi * Francesco Conti */ + module axi2mem_wrap #(