diff --git a/Bender.lock b/Bender.lock index d48a9c04d..c2dd22e69 100644 --- a/Bender.lock +++ b/Bender.lock @@ -7,8 +7,8 @@ packages: dependencies: - common_cells axi: - revision: 4e54ac6766b160217a83a74d5a23af9bbf59e6ee - version: null + revision: 39f5f2d51c5e524f6fc5cf8b6e901f7dcc5622d7 + version: 0.39.6 source: Git: https://github.com/pulp-platform/axi dependencies: @@ -50,8 +50,8 @@ packages: - common_verification - tech_cells_generic common_verification: - revision: 9c07fa860593b2caabd9b5681740c25fac04b878 - version: 0.2.3 + revision: fa2630f61666f61d9d78451c4d8b4d1ea403944e + version: 0.2.4 source: Git: https://github.com/pulp-platform/common_verification.git dependencies: [] @@ -71,7 +71,7 @@ packages: dependencies: - common_cells idma: - revision: 1a42da9d5c76f1cff0bcdaaacc474ed85631d734 + revision: d4010425e943c9845b8549b3c8f8cc8dba73ec47 version: null source: Git: https://github.com/pulp-platform/iDMA @@ -91,8 +91,8 @@ packages: - common_cells - common_verification register_interface: - revision: ae616e5a1ec2b41e72d200e5ab09c65e94aebd3d - version: 0.4.4 + revision: 5daa85d164cf6b54ad061ea1e4c6f3624556e467 + version: 0.4.5 source: Git: https://github.com/pulp-platform/register_interface dependencies: diff --git a/Bender.yml b/Bender.yml index 29fc783b5..332f4b1da 100644 --- a/Bender.yml +++ b/Bender.yml @@ -19,7 +19,7 @@ package: - Matheus Cavalcante dependencies: - axi: { git: https://github.com/pulp-platform/axi, rev: 4e54ac6766b160217a83a74d5a23af9bbf59e6ee } + axi: { git: https://github.com/pulp-platform/axi, version: 0.39.6 } axi_riscv_atomics: { git: https://github.com/pulp-platform/axi_riscv_atomics, version: 0.6.0 } common_cells: { git: https://github.com/pulp-platform/common_cells, version: 1.35.0 } FPnew: { git: "https://github.com/pulp-platform/cvfpu.git", rev: pulp-v0.1.3 } @@ -27,7 +27,7 @@ dependencies: tech_cells_generic: { git: https://github.com/pulp-platform/tech_cells_generic, version: 0.2.11 } riscv-dbg: { git: https://github.com/pulp-platform/riscv-dbg, version: 0.8.0 } cluster_icache: { git: https://github.com/pulp-platform/cluster_icache.git, version: 0.1.0 } - idma: { git: https://github.com/pulp-platform/iDMA, rev: __deploy__9cbcd30__snitch-tracing } + idma: { git: https://github.com/pulp-platform/iDMA, rev: __deploy__110fd06__master } export_include_dirs: - hw/reqrsp_interface/include @@ -184,9 +184,9 @@ sources: - target/common/test/tb_bin.sv # target/snitch_cluster - - target: snitch_cluster + - target: snitch_cluster_wrapper files: - target/snitch_cluster/generated/snitch_cluster_wrapper.sv - - target: all(snitch_cluster, any(simulation, verilator)) + - target: all(snitch_cluster_wrapper, any(simulation, verilator)) files: - target/snitch_cluster/test/testharness.sv diff --git a/Makefile b/Makefile index bdfa044c2..56f432f45 100644 --- a/Makefile +++ b/Makefile @@ -27,7 +27,7 @@ ROOT = $(dir $(abspath $(lastword $(MAKEFILE_LIST)))) ############ NONFREE_REMOTE ?= git@iis-git.ee.ethz.ch:pulp-restricted/snitch-cluster-nonfree.git -NONFREE_COMMIT ?= e30961e20a23a76442da27d2ba07c9fe20f3b575 +NONFREE_COMMIT ?= 35cdb5b03778d3ec52e6d8fa0856ee789489b25a NONFREE_DIR = $(ROOT)/nonfree all: nonfree diff --git a/sw/snRuntime/api/cls_decls.h b/sw/snRuntime/api/cls_decls.h index 0e18fdf3d..a70c72556 100644 --- a/sw/snRuntime/api/cls_decls.h +++ b/sw/snRuntime/api/cls_decls.h @@ -10,6 +10,7 @@ typedef struct { uint32_t hw_barrier; + uint32_t reduction; snrt_allocator_t l1_allocator; } cls_t; diff --git a/sw/snRuntime/api/riscv_decls.h b/sw/snRuntime/api/riscv_decls.h index f0aae1779..c0db9c53f 100644 --- a/sw/snRuntime/api/riscv_decls.h +++ b/sw/snRuntime/api/riscv_decls.h @@ -6,9 +6,9 @@ #include -static inline void snrt_wfi(); +inline void snrt_wfi(); -static inline uint32_t snrt_mcycle(); +inline uint32_t snrt_mcycle(); inline void snrt_interrupt_enable(uint32_t irq); diff --git a/sw/snRuntime/api/sync_decls.h b/sw/snRuntime/api/sync_decls.h index 0e18f943a..55f98d96c 100644 --- a/sw/snRuntime/api/sync_decls.h +++ b/sw/snRuntime/api/sync_decls.h @@ -28,3 +28,5 @@ inline void snrt_cluster_hw_barrier(); inline void snrt_global_barrier(); inline uint32_t snrt_global_all_to_all_reduction(uint32_t value); + +inline void snrt_wait_writeback(uint32_t val); diff --git a/sw/snRuntime/src/sync.c b/sw/snRuntime/src/sync.c index 112dc07a4..17bcfc9b1 100644 --- a/sw/snRuntime/src/sync.c +++ b/sw/snRuntime/src/sync.c @@ -32,3 +32,5 @@ extern void snrt_global_reduction_dma(double *dst_buffer, double *src_buffer, size_t len); extern uint32_t snrt_global_all_to_all_reduction(uint32_t value); + +extern void snrt_wait_writeback(uint32_t val); diff --git a/sw/snRuntime/src/sync.h b/sw/snRuntime/src/sync.h index add26fa08..9a052e612 100644 --- a/sw/snRuntime/src/sync.h +++ b/sw/snRuntime/src/sync.h @@ -162,9 +162,23 @@ inline void snrt_partial_barrier(snrt_barrier_t *barr, uint32_t n) { * will stall indefinitely. */ inline uint32_t snrt_global_all_to_all_reduction(uint32_t value) { - __atomic_add_fetch(&_reduction_result, value, __ATOMIC_RELAXED); - snrt_global_barrier(); - return _reduction_result; + // Reduce cores within cluster in TCDM + uint32_t *cluster_result = &(cls()->reduction); + uint32_t tmp = __atomic_fetch_add(cluster_result, value, __ATOMIC_RELAXED); + + // Wait for writeback to ensure AMO is seen by all cores after barrier + snrt_wait_writeback(tmp); + snrt_cluster_hw_barrier(); + + // Reduce DM cores across clusters in global memory + if (snrt_is_dm_core()) { + __atomic_add_fetch(&_reduction_result, *cluster_result, + __ATOMIC_RELAXED); + snrt_inter_cluster_barrier(); + *cluster_result = _reduction_result; + } + snrt_cluster_hw_barrier(); + return *cluster_result; } /** @@ -236,3 +250,17 @@ inline void snrt_global_reduction_dma(double *dst_buffer, double *src_buffer, } } } + +//================================================================================ +// Memory consistency +//================================================================================ + +/** + * @brief Ensure value is written back to the register file. + * @details This function introduces a RAW dependency on val to stall the + * core until val is written back to the register file. + * @param val The variable we want to wait on. + */ +inline void snrt_wait_writeback(uint32_t val) { + asm volatile("mv %0, %0" : "+r"(val)::); +} diff --git a/target/common/common.mk b/target/common/common.mk index 77d0e79d3..cc41e85e5 100644 --- a/target/common/common.mk +++ b/target/common/common.mk @@ -12,7 +12,8 @@ UTIL_DIR ?= $(SNITCH_ROOT)/util LOGS_DIR = $(SIM_DIR)/logs # Files -BENDER_LOCK ?= $(ROOT)/Bender.lock +BENDER_LOCK = $(ROOT)/Bender.lock +BENDER_YML = $(ROOT)/Bender.yml # SEPP packages QUESTA_SEPP ?= @@ -47,15 +48,9 @@ VLT_ROOT ?= ${VERILATOR_ROOT} VLT_JOBS ?= $(shell nproc) VLT_NUM_THREADS ?= 1 -MATCH_END := '/+incdir+/ s/$$/\/*\/*/' -MATCH_BGN := 's/+incdir+//g' -MATCH_DEF := '/+define+/d' -SED_SRCS := sed -e ${MATCH_END} -e ${MATCH_BGN} -e ${MATCH_DEF} - -COMMON_BENDER_FLAGS += -t rtl +COMMON_BENDER_FLAGS += -t rtl -t snitch_cluster VSIM_BENDER += $(COMMON_BENDER_FLAGS) -t test -t simulation -t vsim -VSIM_SOURCES = $(shell ${BENDER} script flist-plus ${VSIM_BENDER} | ${SED_SRCS}) VSIM_BUILDDIR ?= work-vsim VSIM_FLAGS += -t 1ps ifeq ($(DEBUG), ON) @@ -68,7 +63,6 @@ endif # VCS_BUILDDIR should to be the same as the `DEFAULT : ./work-vcs` # in target/snitch_cluster/synopsys_sim.setup VCS_BENDER += $(COMMON_BENDER_FLAGS) -t test -t simulation -t vcs -VCS_SOURCES = $(shell ${BENDER} script flist-plus ${VCS_BENDER} | ${SED_SRCS}) VCS_BUILDDIR := work-vcs # fesvr is being installed here @@ -76,7 +70,6 @@ FESVR ?= ${MKFILE_DIR}work FESVR_VERSION ?= 35d50bc40e59ea1d5566fbd3d9226023821b1bb6 VLT_BENDER += $(COMMON_BENDER_FLAGS) -DCOMMON_CELLS_ASSERTS_OFF -VLT_SOURCES = $(shell ${BENDER} script flist-plus ${VLT_BENDER} | ${SED_SRCS}) VLT_BUILDDIR := $(abspath work-vlt) VLT_FESVR = $(VLT_BUILDDIR)/riscv-isa-sim VLT_FLAGS += --timing @@ -91,7 +84,7 @@ VLT_FLAGS += -Wno-UNSIGNED VLT_FLAGS += -Wno-UNOPTFLAT VLT_FLAGS += -Wno-fatal VLT_FLAGS += --unroll-count 1024 -VLT_FLAGS += --threads $(VLT_NUM_THREADS) +VLT_FLAGS += --threads $(VLT_NUM_THREADS) VLT_CFLAGS += -std=c++20 -pthread VLT_CFLAGS += -I $(VLT_FESVR)/include -I $(TB_DIR) -I ${MKFILE_DIR}test @@ -170,15 +163,6 @@ $(VLT_BUILDDIR)/lib/libfesvr.a: $(VLT_FESVR)/${FESVR_VERSION}_unzip mkdir -p $(dir $@) cp $(dir $<)libfesvr.a $@ -####### -# VCS # -####### -$(VCS_BUILDDIR)/compile.sh: - mkdir -p $(VCS_BUILDDIR) - ${BENDER} script vcs ${VCS_BENDER} --vlog-arg="${VLOGAN_FLAGS}" --vcom-arg="${VHDLAN_FLAGS}" > $@ - chmod +x $@ - $(VCS_SEPP) $@ > $(VCS_BUILDDIR)/compile.log - ######## # Util # ######## diff --git a/target/common/vcs.mk b/target/common/vcs.mk new file mode 100644 index 000000000..0c477c09f --- /dev/null +++ b/target/common/vcs.mk @@ -0,0 +1,37 @@ +# Copyright 2024 ETH Zurich and University of Bologna. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +VCS_TOP_MODULE = tb_bin + +$(VCS_BUILDDIR): + mkdir -p $@ + +$(VCS_BUILDDIR)/compile.sh: $(BENDER_YML) $(BENDER_LOCK) | $(VCS_BUILDDIR) + $(BENDER) script vcs $(VCS_BENDER) --vlog-arg="$(VLOGAN_FLAGS)" --vcom-arg="$(VHDLAN_FLAGS)" > $@ + chmod +x $@ + +# Generate dependency file with RTL sources and headers using Verilator +$(VCS_BUILDDIR)/$(VCS_TOP_MODULE).d: $(BENDER_YML) $(BENDER_LOCK) $(GENERATED_RTL_SOURCES) | $(VCS_BUILDDIR) + $(VLT) $(shell $(BENDER) script verilator $(VCS_BENDER)) \ + --Mdir $(VCS_BUILDDIR) --MMD -E --top-module $(VCS_TOP_MODULE) > /dev/null + mv $(VCS_BUILDDIR)/V$(VCS_TOP_MODULE)__ver.d $@ + sed -i 's|^[^:]*:|$(BIN_DIR)/$(TARGET).vcs:|' $@ + +# Run compilation script and create VCS simulation binary +$(BIN_DIR)/$(TARGET).vcs: $(VCS_BUILDDIR)/compile.sh $(TB_CC_SOURCES) $(RTL_CC_SOURCES) work/lib/libfesvr.a | $(BIN_DIR) + $(VCS_SEPP) $< > $(VCS_BUILDDIR)/compile.log + $(VCS) -Mlib=$(VCS_BUILDDIR) -Mdir=$(VCS_BUILDDIR) -o $@ -cc $(CC) -cpp $(CXX) \ + -assert disable_cover -override_timescale=1ns/1ps -full64 $(VCS_TOP_MODULE) $(TB_CC_SOURCES) $(RTL_CC_SOURCES) \ + -CFLAGS "$(TB_CC_FLAGS)" -LDFLAGS "-L$(FESVR)/lib" -lfesvr + +# Clean all build directories and temporary files for VCS simulation +.PHONY: clean-vcs +clean-vcs: clean-work + rm -rf $(BIN_DIR)/$(TARGET).vcs $(VCS_BUILDDIR) vc_hdrs.h + +clean: clean-vcs + +ifneq ($(filter-out clean%,$(MAKECMDGOALS)),) +-include $(VCS_BUILDDIR)/$(VCS_TOP_MODULE).d +endif diff --git a/target/common/verilator.mk b/target/common/verilator.mk index eb02ee346..518a71de8 100644 --- a/target/common/verilator.mk +++ b/target/common/verilator.mk @@ -2,16 +2,29 @@ # Licensed under the Apache License, Version 2.0, see LICENSE for details. # SPDX-License-Identifier: Apache-2.0 -$(BIN_DIR)/$(TARGET).vlt: $(VLT_SOURCES) $(TB_CC_SOURCES) $(VLT_CC_SOURCES) $(VLT_BUILDDIR)/lib/libfesvr.a | $(BIN_DIR) +VLT_TOP_MODULE = testharness + +# Generate dependency file with RTL sources and headers using Verilator +$(VLT_BUILDDIR)/$(VLT_TOP_MODULE).d: $(BENDER_YML) $(BENDER_LOCK) $(GENERATED_RTL_SOURCES) | $(VLT_BUILDDIR) + $(VLT) $(shell $(BENDER) script verilator $(VLT_BENDER)) \ + --Mdir $(VLT_BUILDDIR) --MMD -E --top-module $(VLT_TOP_MODULE) > /dev/null + mv $(VLT_BUILDDIR)/V$(VLT_TOP_MODULE)__ver.d $@ + sed -i 's|^[^:]*:|$(BIN_DIR)/$(TARGET).vlt:|' $@ + +$(BIN_DIR)/$(TARGET).vlt: $(TB_CC_SOURCES) $(VLT_CC_SOURCES) $(VLT_BUILDDIR)/lib/libfesvr.a | $(BIN_DIR) $(VLT) $(shell $(BENDER) script verilator $(VLT_BENDER)) \ $(VLT_FLAGS) --Mdir $(VLT_BUILDDIR) \ -CFLAGS "$(VLT_CFLAGS)" \ -LDFLAGS "$(VLT_LDFLAGS)" \ -j $(VLT_JOBS) \ - -o ../$@ --cc --exe --build --top-module testharness $(TB_CC_SOURCES) $(VLT_CC_SOURCES) + -o ../$@ --cc --exe --build --top-module $(VLT_TOP_MODULE) $(TB_CC_SOURCES) $(VLT_CC_SOURCES) .PHONY: clean-vlt clean-vlt: clean-work rm -rf $(BIN_DIR)/$(TARGET).vlt $(VLT_BUILDDIR) clean: clean-vlt + +ifneq ($(filter-out clean%,$(MAKECMDGOALS)),) +-include $(VLT_BUILDDIR)/$(VLT_TOP_MODULE).d +endif diff --git a/target/common/vsim.mk b/target/common/vsim.mk index 38019240b..d5d05495d 100644 --- a/target/common/vsim.mk +++ b/target/common/vsim.mk @@ -2,34 +2,47 @@ # Licensed under the Apache License, Version 2.0, see LICENSE for details. # SPDX-License-Identifier: Apache-2.0 +VSIM_TOP_MODULE = tb_bin + $(VSIM_BUILDDIR): mkdir -p $@ -$(VSIM_BUILDDIR)/compile.vsim.tcl: $(BENDER_LOCK) | $(VSIM_BUILDDIR) +$(VSIM_BUILDDIR)/compile.vsim.tcl: $(BENDER_YML) $(BENDER_LOCK) | $(VSIM_BUILDDIR) $(VLIB) $(dir $@) $(BENDER) script vsim $(VSIM_BENDER) --vlog-arg="$(VLOG_FLAGS) -work $(dir $@) " > $@ echo '$(VLOG) -work $(dir $@) $(TB_CC_SOURCES) $(RTL_CC_SOURCES) -vv -ccflags "$(TB_CC_FLAGS)"' >> $@ echo 'return 0' >> $@ -# Build compilation script and compile all sources for Questasim simulation -$(BIN_DIR)/$(TARGET).vsim: $(VSIM_BUILDDIR)/compile.vsim.tcl $(VSIM_SOURCES) $(TB_SRCS) $(TB_CC_SOURCES) $(RTL_CC_SOURCES) work/lib/libfesvr.a | $(BIN_DIR) +# Intermediate file required to avoid "Argument list too long" errors in Occamy +# when invoking Verilator +$(VSIM_BUILDDIR)/$(TARGET).f: $(BENDER_YML) $(BENDER_LOCK) | $(VSIM_BUILDDIR) + $(BENDER) script verilator $(VSIM_BENDER) > $@ + +# Generate dependency file with RTL sources and headers using Verilator +$(VSIM_BUILDDIR)/$(VSIM_TOP_MODULE).d: $(VSIM_BUILDDIR)/$(TARGET).f $(GENERATED_RTL_SOURCES) | $(VSIM_BUILDDIR) + $(VLT) -f $< --Mdir $(VSIM_BUILDDIR) --MMD -E --top-module $(VSIM_TOP_MODULE) > /dev/null + mv $(VSIM_BUILDDIR)/V$(VSIM_TOP_MODULE)__ver.d $@ + sed -i 's|^[^:]*:|$(BIN_DIR)/$(TARGET).vsim:|' $@ + +# Run compilation script and create Questasim simulation binary +$(BIN_DIR)/$(TARGET).vsim: $(VSIM_BUILDDIR)/compile.vsim.tcl $(TB_CC_SOURCES) $(RTL_CC_SOURCES) work/lib/libfesvr.a | $(BIN_DIR) $(VSIM) -c -do "source $<; quit" | tee $(dir $<)vlog.log @! grep -P "Errors: [1-9]*," $(dir $<)vlog.log - $(VOPT) $(VOPT_FLAGS) -work $(VSIM_BUILDDIR) tb_bin -o tb_bin_opt | tee $(dir $<)vopt.log + $(VOPT) $(VOPT_FLAGS) -work $(VSIM_BUILDDIR) $(VSIM_TOP_MODULE) -o $(VSIM_TOP_MODULE)_opt | tee $(dir $<)vopt.log @! grep -P "Errors: [1-9]*," $(dir $<)vopt.log @echo "#!/bin/bash" > $@ @echo 'binary=$$(realpath $$1)' >> $@ @echo 'echo $$binary > .rtlbinary' >> $@ @echo '$(VSIM) +permissive $(VSIM_FLAGS) $$3 -work $(MKFILE_DIR)/$(VSIM_BUILDDIR) -c \ -ldflags "-Wl,-rpath,$(FESVR)/lib -L$(FESVR)/lib -lfesvr -lutil" \ - tb_bin_opt +permissive-off ++$$binary ++$$2' >> $@ + $(VSIM_TOP_MODULE)_opt +permissive-off ++$$binary ++$$2' >> $@ @chmod +x $@ @echo "#!/bin/bash" > $@.gui @echo 'binary=$$(realpath $$1)' >> $@.gui @echo 'echo $$binary > .rtlbinary' >> $@.gui @echo '$(VSIM) +permissive $(VSIM_FLAGS) -work $(MKFILE_DIR)/$(VSIM_BUILDDIR) \ -ldflags "-Wl,-rpath,$(FESVR)/lib -L$(FESVR)/lib -lfesvr -lutil" \ - tb_bin_opt +permissive-off ++$$binary ++$$2' >> $@.gui + $(VSIM_TOP_MODULE)_opt +permissive-off ++$$binary ++$$2' >> $@.gui @chmod +x $@.gui # Clean all build directories and temporary files for Questasim simulation @@ -38,3 +51,7 @@ clean-vsim: clean-work rm -rf $(BIN_DIR)/$(TARGET).vsim $(BIN_DIR)/$(TARGET).vsim.gui $(VSIM_BUILDDIR) vsim.wlf clean: clean-vsim + +ifneq ($(filter-out clean%,$(MAKECMDGOALS)),) +-include $(VSIM_BUILDDIR)/$(VSIM_TOP_MODULE).d +endif diff --git a/target/snitch_cluster/Makefile b/target/snitch_cluster/Makefile index 1a5ab2388..dea529fb4 100644 --- a/target/snitch_cluster/Makefile +++ b/target/snitch_cluster/Makefile @@ -66,7 +66,7 @@ $(BIN_DIR): # Simulator options # ##################### -COMMON_BENDER_FLAGS += -t snitch_cluster +COMMON_BENDER_FLAGS += -t snitch_cluster_wrapper QUESTA_64BIT = -64 VLOG_64BIT = -64 @@ -202,18 +202,7 @@ include $(ROOT)/target/common/vsim.mk # VCS # ####### -.PHONY: clean-vcs - -# Clean all build directories and temporary files for VCS simulation -clean-vcs: clean-work - rm -rf $(BIN_DIR)/$(TARGET).vcs $(VCS_BUILDDIR) vc_hdrs.h - -# Build compilation script and compile all sources for VCS simulation -$(BIN_DIR)/$(TARGET).vcs: ${VCS_SOURCES} ${TB_SRCS} $(TB_CC_SOURCES) $(RTL_CC_SOURCES) $(VCS_BUILDDIR)/compile.sh work/lib/libfesvr.a - mkdir -p $(BIN_DIR) - $(VCS) -Mlib=$(VCS_BUILDDIR) -Mdir=$(VCS_BUILDDIR) -o $(BIN_DIR)/$(TARGET).vcs -cc $(CC) -cpp $(CXX) \ - -assert disable_cover -override_timescale=1ns/1ps -full64 tb_bin $(TB_CC_SOURCES) $(RTL_CC_SOURCES) \ - -CFLAGS "$(TB_CC_FLAGS)" -LDFLAGS "-L${FESVR}/lib" -lfesvr +include $(ROOT)/target/common/vcs.mk ######## # Util # diff --git a/target/snitch_cluster/sw.mk b/target/snitch_cluster/sw.mk index 6083a8ee1..d56649770 100644 --- a/target/snitch_cluster/sw.mk +++ b/target/snitch_cluster/sw.mk @@ -22,22 +22,22 @@ CLUSTER_GEN_HEADERS = snitch_cluster_cfg.h \ REGGEN_HEADERS = snitch_cluster_peripheral.h -TARGET_C_HDRS_DIR = $(ROOT)/target/snitch_cluster/sw/runtime/common -TARGET_C_HDRS = $(addprefix $(TARGET_C_HDRS_DIR)/,$(CLUSTER_GEN_HEADERS) $(REGGEN_HEADERS)) +SNRT_HAL_HDRS_DIR = $(ROOT)/target/snitch_cluster/sw/runtime/common +SNRT_HAL_HDRS = $(addprefix $(SNRT_HAL_HDRS_DIR)/,$(CLUSTER_GEN_HEADERS) $(REGGEN_HEADERS)) -# CLUSTERGEN headers, -$(addprefix $(TARGET_C_HDRS_DIR)/,$(CLUSTER_GEN_HEADERS)): %.h: $(CFG) $(CLUSTER_GEN_PREREQ) %.h.tpl +# CLUSTERGEN headers +$(addprefix $(SNRT_HAL_HDRS_DIR)/,$(CLUSTER_GEN_HEADERS)): %.h: $(CFG) $(CLUSTER_GEN_PREREQ) %.h.tpl @echo "[CLUSTERGEN] Generate $@" - $(CLUSTER_GEN) -c $< --outdir $(TARGET_C_HDRS_DIR) --template $@.tpl + $(CLUSTER_GEN) -c $< --outdir $(SNRT_HAL_HDRS_DIR) --template $@.tpl # REGGEN headers -$(TARGET_C_HDRS_DIR)/snitch_cluster_peripheral.h: $(ROOT)/hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg.hjson $(REGGEN) +$(SNRT_HAL_HDRS_DIR)/snitch_cluster_peripheral.h: $(ROOT)/hw/snitch_cluster/src/snitch_cluster_peripheral/snitch_cluster_peripheral_reg.hjson $(REGGEN) $(call reggen_generate_header,$@,$<) .PHONY: clean-headers clean-sw: clean-headers clean-headers: - rm -f $(TARGET_C_HDRS) + rm -f $(SNRT_HAL_HDRS) ################## # Subdirectories # diff --git a/target/snitch_cluster/sw/apps/common.mk b/target/snitch_cluster/sw/apps/common.mk index 1877d6ad5..77dfb1196 100644 --- a/target/snitch_cluster/sw/apps/common.mk +++ b/target/snitch_cluster/sw/apps/common.mk @@ -8,10 +8,10 @@ # Build variables # ################### -$(APP)_HEADERS += $(TARGET_C_HDRS) +$(APP)_HEADERS += $(SNRT_HAL_HDRS) $(APP)_INCDIRS += $(SNRT_INCDIRS) -$(APP)_INCDIRS += $(ROOT)/sw/deps/riscv-opcodes +$(APP)_INCDIRS += $(SNITCH_ROOT)/sw/deps/riscv-opcodes $(APP)_RISCV_CFLAGS += $(RISCV_CFLAGS) $(APP)_RISCV_CFLAGS += $(addprefix -I,$($(APP)_INCDIRS)) @@ -19,17 +19,22 @@ ifeq ($(SELECT_RUNTIME), banshee) $(APP)_RISCV_CFLAGS += -DBIST endif -$(APP)_LIBS += $(SNRT_TARGET_DIR)/build/libsnRuntime.a +$(APP)_LIBS += $(SNRT_LIB) $(APP)_LIBDIRS = $(dir $($(APP)_LIBS)) $(APP)_LIBNAMES = $(patsubst lib%,%,$(notdir $(basename $($(APP)_LIBS)))) +BASE_LD = $(SNRT_DIR)/base.ld +MEMORY_LD ?= $(SNITCH_ROOT)/target/snitch_cluster/sw/runtime/memory.ld + $(APP)_RISCV_LDFLAGS += $(RISCV_LDFLAGS) -$(APP)_RISCV_LDFLAGS += -L$(abspath $(SNRT_TARGET_DIR)/..) -$(APP)_RISCV_LDFLAGS += -T$(abspath $(SNRT_DIR)/base.ld) +$(APP)_RISCV_LDFLAGS += -L$(dir $(MEMORY_LD)) +$(APP)_RISCV_LDFLAGS += -T$(BASE_LD) $(APP)_RISCV_LDFLAGS += $(addprefix -L,$($(APP)_LIBDIRS)) $(APP)_RISCV_LDFLAGS += $(addprefix -l,$($(APP)_LIBNAMES)) +LD_DEPS += $(MEMORY_LD) $(BASE_LD) $($(APP)_LIBS) + ########### # Outputs # ########### @@ -37,8 +42,11 @@ $(APP)_RISCV_LDFLAGS += $(addprefix -l,$($(APP)_LIBNAMES)) ELF := $(abspath $(addprefix $($(APP)_BUILD_DIR)/,$(addsuffix .elf,$(APP)))) DEP := $(abspath $(addprefix $($(APP)_BUILD_DIR)/,$(addsuffix .d,$(APP)))) DUMP := $(abspath $(addprefix $($(APP)_BUILD_DIR)/,$(addsuffix .dump,$(APP)))) -DWARF := $(abspath $(addprefix $($(APP)_BUILD_DIR)/,$(addsuffix .dwarf,$(APP)))) -ALL_OUTPUTS := $(ELF) $(DEP) $(DUMP) $(DWARF) +ALL_OUTPUTS := $(ELF) + +ifeq ($(DEBUG), ON) +ALL_OUTPUTS += $(DUMP) +endif ######### # Rules # @@ -69,17 +77,12 @@ $(ELF): RISCV_LDFLAGS := $($(APP)_RISCV_LDFLAGS) $(DEP): $(SRCS) | $($(APP)_BUILD_DIR) $($(APP)_HEADERS) $(RISCV_CC) $(RISCV_CFLAGS) -MM -MT '$(ELF)' $< > $@ -$(ELF): $(SRCS) $(DEP) $($(APP)_LIBS) | $($(APP)_BUILD_DIR) +$(ELF): $(SRCS) $(DEP) $(LD_DEPS) | $($(APP)_BUILD_DIR) $(RISCV_CC) $(RISCV_CFLAGS) $(RISCV_LDFLAGS) $(SRCS) -o $@ $(DUMP): $(ELF) | $($(APP)_BUILD_DIR) $(RISCV_OBJDUMP) $(RISCV_OBJDUMP_FLAGS) $< > $@ -$(DWARF): $(ELF) | $($(APP)_BUILD_DIR) - $(RISCV_DWARFDUMP) $< > $@ - -ifneq ($(MAKECMDGOALS),clean) -ifneq ($(MAKECMDGOALS),clean-sw) +ifneq ($(filter-out clean%,$(MAKECMDGOALS)),) -include $(DEP) endif -endif diff --git a/target/snitch_cluster/sw/runtime/banshee/src/snitch_cluster_start.S b/target/snitch_cluster/sw/runtime/banshee/src/snrt.S similarity index 100% rename from target/snitch_cluster/sw/runtime/banshee/src/snitch_cluster_start.S rename to target/snitch_cluster/sw/runtime/banshee/src/snrt.S diff --git a/target/snitch_cluster/sw/runtime/rtl/src/snitch_cluster_start.S b/target/snitch_cluster/sw/runtime/rtl/src/snrt.S similarity index 100% rename from target/snitch_cluster/sw/runtime/rtl/src/snitch_cluster_start.S rename to target/snitch_cluster/sw/runtime/rtl/src/snrt.S diff --git a/target/snitch_cluster/sw/runtime/runtime.mk b/target/snitch_cluster/sw/runtime/runtime.mk index 8f15ebab1..f5dbab97b 100644 --- a/target/snitch_cluster/sw/runtime/runtime.mk +++ b/target/snitch_cluster/sw/runtime/runtime.mk @@ -8,17 +8,17 @@ # Directories # ############### -SNRT_DIR = $(ROOT)/sw/snRuntime -SNRT_TARGET_DIR = $(ROOT)/target/snitch_cluster/sw/runtime/$(SELECT_RUNTIME) -SNRT_BUILDDIR = $(SNRT_TARGET_DIR)/build -SNRT_SRCDIR = $(SNRT_TARGET_DIR)/src +SNRT_DIR = $(SNITCH_ROOT)/sw/snRuntime +SNRT_TARGET_DIR ?= $(SNITCH_ROOT)/target/snitch_cluster/sw/runtime/$(SELECT_RUNTIME) +SNRT_BUILDDIR = $(SNRT_TARGET_DIR)/build +SNRT_SRCDIR = $(SNRT_TARGET_DIR)/src ################### # Build variables # ################### -SNRT_SRCS = snitch_cluster_start.S -SNRT_SRCS += snrt.c +SNRT_S_SRCS = snrt.S +SNRT_C_SRCS = snrt.c SNRT_INCDIRS += $(SNRT_DIR)/src SNRT_INCDIRS += $(SNRT_DIR)/api @@ -26,7 +26,7 @@ SNRT_INCDIRS += $(SNRT_DIR)/src/omp SNRT_INCDIRS += $(SNRT_DIR)/api/omp SNRT_INCDIRS += $(SNRT_DIR)/vendor/riscv-opcodes SNRT_INCDIRS += $(SNRT_SRCDIR) -SNRT_INCDIRS += $(SNRT_TARGET_DIR)/../common +SNRT_INCDIRS += $(SNRT_HAL_HDRS_DIR) SNRT_RISCV_CFLAGS += $(RISCV_CFLAGS) SNRT_RISCV_CFLAGS += $(addprefix -I,$(SNRT_INCDIRS)) @@ -35,11 +35,16 @@ SNRT_RISCV_CFLAGS += $(addprefix -I,$(SNRT_INCDIRS)) # Outputs # ########### -SNRT_OBJS = $(addprefix $(SNRT_BUILDDIR)/,$(addsuffix .o,$(basename $(notdir $(SNRT_SRCS))))) -SNRT_DEPS = $(addprefix $(SNRT_BUILDDIR)/,$(addsuffix .d,$(basename $(notdir $(SNRT_SRCS))))) +SNRT_OBJS = $(addprefix $(SNRT_BUILDDIR)/,$(addsuffix .o,$(notdir $(SNRT_S_SRCS) $(SNRT_C_SRCS)))) +SNRT_DEPS = $(addprefix $(SNRT_BUILDDIR)/,$(addsuffix .d,$(notdir $(SNRT_S_SRCS) $(SNRT_C_SRCS)))) SNRT_LIB = $(SNRT_BUILDDIR)/libsnRuntime.a SNRT_DUMP = $(SNRT_BUILDDIR)/libsnRuntime.dump -SNRT_OUTPUTS = $(SNRT_LIB) $(SNRT_DUMP) +SNRT_OUTPUTS = $(SNRT_LIB) + +ifeq ($(DEBUG), ON) +SNRT_OUTPUTS += $(SNRT_DUMP) +endif + ######### # Rules # @@ -58,13 +63,10 @@ clean-runtime: $(SNRT_BUILDDIR): mkdir -p $@ -$(SNRT_BUILDDIR)/%.o: $(SNRT_SRCDIR)/%.S | $(SNRT_BUILDDIR) +$(SNRT_BUILDDIR)/%.o: $(SNRT_SRCDIR)/% $(SNRT_BUILDDIR)/%.d | $(SNRT_BUILDDIR) $(RISCV_CC) $(SNRT_RISCV_CFLAGS) -c $< -o $@ -$(SNRT_BUILDDIR)/%.o: $(SNRT_SRCDIR)/%.c | $(SNRT_BUILDDIR) - $(RISCV_CC) $(SNRT_RISCV_CFLAGS) -c $< -o $@ - -$(SNRT_BUILDDIR)/%.d: $(SNRT_SRCDIR)/%.c | $(SNRT_BUILDDIR) +$(SNRT_BUILDDIR)/%.d: $(SNRT_SRCDIR)/% | $(SNRT_BUILDDIR) $(RISCV_CC) $(SNRT_RISCV_CFLAGS) -MM -MT '$(@:.d=.o)' $< > $@ $(SNRT_LIB): $(SNRT_OBJS) | $(SNRT_BUILDDIR) @@ -73,10 +75,8 @@ $(SNRT_LIB): $(SNRT_OBJS) | $(SNRT_BUILDDIR) $(SNRT_DUMP): $(SNRT_LIB) | $(SNRT_BUILDDIR) $(RISCV_OBJDUMP) $(RISCV_OBJDUMP_FLAGS) $< > $@ -$(SNRT_DEPS): | $(TARGET_C_HDRS) +$(SNRT_DEPS): | $(SNRT_HAL_HDRS) -ifneq ($(MAKECMDGOALS),clean) -ifneq ($(MAKECMDGOALS),clean-sw) +ifneq ($(filter-out clean%,$(MAKECMDGOALS)),) -include $(SNRT_DEPS) endif -endif diff --git a/target/snitch_cluster/sw/tests/tests.mk b/target/snitch_cluster/sw/tests/tests.mk index 35afa66ea..e6cfeb49c 100644 --- a/target/snitch_cluster/sw/tests/tests.mk +++ b/target/snitch_cluster/sw/tests/tests.mk @@ -18,12 +18,17 @@ TESTS_BUILDDIR = $(ROOT)/target/snitch_cluster/sw/tests/build TESTS_RISCV_CFLAGS += $(RISCV_CFLAGS) TESTS_RISCV_CFLAGS += $(addprefix -I,$(SNRT_INCDIRS)) +BASE_LD = $(SNRT_DIR)/base.ld +MEMORY_LD ?= $(ROOT)/target/snitch_cluster/sw/runtime/memory.ld + TESTS_RISCV_LDFLAGS += $(RISCV_LDFLAGS) -TESTS_RISCV_LDFLAGS += -L$(abspath $(SNRT_TARGET_DIR)/..) -TESTS_RISCV_LDFLAGS += -T$(abspath $(SNRT_DIR)/base.ld) -TESTS_RISCV_LDFLAGS += -L$(SNRT_TARGET_DIR)/build +TESTS_RISCV_LDFLAGS += -L$(dir $(MEMORY_LD)) +TESTS_RISCV_LDFLAGS += -T$(BASE_LD) +TESTS_RISCV_LDFLAGS += -L$(SNRT_BUILDDIR) TESTS_RISCV_LDFLAGS += -lsnRuntime +LD_DEPS = $(MEMORY_LD) $(BASE_LD) $(SNRT_LIB) + ########### # Outputs # ########### @@ -32,11 +37,10 @@ TEST_NAMES = $(basename $(notdir $(wildcard $(TESTS_SRCDIR)/*.c))) TEST_ELFS = $(abspath $(addprefix $(TESTS_BUILDDIR)/,$(addsuffix .elf,$(TEST_NAMES)))) TEST_DEPS = $(abspath $(addprefix $(TESTS_BUILDDIR)/,$(addsuffix .d,$(TEST_NAMES)))) TEST_DUMPS = $(abspath $(addprefix $(TESTS_BUILDDIR)/,$(addsuffix .dump,$(TEST_NAMES)))) -TEST_DWARFS = $(abspath $(addprefix $(TESTS_BUILDDIR)/,$(addsuffix .dwarf,$(TEST_NAMES)))) TEST_OUTPUTS = $(TEST_ELFS) -ifeq ($(DEBUG), ON) -TEST_OUTPUTS += $(DUMPS) $(DWARFS) +ifeq ($(DEBUG),ON) +TEST_OUTPUTS += $(TEST_DUMPS) endif ######### @@ -59,19 +63,14 @@ $(TESTS_BUILDDIR): $(TESTS_BUILDDIR)/%.d: $(TESTS_SRCDIR)/%.c | $(TESTS_BUILDDIR) $(RISCV_CC) $(TESTS_RISCV_CFLAGS) -MM -MT '$(TESTS_BUILDDIR)/$*.elf' $< > $@ -$(TESTS_BUILDDIR)/%.elf: $(TESTS_SRCDIR)/%.c $(SNRT_LIB) $(TESTS_BUILDDIR)/%.d | $(TESTS_BUILDDIR) +$(TESTS_BUILDDIR)/%.elf: $(TESTS_SRCDIR)/%.c $(LD_DEPS) $(TESTS_BUILDDIR)/%.d | $(TESTS_BUILDDIR) $(RISCV_CC) $(TESTS_RISCV_CFLAGS) $(TESTS_RISCV_LDFLAGS) $(TESTS_SRCDIR)/$*.c -o $@ $(TESTS_BUILDDIR)/%.dump: $(TESTS_BUILDDIR)/%.elf | $(TESTS_BUILDDIR) $(RISCV_OBJDUMP) $(RISCV_OBJDUMP_FLAGS) $< > $@ -$(TESTS_BUILDDIR)/%.dwarf: $(TESTS_BUILDDIR)/%.elf | $(TESTS_BUILDDIR) - $(RISCV_DWARFDUMP) $< > $@ +$(TEST_DEPS): | $(SNRT_HAL_HDRS) -$(TEST_DEPS): | $(TARGET_C_HDRS) - -ifneq ($(MAKECMDGOALS),clean) -ifneq ($(MAKECMDGOALS),clean-sw) --include $(TEST_DEPS) -endif +ifneq ($(filter-out clean%,$(MAKECMDGOALS)),) +-include $(DEP) endif diff --git a/target/snitch_cluster/sw/toolchain.mk b/target/snitch_cluster/sw/toolchain.mk index 9cadb8c44..366d23d5d 100644 --- a/target/snitch_cluster/sw/toolchain.mk +++ b/target/snitch_cluster/sw/toolchain.mk @@ -23,7 +23,6 @@ RISCV_LD ?= $(LLVM_BINROOT)/ld.lld RISCV_AR ?= $(LLVM_BINROOT)/llvm-ar RISCV_OBJCOPY ?= $(LLVM_BINROOT)/llvm-objcopy RISCV_OBJDUMP ?= $(LLVM_BINROOT)/llvm-objdump -RISCV_DWARFDUMP ?= $(LLVM_BINROOT)/llvm-dwarfdump # Compiler flags RISCV_CFLAGS := -mcpu=snitch diff --git a/util/sim/Simulation.py b/util/sim/Simulation.py index 5dd98ee35..def9124ac 100644 --- a/util/sim/Simulation.py +++ b/util/sim/Simulation.py @@ -36,7 +36,8 @@ def __init__(self, elf=None, dry_run=False, retcode=0, run_dir=None, name=None): self.dry_run = dry_run self.run_dir = run_dir if run_dir is not None else Path.cwd() if name is None: - self.testname = Path(self.elf).stem + if self.elf is not None: + self.testname = Path(self.elf).stem else: self.testname = name self.cmd = [] diff --git a/util/sim/Simulator.py b/util/sim/Simulator.py index a5d7e1909..4d5cd2883 100644 --- a/util/sim/Simulator.py +++ b/util/sim/Simulator.py @@ -4,7 +4,7 @@ # # Luca Colagrande -from Simulation import QuestaSimulation, VCSSimulation, VerilatorSimulation, BansheeSimulation +from snitch.util.sim import Simulation class Simulator(object): @@ -111,7 +111,7 @@ def __init__(self, binary): Arguments: binary: The VCS simulation binary. """ - super().__init__(binary, name='vcs', simulation_cls=VCSSimulation) + super().__init__(binary, name='vcs', simulation_cls=Simulation.VCSSimulation) class QuestaSimulator(RTLSimulator): @@ -128,7 +128,7 @@ def __init__(self, binary): Arguments: binary: The QuestaSim simulation binary. """ - super().__init__(binary, name='vsim', simulation_cls=QuestaSimulation) + super().__init__(binary, name='vsim', simulation_cls=Simulation.QuestaSimulation) class VerilatorSimulator(RTLSimulator): @@ -145,7 +145,7 @@ def __init__(self, binary): Arguments: binary: The Verilator simulation binary. """ - super().__init__(binary, name='verilator', simulation_cls=VerilatorSimulation) + super().__init__(binary, name='verilator', simulation_cls=Simulation.VerilatorSimulation) class BansheeSimulator(Simulator): @@ -161,7 +161,7 @@ def __init__(self, cfg): Arguments: cfg: A Banshee config file. """ - super().__init__(name='banshee', simulation_cls=BansheeSimulation) + super().__init__(name='banshee', simulation_cls=Simulation.BansheeSimulation) self.cfg = cfg def supports(self, test): diff --git a/util/trace/gen_trace.py b/util/trace/gen_trace.py index 9583a1758..0c1f4a898 100755 --- a/util/trace/gen_trace.py +++ b/util/trace/gen_trace.py @@ -585,8 +585,17 @@ def eval_dma_metrics(dma_trans, dma_trace): bursts_in_transfer = 0 rec_bursts = 0 # Iterate lines in DMA trace - for line in f.readlines(): - dma = ast.literal_eval(line) + for lineno, (line, nextl) in enumerate(current_and_next(f.readlines())): + try: + dma = ast.literal_eval(line) + except SyntaxError: + message = 'Exception occured while processing ' + if not nextl: + message += 'last line. Did the simulation terminate?' + else: + message += f'line {lineno}.' + print(traceback.format_exc(), file=sys.stderr) + print(message, file=sys.stderr) time = dma['meta']['time'] # When the first burst in a transfer is granted, we record a new transfer in # the outstanding transfers queue, with the information obtained from the core