Zero width bitfield field

[Timmmm]

Is it possible to have a zero-width field in a bitfield? The motivation is a register that exists in RV32 and RV64. It has two reserved fields in RV64 but only one in RV32. I would like to define each one once so that the RV32 version still has two reserved fields but one is zero-width. Then I can deal with it generically (to save/restore the bit values), its just that its type will be bits(0).

I guess this isn't possible due to the use of right-closed intervals.

[Alasdair]

There isn't a good way right now, but as you noted it's more of a syntactic issue.

I have thought about whether to add an open interval notation like x ..< y, along the lines of rust's .. and ..= split just flipped around. Alternatively we could steal systemverilog's part select notation +: and -:.

[Timmmm]

Yeah that sounds like a good idea. I think Swift uses ..< for right-open (but then ... for right-closed; so close!)

Just kind of awkward that the bounds are backwards. Would you do 5>..3? Not very nice IMO.

Using a width based syntax would be nice - often the fields have a type field_width : Int = ... anyway so you can reuse that. I kind of hate the SV syntax for that though. It's terse and rare, which is the worst type of syntax. What about a keyword?

bitfield Foo : bits(8) = {
   reserved_1 : width=0 .. 7,
   hi : width=4 .. 4,
   lo : width=4 .. 0,
}

Hmm dunno if I like that either tbh.

[Alasdair]

Yes, I suppose you would have >.. and ..< for decreasing and increasing indexing respectively. It is a bit ugly, which I think is part of the reason I haven't added it already.

I'm not wild about the SV part indexing notation either, but I think it's probably better to follow prior-art that people might be familiar with if at all possible.

[Timmmm]

This is tracked in #471