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PLIC on SAIL model #34

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13 tasks
ptprasanna opened this issue Apr 25, 2023 · 19 comments
Open
13 tasks

PLIC on SAIL model #34

ptprasanna opened this issue Apr 25, 2023 · 19 comments
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@ptprasanna
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ptprasanna commented Apr 25, 2023

Technical Group

PLIC

ratification-pkg

PLIC

Technical Liaison

Prasanna

Task Category

SAIL

Task Sub Category

  • gcc
  • binutils
  • gdb
  • intrinsics
  • Java
  • KVM
  • ld
  • llvm
  • Linux kernel
  • QEMU
  • Spike

Ratification Target

2022

Statement of Work (SOW)

Component names:

Requirements:
Developing PLIC extension of Riscv Specification, on Sail model using sail programming language. By implementing memory mapped registers on sail for handling the externally generated interrupts (platform generated interrupts).

Deliverables:

  • Component_1 and changes expected.
  • Component_2 and changes expected.
    ...

Acceptance Criteria:

  • Component_1 and measured result.
  • Component_2 and measured result.
    ...

Projected timeframe: (best guess date)

SOW Signoffs:

  • Task group liaison sign-off
  • Development partner sign-off
  • Golden Model SIG sign-off

Waiver

  • Freeze
  • Ratification

Pull Request Details

No response

@ptprasanna ptprasanna self-assigned this Apr 25, 2023
@ptprasanna ptprasanna changed the title Implenting PLIC on SAIL model PLIC on SAIL model Apr 25, 2023
@jjscheel
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Hi, @ptprasanna, I've added the SOW template to your first comment and moved your text into the requirements section. Let's edit it there as-needed.

Thanks!

@jrtc27
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jrtc27 commented Apr 26, 2023

What's the point of having a PLIC without any devices attached to it that can generate interrupts?

@jjscheel
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Today's DevPartners meeting suggested that this work is on-going to create a PLIC infrastructure in SAIL and it will include a basic framework for testing interrupts.

The open question for the DevPartner's meeting is to determine how much to track here so as not to duplicate work. At this time, I view this item as FYI for us.

@ptprasanna
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PLIC : Algorithm has been completed and coding in progress. Hoping to get this done by this week and will send the code to Bill for review.

Testing : Sail(PLIC) will be listening on a certain port. And an external software will send the interrupt messages to PLIC on that port. We'll use system call for this.

@jjscheel
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@ptprasanna, do we have a target date by which all work is anticipated to be done, including PR acceptance?

@jrtc27
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jrtc27 commented Jun 13, 2023

NB: Bill doesn't review the code, the community does

@jjscheel
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@jrtc27, indeed. I suspect that because the person is new, they're actually "pre-reviewing" the code with Bill. Everyone understands that the community will review the code, comment, and ultimately accept the PR.

@jrtc27
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jrtc27 commented Jun 13, 2023

@jrtc27, indeed. I suspect that because the person is new, they're actually "pre-reviewing" the code with Bill. Everyone understands that the community will review the code, comment, and ultimately accept the PR.

Ack

@ptprasanna
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@ptprasanna, do we have a target date by which all work is anticipated to be done, including PR acceptance?

Planning to submit the ongoing work for peer review by this week.

@jjscheel
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@billmcspadden-riscv, if you could provide and outlook on when a review of the code might be expected, that would help @ptprasanna. Thanks!!!

@jjscheel
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@billmcspadden-riscv promises feedback this week. Thanks, Bill!!!

@jjscheel
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@ptprasanna, please see the email to your gmail account on Bill's needs.

@jjscheel
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@ptprasanna, I would like an update in the issue, by the next meeting on December 12, 2023, please.

@jjscheel
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@anuani21, can you see if there's any status here. @billmcspadden-riscv, is this the issue stalled behind the test framework work?

@anuani21
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anuani21 commented Jan 30, 2024 via email

@jjscheel
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jjscheel commented Feb 1, 2024

Thanks, @anuani21. Please post when you have information.

@jjscheel
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Per @anuani21, the developer working on this has been pulled away with other activities. Anusha can we please get an outlook for when they might be back?

Additionally, it would be helpful to add the developer as an assignee to the issue. Are they in Groups.IO as a RISC-V member? If not, we should get them there too so as to receive the mailing list information for the group.

@anuani21
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anuani21 commented Feb 23, 2024 via email

@jjscheel
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jjscheel commented Aug 6, 2024

@ptprasanna, @anuani21, would you kindly provide status for the August 20 meeting on this item. Thanks!

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