From 9b88c001d9c963cc51078ce1d933c0ee570f3684 Mon Sep 17 00:00:00 2001 From: Tariq Kurd Date: Mon, 10 Jun 2024 17:22:11 +0200 Subject: [PATCH] correctly split cmv from cadd not from caddi --- arg_lut.csv | 1 + constants.py | 2 +- unratified/rv64_cheri | 11 ++++++----- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arg_lut.csv b/arg_lut.csv index b1436503..a118c6c6 100644 --- a/arg_lut.csv +++ b/arg_lut.csv @@ -2,6 +2,7 @@ "rt", 19, 15 "rs1", 19, 15 "rs2", 24, 20 +"rs2_n0", 24, 20 "rs3", 31, 27 "aqrl", 26, 25 "aq", 26, 26 diff --git a/constants.py b/constants.py index 5f78577d..50d3b836 100644 --- a/constants.py +++ b/constants.py @@ -14,7 +14,7 @@ 'c_mv': {'c_jr'}, 'c_jalr': {'c_ebreak'}, 'c_add': {'c_ebreak', 'c_jalr'}, - 'caddi': {'cmv'} + 'cadd': {'cmv'} } isa_regex = \ diff --git a/unratified/rv64_cheri b/unratified/rv64_cheri index c96138f5..44c118e9 100644 --- a/unratified/rv64_cheri +++ b/unratified/rv64_cheri @@ -1,14 +1,15 @@ -lc rd rs1 imm12 14..12=4 6..2=0x03 1..0=3 -sc imm12hi rs1 rs2 imm12lo 14..12=4 6..2=0x08 1..0=3 +lc rd rs1 imm12 14..12=4 6..2=0x03 1..0=3 +sc imm12hi rs1 rs2 imm12lo 14..12=4 6..2=0x08 1..0=3 #next to ADDIW -caddi rd_n0 rs1 imm12 14..12=2 6..2=0x06 1..0=3 -cmv 11..7=0x0 rs1 imm12 14..12=2 6..2=0x06 1..0=3 +caddi rd rs1 imm12 14..12=2 6..2=0x06 1..0=3 + #5-bit immediate and 25 says whether to shift it scbndsi rd rs1 imm5 31..26=1 14..12=5 6..2=0x04 1..0=3 #if rs2=x0 decode as cmove -cadd rd rs1 rs2 31..25=6 14..12=0 6..2=0x0C 1..0=3 +cadd rd rs1 rs2_n0 31..25=6 14..12=0 6..2=0x0C 1..0=3 +cmv rd rs1 24..20=0x0 31..25=6 14..12=0 6..2=0x0C 1..0=3 scaddr rd rs1 rs2 31..25=6 14..12=1 6..2=0x0C 1..0=3 acperm rd rs1 rs2 31..25=6 14..12=2 6..2=0x0C 1..0=3 schi rd rs1 rs2 31..25=6 14..12=3 6..2=0x0C 1..0=3