fixed code structure, formatting,duplications etc

riscv · Jun 30, 2022 · 009f758 · 009f758
1 parent 273df1d
commit 009f758
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Showing 5 changed files with 162 additions and 171 deletions.
diff --git a/model/riscv_csr_map.sail b/model/riscv_csr_map.sail
@@ -136,10 +136,6 @@ mapping clause csr_name_map = 0x3A0 <-> "pmpcfg0"
 mapping clause csr_name_map = 0x3A1 <-> "pmpcfg1"
 mapping clause csr_name_map = 0x3A2 <-> "pmpcfg2"
 mapping clause csr_name_map = 0x3A3 <-> "pmpcfg3"
-mapping clause csr_name_map = 0x3A0 <-> "pmpcfg0"
-mapping clause csr_name_map = 0x3A1 <-> "pmpcfg1"
-mapping clause csr_name_map = 0x3A2 <-> "pmpcfg2"
-mapping clause csr_name_map = 0x3A3 <-> "pmpcfg3"
 mapping clause csr_name_map = 0x3A4 <-> "pmpcfg4"
 mapping clause csr_name_map = 0x3A5 <-> "pmpcfg5"
 mapping clause csr_name_map = 0x3A6 <-> "pmpcfg6"
@@ -216,7 +212,6 @@ mapping clause csr_name_map = 0x3EC <-> "pmpaddr60"
 mapping clause csr_name_map = 0x3ED <-> "pmpaddr61"
 mapping clause csr_name_map = 0x3EE <-> "pmpaddr62"
 mapping clause csr_name_map = 0x3EF <-> "pmpaddr63"
-
 /* machine counters/timers */
 mapping clause csr_name_map = 0xB00 <-> "mcycle"
 mapping clause csr_name_map = 0xB02 <-> "minstret"

diff --git a/model/riscv_insts_zicsr.sail b/model/riscv_insts_zicsr.sail
@@ -253,23 +253,22 @@ function writeCSR (csr : csreg, value : xlenbits) -> unit = {
  (0x344, _) => { mip = legalize_mip(mip, value); Some(mip.bits()) },
 
  // Note: Some(value) returned below is not the legalized value due to locked entries
- (0x3A0, _) => { pmpWriteCfgReg(0, value); Some(pmpReadCfgReg(0)) }, // pmpcfg0
- (0x3A1, 32) => { pmpWriteCfgReg(1, value); Some(pmpReadCfgReg(1)) }, // pmpcfg1
- (0x3A2, _) => { pmpWriteCfgReg(2, value); Some(pmpReadCfgReg(2)) }, // pmpcfg2
- (0x3A3, 32) => { pmpWriteCfgReg(3, value); Some(pmpReadCfgReg(3)) }, // pmpcfg3
- (0x3A4, _) => { pmpWriteCfgReg(4, value); Some(pmpReadCfgReg(4)) }, // pmpcfg4,
- (0x3A5, 32) => { pmpWriteCfgReg(5, value); Some(pmpReadCfgReg(5)) }, // pmpcfg5,
- (0x3A6, _) => { pmpWriteCfgReg(6, value); Some(pmpReadCfgReg(6)) }, // pmpcfg6,
- (0x3A7, 32) => { pmpWriteCfgReg(7, value); Some(pmpReadCfgReg(7)) }, // pmpcfg7,
- (0x3A8, _) => { pmpWriteCfgReg(8, value); Some(pmpReadCfgReg(8)) }, // pmpcfg8,
- (0x3A9, 32) => { pmpWriteCfgReg(9, value); Some(pmpReadCfgReg(9)) }, // pmpcfg9,
- (0x3AA, _) => { pmpWriteCfgReg(10, value); Some(pmpReadCfgReg(10))}, // pmpcfg10,
- (0x3AB, 32) => { pmpWriteCfgReg(11, value); Some(pmpReadCfgReg(11))}, // pmpcfg11,
- (0x3AC, _) => { pmpWriteCfgReg(12, value); Some(pmpReadCfgReg(12))}, // pmpcfg12,
- (0x3AD, 32) => { pmpWriteCfgReg(13, value); Some(pmpReadCfgReg(13))}, // pmpcfg13,
- (0x3AE, _) => { pmpWriteCfgReg(14, value); Some(pmpReadCfgReg(14))}, // pmpcfg14,
- (0x3AF, 32) => { pmpWriteCfgReg(15, value); Some(pmpReadCfgReg(15))}, // pmpcfg15,
-
+ (0x3A0, _) => { pmpWriteCfgReg(0, value); Some(pmpReadCfgReg(0)) }, // pmpcfg0
+ (0x3A1, 32) => { pmpWriteCfgReg(1, value); Some(pmpReadCfgReg(1)) }, // pmpcfg1
+ (0x3A2, _) => { pmpWriteCfgReg(2, value); Some(pmpReadCfgReg(2)) }, // pmpcfg2
+ (0x3A3, 32) => { pmpWriteCfgReg(3, value); Some(pmpReadCfgReg(3)) }, // pmpcfg3
+ (0x3A4, _) => { pmpWriteCfgReg(4, value); Some(pmpReadCfgReg(4)) }, // pmpcfg4
+ (0x3A5, 32) => { pmpWriteCfgReg(5, value); Some(pmpReadCfgReg(5)) }, // pmpcfg5
+ (0x3A6, _) => { pmpWriteCfgReg(6, value); Some(pmpReadCfgReg(6)) }, // pmpcfg6
+ (0x3A7, 32) => { pmpWriteCfgReg(7, value); Some(pmpReadCfgReg(7)) }, // pmpcfg7
+ (0x3A8, _) => { pmpWriteCfgReg(8, value); Some(pmpReadCfgReg(8)) }, // pmpcfg8
+ (0x3A9, 32) => { pmpWriteCfgReg(9, value); Some(pmpReadCfgReg(9)) }, // pmpcfg9
+ (0x3AA, _) => { pmpWriteCfgReg(10, value); Some(pmpReadCfgReg(10)) }, // pmpcfg10
+ (0x3AB, 32) => { pmpWriteCfgReg(11, value); Some(pmpReadCfgReg(11)) }, // pmpcfg11
+ (0x3AC, _) => { pmpWriteCfgReg(12, value); Some(pmpReadCfgReg(12)) }, // pmpcfg12
+ (0x3AD, 32) => { pmpWriteCfgReg(13, value); Some(pmpReadCfgReg(13)) }, // pmpcfg13
+ (0x3AE, _) => { pmpWriteCfgReg(14, value); Some(pmpReadCfgReg(14)) }, // pmpcfg14
+ (0x3AF, 32) => { pmpWriteCfgReg(15, value); Some(pmpReadCfgReg(15)) }, // pmpcfg15
 
  (0x3B0, _) => { pmpaddr0 = pmpWriteAddr(pmpLocked(pmp0cfg), pmpTORLocked(pmp1cfg), pmpaddr0, value); Some(pmpaddr0) },
  (0x3B1, _) => { pmpaddr1 = pmpWriteAddr(pmpLocked(pmp1cfg), pmpTORLocked(pmp2cfg), pmpaddr1, value); Some(pmpaddr1) },