diff --git a/model/riscv_sys_control.sail b/model/riscv_sys_control.sail
index 3830725d1..232796d54 100644
--- a/model/riscv_sys_control.sail
+++ b/model/riscv_sys_control.sail
@@ -557,6 +557,7 @@ function init_sys() -> unit = {
 
   misa->MXL() = arch_to_bits(if sizeof(xlen) == 32 then RV32 else RV64);
   misa->A()   = 0b1;                             /* atomics */
+  misa->B()   = 0b1;                             /* Bit-manipulation */
   misa->C()   = bool_to_bits(sys_enable_rvc());  /* RVC */
   misa->I()   = 0b1;                             /* base integer ISA */
   misa->M()   = 0b1;                             /* integer multiply/divide */
diff --git a/model/riscv_sys_regs.sail b/model/riscv_sys_regs.sail
index 84f708e2f..4af215c0c 100644
--- a/model/riscv_sys_regs.sail
+++ b/model/riscv_sys_regs.sail
@@ -179,6 +179,7 @@ function legalize_misa(m : Misa, v : xlenbits) -> Misa = {
 /* helpers to check support for various extensions. */
 /* we currently don't model 'E', so always assume 'I'. */
 function haveAtomics() -> bool = misa.A() == 0b1
+function haveBExt()    -> bool = misa.B() == 0b1
 function haveRVC()     -> bool = misa.C() == 0b1
 function haveMulDiv()  -> bool = misa.M() == 0b1
 function haveSupMode() -> bool = misa.S() == 0b1