Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Vector extension code corrections #276

Merged
merged 2 commits into from
Jul 11, 2023
Merged

Vector extension code corrections #276

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
dc1d027
update vector CSR vtype.vill setting and judgement
XinlaiWan Jun 18, 2023
25d39ce
Summarize patterns of vector illegal instruction check
XinlaiWan Jun 27, 2023
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
176 changes: 95 additions & 81 deletions model/riscv_insts_vext_arith.sail
View file
Open in desktop

Large diffs are not rendered by default.

74 changes: 37 additions & 37 deletions model/riscv_insts_vext_fp.sail
View file
Open in desktop

Large diffs are not rendered by default.

76 changes: 26 additions & 50 deletions model/riscv_insts_vext_mask.sail
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -63,6 +63,8 @@ function clause execute(MMTYPE(funct6, vs2, vs1, vd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = int_power(2, get_vlen_pow());

if illegal_vd_unmasked() then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

Expand Down Expand Up @@ -120,17 +122,16 @@ function clause execute(VCPOP_M(vm, vs2, rd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = int_power(2, get_vlen_pow());

if illegal_vd_unmasked() | not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, vreg_name("v0"));
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vs2_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vs2);
result : vector('n, dec, bool) = undefined;
mask : vector('n, dec, bool) = undefined;

/* Value of vstart must be 0 */
if not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

(result, mask) = init_masked_result_cmp(num_elem, SEW, 0, vs2_val, vm_val);

count : nat = 0;
Expand All @@ -157,17 +158,16 @@ function clause execute(VFIRST_M(vm, vs2, rd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = int_power(2, get_vlen_pow());

if illegal_vd_unmasked() | not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, vreg_name("v0"));
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vs2_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vs2);
result : vector('n, dec, bool) = undefined;
mask : vector('n, dec, bool) = undefined;

/* Value of vstart must be 0 */
if not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

(result, mask) = init_masked_result_cmp(num_elem, SEW, 0, vs2_val, vm_val);

index : int = -1;
Expand Down Expand Up @@ -196,24 +196,18 @@ function clause execute(VMSBF_M(vm, vs2, vd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = int_power(2, get_vlen_pow());

if illegal_normal(vd, vm) | not(assert_vstart(0)) | vd == vs2
then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, vreg_name("v0"));
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vs2_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vs2);
let vd_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vd);
result : vector('n, dec, bool) = undefined;
mask : vector('n, dec, bool) = undefined;

/* Value of vstart must be 0 */
if not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

/* If masking is enabled, then dest reg cannot be v0 */
if not(valid_rd_mask(vd, vm)) then { handle_illegal(); return RETIRE_FAIL };

/* Dest reg cannot be the same as source reg */
if vd == vs2 then { handle_illegal(); return RETIRE_FAIL };

(result, mask) = init_masked_result_cmp(num_elem, SEW, 0, vd_val, vm_val);

found_elem : bool = false;
Expand Down Expand Up @@ -243,24 +237,18 @@ function clause execute(VMSIF_M(vm, vs2, vd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = int_power(2, get_vlen_pow());

if illegal_normal(vd, vm) | not(assert_vstart(0)) | vd == vs2
then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, vreg_name("v0"));
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vs2_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vs2);
let vd_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vd);
result : vector('n, dec, bool) = undefined;
mask : vector('n, dec, bool) = undefined;

/* Value of vstart must be 0 */
if not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

/* If masking is enabled, then dest reg cannot be v0 */
if not(valid_rd_mask(vd, vm)) then { handle_illegal(); return RETIRE_FAIL };

/* Dest reg cannot be the same as source reg */
if vd == vs2 then { handle_illegal(); return RETIRE_FAIL };

(result, mask) = init_masked_result_cmp(num_elem, SEW, 0, vd_val, vm_val);

found_elem : bool = false;
Expand Down Expand Up @@ -290,24 +278,18 @@ function clause execute(VMSOF_M(vm, vs2, vd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = int_power(2, get_vlen_pow());

if illegal_normal(vd, vm) | not(assert_vstart(0)) | vd == vs2
then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, vreg_name("v0"));
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vs2_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vs2);
let vd_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vd);
result : vector('n, dec, bool) = undefined;
mask : vector('n, dec, bool) = undefined;

/* Value of vstart must be 0 */
if not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

/* If masking is enabled, then dest reg cannot be v0 */
if not(valid_rd_mask(vd, vm)) then { handle_illegal(); return RETIRE_FAIL };

/* Dest reg cannot be the same as source reg */
if vd == vs2 then { handle_illegal(); return RETIRE_FAIL };

(result, mask) = init_masked_result_cmp(num_elem, SEW, 0, vd_val, vm_val);

found_elem : bool = false;
Expand Down Expand Up @@ -341,24 +323,18 @@ function clause execute(VIOTA_M(vm, vs2, vd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = get_num_elem(LMUL_pow, SEW);

if illegal_normal(vd, vm) | not(assert_vstart(0)) | vd == vs2
then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, vreg_name("v0"));
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vs2_val : vector('n, dec, bool) = read_vmask(num_elem, 0b0, vs2);
let vd_val : vector('n, dec, bits('m)) = read_vreg(num_elem, SEW, LMUL_pow, vd);
result : vector('n, dec, bits('m)) = undefined;
mask : vector('n, dec, bool) = undefined;

/* Value of vstart must be 0 */
if not(assert_vstart(0)) then { handle_illegal(); return RETIRE_FAIL };

/* If masking is enabled, then dest reg cannot be v0 */
if not(valid_rd_mask(vd, vm)) then { handle_illegal(); return RETIRE_FAIL };

/* Dest reg cannot be the same as source reg */
if vd == vs2 then { handle_illegal(); return RETIRE_FAIL };

(result, mask) = init_masked_result(num_elem, SEW, LMUL_pow, vd_val, vm_val);

sum : int = 0;
Expand Down Expand Up @@ -388,12 +364,12 @@ function clause execute(VID_V(vm, vd)) = {
let LMUL_pow = get_lmul_pow();
let num_elem = get_num_elem(LMUL_pow, SEW);

if not(valid_rd_mask(vd, vm)) then { handle_illegal(); return RETIRE_FAIL };
if illegal_normal(vd, vm) then { handle_illegal(); return RETIRE_FAIL };

let 'n = num_elem;
let 'm = SEW;

let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, vreg_name("v0"));
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vd_val : vector('n, dec, bits('m)) = read_vreg(num_elem, SEW, LMUL_pow, vd);
result : vector('n, dec, bits('m)) = undefined;
mask : vector('n, dec, bool) = undefined;
Expand Down
Loading
Loading