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Simplify prelude.sail by including generic_equality.sail and mapping.sail #318

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Feb 1, 2024
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Simplify prelude.sail by including generic_equality.sail and mapping.sail #318

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2 changes: 1 addition & 1 deletion Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -82,7 +82,7 @@ SAIL_VM_SRCS += $(SAIL_RV64_VM_SRCS)
endif

# Non-instruction sources
PRELUDE = prelude.sail prelude_mapping.sail $(SAIL_XLEN) $(SAIL_FLEN) $(SAIL_VLEN) prelude_mem_metadata.sail prelude_mem.sail
PRELUDE = prelude.sail $(SAIL_XLEN) $(SAIL_FLEN) $(SAIL_VLEN) prelude_mem_metadata.sail prelude_mem.sail

SAIL_REGS_SRCS = riscv_reg_type.sail riscv_freg_type.sail riscv_regs.sail riscv_pc_access.sail riscv_sys_regs.sail
SAIL_REGS_SRCS += riscv_pmp_regs.sail riscv_pmp_control.sail
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124 changes: 124 additions & 0 deletions model/hex_bits.sail
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@@ -0,0 +1,124 @@
// Note: This file is temporarily copied here from the Sail compiler. It can
// be removed when Sail 0.18 is released.

/*==========================================================================*/
/* Sail */
/* */
/* Sail and the Sail architecture models here, comprising all files and */
/* directories except the ASL-derived Sail code in the aarch64 directory, */
/* are subject to the BSD two-clause licence below. */
/* */
/* The ASL derived parts of the ARMv8.3 specification in */
/* aarch64/no_vector and aarch64/full are copyright ARM Ltd. */
/* */
/* Copyright (c) 2013-2021 */
/* Kathyrn Gray */
/* Shaked Flur */
/* Stephen Kell */
/* Gabriel Kerneis */
/* Robert Norton-Wright */
/* Christopher Pulte */
/* Peter Sewell */
/* Alasdair Armstrong */
/* Brian Campbell */
/* Thomas Bauereiss */
/* Anthony Fox */
/* Jon French */
/* Dominic Mulligan */
/* Stephen Kell */
/* Mark Wassell */
/* Alastair Reid (Arm Ltd) */
/* */
/* All rights reserved. */
/* */
/* This work was partially supported by EPSRC grant EP/K008528/1 <a */
/* href="http://www.cl.cam.ac.uk/users/pes20/rems">REMS: Rigorous */
/* Engineering for Mainstream Systems</a>, an ARM iCASE award, EPSRC IAA */
/* KTF funding, and donations from Arm. This project has received */
/* funding from the European Research Council (ERC) under the European */
/* Union’s Horizon 2020 research and innovation programme (grant */
/* agreement No 789108, ELVER). */
/* */
/* This software was developed by SRI International and the University of */
/* Cambridge Computer Laboratory (Department of Computer Science and */
/* Technology) under DARPA/AFRL contracts FA8650-18-C-7809 ("CIFV") */
/* and FA8750-10-C-0237 ("CTSRD"). */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* 1. Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* 2. Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in */
/* the documentation and/or other materials provided with the */
/* distribution. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */
/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A */
/* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF */
/* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND */
/* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, */
/* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF */
/* SUCH DAMAGE. */
/*==========================================================================*/

$ifndef _HEX_BITS
$define _HEX_BITS

$include <vector.sail>
$include <string.sail>

val "parse_hex_bits" : forall 'n, 'n > 0. (int('n), string) -> bits('n)
val "valid_hex_bits" : forall 'n, 'n > 0. (int('n), string) -> bool

val hex_bits : forall 'n, 'n > 0. bits('n) <-> (int('n), string)

function hex_bits_forwards(bv) = (length(bv), hex_str(unsigned(bv)))
function hex_bits_forwards_matches(bv) = true

function hex_bits_backwards(n, str) = parse_hex_bits(n, str)
function hex_bits_backwards_matches(n, str) = valid_hex_bits(n, str)

mapping hex_bits_1 : bits(1) <-> string = { hex_bits(1, s) <-> s }
mapping hex_bits_2 : bits(2) <-> string = { hex_bits(2, s) <-> s }
mapping hex_bits_3 : bits(3) <-> string = { hex_bits(3, s) <-> s }
mapping hex_bits_4 : bits(4) <-> string = { hex_bits(4, s) <-> s }
mapping hex_bits_5 : bits(5) <-> string = { hex_bits(5, s) <-> s }
mapping hex_bits_6 : bits(6) <-> string = { hex_bits(6, s) <-> s }
mapping hex_bits_7 : bits(7) <-> string = { hex_bits(7, s) <-> s }
mapping hex_bits_8 : bits(8) <-> string = { hex_bits(8, s) <-> s }
mapping hex_bits_9 : bits(9) <-> string = { hex_bits(9, s) <-> s }

mapping hex_bits_10 : bits(10) <-> string = { hex_bits(10, s) <-> s }
mapping hex_bits_11 : bits(11) <-> string = { hex_bits(11, s) <-> s }
mapping hex_bits_12 : bits(12) <-> string = { hex_bits(12, s) <-> s }
mapping hex_bits_13 : bits(13) <-> string = { hex_bits(13, s) <-> s }
mapping hex_bits_14 : bits(14) <-> string = { hex_bits(14, s) <-> s }
mapping hex_bits_15 : bits(15) <-> string = { hex_bits(15, s) <-> s }
mapping hex_bits_16 : bits(16) <-> string = { hex_bits(16, s) <-> s }
mapping hex_bits_17 : bits(17) <-> string = { hex_bits(17, s) <-> s }
mapping hex_bits_18 : bits(18) <-> string = { hex_bits(18, s) <-> s }
mapping hex_bits_19 : bits(19) <-> string = { hex_bits(19, s) <-> s }

mapping hex_bits_20 : bits(20) <-> string = { hex_bits(20, s) <-> s }
mapping hex_bits_21 : bits(21) <-> string = { hex_bits(21, s) <-> s }
mapping hex_bits_22 : bits(22) <-> string = { hex_bits(22, s) <-> s }
mapping hex_bits_23 : bits(23) <-> string = { hex_bits(23, s) <-> s }
mapping hex_bits_24 : bits(24) <-> string = { hex_bits(24, s) <-> s }
mapping hex_bits_25 : bits(25) <-> string = { hex_bits(25, s) <-> s }
mapping hex_bits_26 : bits(26) <-> string = { hex_bits(26, s) <-> s }
mapping hex_bits_27 : bits(27) <-> string = { hex_bits(27, s) <-> s }
mapping hex_bits_28 : bits(28) <-> string = { hex_bits(28, s) <-> s }
mapping hex_bits_29 : bits(29) <-> string = { hex_bits(29, s) <-> s }

mapping hex_bits_30 : bits(30) <-> string = { hex_bits(30, s) <-> s }
mapping hex_bits_31 : bits(31) <-> string = { hex_bits(31, s) <-> s }
mapping hex_bits_32 : bits(32) <-> string = { hex_bits(32, s) <-> s }

$endif _HEX_BITS
136 changes: 136 additions & 0 deletions model/mapping.sail
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Original file line number Diff line number Diff line change
@@ -0,0 +1,136 @@
// Note: This file is temporarily copied here from the Sail compiler. It can
// be removed when Sail 0.18 is released.

/*==========================================================================*/
/* Sail */
/* */
/* Sail and the Sail architecture models here, comprising all files and */
/* directories except the ASL-derived Sail code in the aarch64 directory, */
/* are subject to the BSD two-clause licence below. */
/* */
/* The ASL derived parts of the ARMv8.3 specification in */
/* aarch64/no_vector and aarch64/full are copyright ARM Ltd. */
/* */
/* Copyright (c) 2013-2021 */
/* Kathyrn Gray */
/* Shaked Flur */
/* Stephen Kell */
/* Gabriel Kerneis */
/* Robert Norton-Wright */
/* Christopher Pulte */
/* Peter Sewell */
/* Alasdair Armstrong */
/* Brian Campbell */
/* Thomas Bauereiss */
/* Anthony Fox */
/* Jon French */
/* Dominic Mulligan */
/* Stephen Kell */
/* Mark Wassell */
/* Alastair Reid (Arm Ltd) */
/* */
/* All rights reserved. */
/* */
/* This work was partially supported by EPSRC grant EP/K008528/1 <a */
/* href="http://www.cl.cam.ac.uk/users/pes20/rems">REMS: Rigorous */
/* Engineering for Mainstream Systems</a>, an ARM iCASE award, EPSRC IAA */
/* KTF funding, and donations from Arm. This project has received */
/* funding from the European Research Council (ERC) under the European */
/* Union’s Horizon 2020 research and innovation programme (grant */
/* agreement No 789108, ELVER). */
/* */
/* This software was developed by SRI International and the University of */
/* Cambridge Computer Laboratory (Department of Computer Science and */
/* Technology) under DARPA/AFRL contracts FA8650-18-C-7809 ("CIFV") */
/* and FA8750-10-C-0237 ("CTSRD"). */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* 1. Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* 2. Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in */
/* the documentation and/or other materials provided with the */
/* distribution. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED */
/* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A */
/* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */
/* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF */
/* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND */
/* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, */
/* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF */
/* SUCH DAMAGE. */
/*==========================================================================*/

$ifndef _MAPPING
$define _MAPPING

$include <arith.sail>
$include <option.sail>

val string_take = pure "string_take" : (string, nat) -> string
val string_drop = pure "string_drop" : (string, nat) -> string
val string_length = pure "string_length" : string -> nat
val string_append = pure {coq: "String.append", c: "concat_str", _: "string_append"} : (string, string) -> string
val string_startswith = pure "string_startswith" : (string, string) -> bool

val n_leading_spaces = pure { coq: "n_leading_spaces_Z" } : string -> nat
function n_leading_spaces s =
match s {
"" => 0,
_ => match string_take(s, 1) {
" " => 1 + n_leading_spaces(string_drop(s, 1)),
_ => 0
}
}

/*!
In a string mapping this is treated as `[ ]+`, i.e one or more space
characters. It is printed as a single space `" "`.
*/
val spc : unit <-> string

function spc_forwards() = " "
function spc_forwards_matches() = true

function spc_backwards _ = ()
function spc_backwards_matches s = {
let len = string_length(s);
n_leading_spaces(s) == len & len > 0
}

/*!
In a string mapping this is treated as `[ ]*`, i.e. zero or more space
characters. It is printed as the empty string.
*/
val opt_spc : unit <-> string

function opt_spc_forwards() = ""
function opt_spc_forwards_matches() = true

function opt_spc_backwards _ = ()
function opt_spc_backwards_matches s = n_leading_spaces(s) == string_length(s)

/*!
Like `opt_spc`, in a string mapping this is treated as `[ ]*`, i.e. zero or more space
characters. It differs however in that it is printed as a single space `" "`.
*/
val def_spc : unit <-> string

function def_spc_forwards() = " "
function def_spc_forwards_matches() = true

function def_spc_backwards _ = ()
function def_spc_backwards_matches s = n_leading_spaces(s) == string_length(s)

mapping sep : unit <-> string = {
() <-> opt_spc() ^ "," ^ def_spc()
}

$endif
91 changes: 6 additions & 85 deletions model/prelude.sail
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Original file line number Diff line number Diff line change
Expand Up @@ -74,53 +74,21 @@ $include <smt.sail>
$include <option.sail>
$include <arith.sail>
$include <string.sail>
$include "mapping.sail"
$include <vector_dec.sail>
$include <regfp.sail>
$include <generic_equality.sail>
$include "hex_bits.sail"

val string_startswith = "string_startswith" : (string, string) -> bool
val string_drop = "string_drop" : (string, nat) -> string
val string_take = "string_take" : (string, nat) -> string
val string_length = "string_length" : string -> nat
val string_append = {c: "concat_str", _: "string_append"} : (string, string) -> string

val eq_anything = {ocaml: "(fun (x, y) -> x = y)", interpreter: "eq_anything", lem: "eq", coq: "generic_eq", c: "eq_anything"} : forall ('a : Type). ('a, 'a) -> bool

overload operator == = {eq_string, eq_anything}

val "reg_deref" : forall ('a : Type). register('a) -> 'a
/* sneaky deref with no effect necessary for bitfield writes */
val _reg_deref = "reg_deref" : forall ('a : Type). register('a) -> 'a

val any_vector_update = {ocaml: "update", lem: "update_list_dec", coq: "vector_update"} : forall 'n ('a : Type).
(vector('n, dec, 'a), int, 'a) -> vector('n, dec, 'a)

overload vector_update = {any_vector_update}

val update_subrange = {ocaml: "update_subrange", interpreter: "update_subrange", lem: "update_subrange_vec_dec", coq: "update_subrange_vec_dec"} : forall 'n 'm 'o.
(bits('n), atom('m), atom('o), bits('m - ('o - 1))) -> bits('n)

val vector_concat = {ocaml: "append", lem: "append_list", coq: "vec_concat"} : forall ('n : Int) ('m : Int) ('a : Type).
(vector('n, dec, 'a), vector('m, dec, 'a)) -> vector('n + 'm, dec, 'a)

overload append = {vector_concat}

val not_bit : bit -> bit

function not_bit(b) = if b == bitone then bitzero else bitone

overload ~ = {not_bool, not_vec, not_bit}

val not = pure {coq: "negb", _: "not"} : forall ('p : Bool). bool('p) -> bool(not('p))

val neq_vec = {lem: "neq"} : forall 'n. (bits('n), bits('n)) -> bool

function neq_vec (x, y) = not_bool(eq_bits(x, y))

val neq_anything = {lem: "neq", coq: "generic_neq"} : forall ('a : Type). ('a, 'a) -> bool

function neq_anything (x, y) = not_bool(x == y)

overload operator != = {neq_vec, neq_anything}
// not_bool alias.
val not : forall ('p : Bool). bool('p) -> bool(not('p))
function not(b) = not_bool(b)

overload operator & = {and_vec}

Expand Down Expand Up @@ -284,53 +252,6 @@ function reverse_bits_in_byte (xs : bits(8)) -> bits(8) = {

overload reverse = {reverse_bits_in_byte}

/* helpers for mappings */

val spc : unit <-> string
val opt_spc : unit <-> string
val def_spc : unit <-> string

val "decimal_string_of_bits" : forall 'n. bits('n) -> string
val hex_bits : forall 'n . (atom('n), bits('n)) <-> string

val n_leading_spaces : string -> nat
function n_leading_spaces s =
match s {
"" => 0,
_ => match string_take(s, 1) {
" " => 1 + n_leading_spaces(string_drop(s, 1)),
_ => 0
}
}

val spc_forwards : unit -> string
function spc_forwards () = " "
val spc_backwards : string -> unit
function spc_backwards s = ()
val spc_matches_prefix : string -> option((unit, nat))
function spc_matches_prefix s = {
let n = n_leading_spaces(s);
match n {
0 => None(),
_ => Some((), n)
}
}

val opt_spc_forwards : unit -> string
function opt_spc_forwards () = ""
val opt_spc_backwards : string -> unit
function opt_spc_backwards s = ()
val opt_spc_matches_prefix : string -> option((unit, nat))
function opt_spc_matches_prefix s =
Some((), n_leading_spaces(s))

val def_spc_forwards : unit -> string
function def_spc_forwards () = " "
val def_spc_backwards : string -> unit
function def_spc_backwards s = ()
val def_spc_matches_prefix : string -> option((unit, nat))
function def_spc_matches_prefix s = opt_spc_matches_prefix(s)

overload operator / = {quot_round_zero}
overload operator * = {mult_atom, mult_int}

Expand Down
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