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Merge branch 'natevm-bitfield-instructions' into master
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natevm authored Dec 8, 2024
2 parents 0d5636c + b5e3ca5 commit 7b220e3
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Showing 14 changed files with 706 additions and 175 deletions.
13 changes: 13 additions & 0 deletions source/slang/core.meta.slang
Original file line number Diff line number Diff line change
Expand Up @@ -2716,6 +2716,19 @@ T reinterpret(U value);

/// Use an otherwise unused value
/// This can be used to silence the warning about returning before initializing an out paramter.
// Bitfield extract / insert
__generic<T>
[__readNone]
[__unsafeForceInlineEarly]
__intrinsic_op($(kIROp_BitfieldInsert))
T bitfieldInsert(T base, T insert, int offset, int bits);

__generic<T>
[__readNone]
[__unsafeForceInlineEarly]
__intrinsic_op($(kIROp_BitfieldExtract))
T bitfieldExtract(T value, int offset, int bits);

__generic<T>
[__readNone]
[ForceInline]
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162 changes: 0 additions & 162 deletions source/slang/glsl.meta.slang
Original file line number Diff line number Diff line change
Expand Up @@ -1150,168 +1150,6 @@ public void imulExtended(highp vector<int,N> x, highp vector<int,N> y, out highp
}
}

[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public int bitfieldExtract(int value, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldExtract";
case spirv: return spirv_asm {
result:$$int = OpBitFieldSExtract $value $offset $bits
};
default:
return int(uint(value >> offset) & ((1u << bits) - 1));
}
}

__generic<let N:int>
[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public vector<int,N> bitfieldExtract(vector<int,N> value, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldExtract";
case spirv: return spirv_asm {
result:$$vector<int,N> = OpBitFieldSExtract $value $offset $bits
};
default:
vector<int,N> result;
[ForceUnroll]
for (int i = 0; i < N; ++i)
{
result[i] = bitfieldExtract(value[i], offset, bits);
}
return result;
}
}

[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public uint bitfieldExtract(uint value, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldExtract";
case spirv: return spirv_asm {
result:$$uint = OpBitFieldUExtract $value $offset $bits
};
default:
return (value >> offset) & ((1u << bits) - 1);
}
}

__generic<let N:int>
[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public vector<uint,N> bitfieldExtract(vector<uint,N> value, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldExtract";
case spirv: return spirv_asm {
result:$$vector<uint,N> = OpBitFieldUExtract $value $offset $bits
};
default:
vector<uint,N> result;
[ForceUnroll]
for (int i = 0; i < N; ++i)
{
result[i] = bitfieldExtract(value[i], offset, bits);
}
return result;
}
}

[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public uint bitfieldInsert(uint base, uint insert, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldInsert";
case spirv: return spirv_asm {
result:$$uint = OpBitFieldInsert $base $insert $offset $bits
};
default:
uint clearMask = ~(((1u << bits) - 1u) << offset);
uint clearedBase = base & clearMask;
uint maskedInsert = (insert & ((1u << bits) - 1u)) << offset;
return clearedBase | maskedInsert;
}
}

__generic<let N:int>
[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public vector<uint,N> bitfieldInsert(vector<uint,N> base, vector<uint,N> insert, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldInsert";
case spirv: return spirv_asm {
result:$$vector<uint,N> = OpBitFieldInsert $base $insert $offset $bits
};
default:
vector<uint,N> result;
[ForceUnroll]
for (int i = 0; i < N; ++i)
{
result[i] = bitfieldInsert(base[i], insert[i], offset, bits);
}
return result;
}
}

[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public int bitfieldInsert(int base, int insert, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldInsert";
case spirv: return spirv_asm {
result:$$int = OpBitFieldInsert $base $insert $offset $bits
};
default:
uint clearMask = ~(((1u << bits) - 1u) << offset);
uint clearedBase = base & clearMask;
uint maskedInsert = (insert & ((1u << bits) - 1u)) << offset;
return clearedBase | maskedInsert;
}
}

__generic<let N:int>
[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
public vector<int,N> bitfieldInsert(vector<int,N> base, vector<int,N> insert, int offset, int bits)
{
__target_switch
{
case glsl: __intrinsic_asm "bitfieldInsert";
case spirv: return spirv_asm {
result:$$vector<int,N> = OpBitFieldInsert $base $insert $offset $bits
};
default:
vector<int,N> result;
[ForceUnroll]
for (int i = 0; i < N; ++i)
{
result[i] = bitfieldInsert(base[i], insert[i], offset, bits);
}
return result;
}
}

[__readNone]
[ForceInline]
[require(cpp_cuda_glsl_hlsl_spirv, GLSL_400)]
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