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In fact, in order to tune the DDR settings, you need to flash the U-Boot SPL binaries according to the "basic" boot chain. This also does not work with the generated device trees, while it does work with the Odyssey upstream device trees (as can be patched in with the meta-st-odyssey layer). With your device trees, I simply get no output on the Debug UART (uart4).
Therefore I believe that a lot more is probably broken or incomplete in the IOC than only the DDR config.
Booting a Seeed Studio Odyssey board with device trees generated from your IOC file results in the following error:
Did you encounter the same error? I think, you may have forgot to tune the DDR settings. See STM32CubeMX for STM32 configuration and initialization C code generation (p.192ff).
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