From e0c7349780d952c3f0700f1c27abcf573e28348c Mon Sep 17 00:00:00 2001 From: David Harder Date: Fri, 4 Nov 2022 17:39:29 +0100 Subject: [PATCH] Update verilator to 5.002 Summary: **Summarized Changelog** - Require C++20 for the new `--timing` features. Upgrading to a C++20 or newer compiler is strongly recommended. - Support the Active and NBA scheduling regions as defined by the SystemVerilog standard (IEEE 1800-2017 chapter 4). This means all generated clocks are now simulated correctly. - Support timing controls (delays, event controls in any location, wait statements) and forks. This may require adding `--timing` or `--no-timing`. See docs for details. - Introduce a new combinational logic optimizer (DFG), that can yield significant performance improvements on some designs. - Add `--binary` option as alias of `--main` `--exe` `--build` `--timing`. - For designs where C++ was only used to make a simple no-I/O testbench, we recommend abandoning that C++, and instead letting Verilator build it with `--binary` (`or --main`). Full changelog [here](https://github.com/verilator/verilator-announce/issues/57) Test Plan: - Run example c++ execution Reviewers: #triage_team, algent Reviewed By: #triage_team, algent Subscribers: algent Differential Revision: https://dev.getsol.us/D13716 --- package.yml | 6 +++--- pspec_x86_64.xml | 12 ++++++++---- 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/package.yml b/package.yml index 685a70d..46f5e2e 100644 --- a/package.yml +++ b/package.yml @@ -1,8 +1,8 @@ name : verilator -version : '4.228' -release : 32 +version : '5.002' +release : 33 source : - - https://github.com/verilator/verilator/archive/refs/tags/v4.228.tar.gz : be6af6572757013802be5b0ff9c64cbf509e98066737866abaae692fe04edf09 + - https://github.com/verilator/verilator/archive/refs/tags/v5.002.tar.gz : 72d68469fc1262e6288d099062b960a2f65e9425bdb546cba141a2507decd951 license : - LGPL-3.0-only - Artistic-2.0 diff --git a/pspec_x86_64.xml b/pspec_x86_64.xml index 930a395..05d764a 100644 --- a/pspec_x86_64.xml +++ b/pspec_x86_64.xml @@ -42,6 +42,8 @@ /usr/share/verilator/examples/cmake_tracing_c/Makefile /usr/share/verilator/examples/cmake_tracing_sc/CMakeLists.txt /usr/share/verilator/examples/cmake_tracing_sc/Makefile + /usr/share/verilator/examples/make_hello_binary/Makefile + /usr/share/verilator/examples/make_hello_binary/top.v /usr/share/verilator/examples/make_hello_c/Makefile /usr/share/verilator/examples/make_hello_c/sim_main.cpp /usr/share/verilator/examples/make_hello_c/top.v @@ -106,6 +108,8 @@ /usr/share/verilator/include/verilated_syms.h /usr/share/verilator/include/verilated_threads.cpp /usr/share/verilator/include/verilated_threads.h + /usr/share/verilator/include/verilated_timing.cpp + /usr/share/verilator/include/verilated_timing.h /usr/share/verilator/include/verilated_trace.h /usr/share/verilator/include/verilated_trace_defs.h /usr/share/verilator/include/verilated_trace_imp.h @@ -130,16 +134,16 @@ programming.devel - verilator + verilator /usr/share/pkgconfig/verilator.pc - - 2022-10-01 - 4.228 + + 2022-11-04 + 5.002 Packaging update David Harder david@davidjharder.ca