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[STM32L41x_L42x]: Read option bytes is getting into error unexpectedly #1405

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ankurraji opened this issue Jun 21, 2024 · 0 comments · Fixed by #1413
Closed
6 tasks done

[STM32L41x_L42x]: Read option bytes is getting into error unexpectedly #1405

ankurraji opened this issue Jun 21, 2024 · 0 comments · Fixed by #1413

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@ankurraji
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ankurraji commented Jun 21, 2024

Hello,

  • I made serious effort to avoid creating duplicate or nearly similar issue
    This issue is similar/completely identical to the issue (STM32F103C8T6-option-bytes) but it affects a different family of MCUs.
  • Programmer/board type: [STLINK V3]
  • Operating system an version: [Linux Raspberry Pi]
  • stlink tools version and/or git commit hash: [v1.8]
  • stlink commandline tool name: [st-flash]
  • Target chip (and board, if applicable): [STM32L41x_L42x]

st-flash read option bytes

st-flash --reset --area=option read
st-flash 1.8.0
2024-06-21T09:27:35 INFO common.c: STM32L41x_L42x: 40 KiB SRAM, 64 KiB flash in at least 2 KiB pages.
2024-06-21T09:27:35 ERROR option_bytes.c: Option bytes read is currently not supported for connected chip
could not read option bytes (-1)

debug information

st-flash --debug --reset --area=option read
st-flash 1.8.0
2024-06-21T09:24:06 DEBUG common.c: *** looking up stlink version ***
2024-06-21T09:24:06 DEBUG common.c: st vid         = 0x0483 (expect 0x0483)
2024-06-21T09:24:06 DEBUG common.c: stlink pid     = 0x374f
2024-06-21T09:24:06 DEBUG common.c: stlink version = 0x3
2024-06-21T09:24:06 DEBUG common.c: jtag version   = 0x9
2024-06-21T09:24:06 DEBUG common.c: swim version   = 0x1
2024-06-21T09:24:06 DEBUG common.c: stlink current mode: mass
2024-06-21T09:24:06 DEBUG usb.c: JTAG/SWD freq set to 0
2024-06-21T09:24:06 DEBUG common.c: stlink current mode: mass
2024-06-21T09:24:06 DEBUG common.c: *** stlink_enter_swd_mode ***
2024-06-21T09:24:06 DEBUG common.c: Loading device parameters....
2024-06-21T09:24:06 DEBUG common.c: *** stlink_core_id ***
2024-06-21T09:24:06 DEBUG common.c: core_id = 0x2ba01477
2024-06-21T09:24:06 DEBUG read_write.c: *** stlink_read_debug32  0x410fc241 at 0xe000ed00
2024-06-21T09:24:06 DEBUG read_write.c: *** stlink_read_debug32  0x10006464 at 0xe0042000
2024-06-21T09:24:06 DEBUG chipid.c: detected chip_id parameters

2024-06-21T09:24:06 DEBUG chipid.c: # Device Type: STM32L41x_L42x
2024-06-21T09:24:06 DEBUG chipid.c: # Reference Manual: RM0394
2024-06-21T09:24:06 DEBUG chipid.c: #
2024-06-21T09:24:06 DEBUG chipid.c: chip_id 0x464
2024-06-21T09:24:06 DEBUG chipid.c: flash_type 10
2024-06-21T09:24:06 DEBUG chipid.c: flash_size_reg 0x1fff75e0
2024-06-21T09:24:06 DEBUG chipid.c: flash_pagesize 0x800
2024-06-21T09:24:06 DEBUG chipid.c: sram_size 0xa000
2024-06-21T09:24:06 DEBUG chipid.c: bootrom_base 0x1fff0000
2024-06-21T09:24:06 DEBUG chipid.c: bootrom_size 0x7000
2024-06-21T09:24:06 DEBUG chipid.c: option_base 0x0
2024-06-21T09:24:06 DEBUG chipid.c: option_size 0x0
2024-06-21T09:24:06 DEBUG chipid.c: flags 2

2024-06-21T09:24:06 DEBUG chipid.c: otp_base 0

2024-06-21T09:24:06 DEBUG chipid.c: otp_size 0

2024-06-21T09:24:06 DEBUG read_write.c: *** stlink_read_debug32  0xffff0040 at 0x1fff75e0
2024-06-21T09:24:06 INFO common.c: STM32L41x_L42x: 40 KiB SRAM, 64 KiB flash in at least 2 KiB pages.
2024-06-21T09:24:06 DEBUG common.c: *** stlink_force_debug_mode ***
2024-06-21T09:24:06 DEBUG read_write.c: *** stlink_read_debug32  0x00001800 at 0xe0042008
2024-06-21T09:24:06 DEBUG read_write.c: *** stlink_write_debug32 0x00001800 to 0xe0042008
2024-06-21T09:24:06 DEBUG common.c: *** stlink_status ***
2024-06-21T09:24:06 DEBUG usb.c: core status: 01030003
2024-06-21T09:24:06 DEBUG common.c:   core status: halted
2024-06-21T09:24:06 DEBUG flash.c: @@@@ Read 0 (0) option bytes from          0
2024-06-21T09:24:06 ERROR option_bytes.c: Option bytes read is currently not supported for connected chip
could not read option bytes (-1)
2024-06-21T09:24:06 DEBUG common.c: *** stlink_exit_debug_mode ***
2024-06-21T09:24:06 DEBUG read_write.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2024-06-21T09:24:06 DEBUG common.c: *** stlink_close ***

st-info works works for the MCU

st-info --probe --connect-under-reset
Found 1 stlink programmers
  version:    V3J9S1
  serial:     0020002B4D46501120373033
  flash:      65536 (pagesize: 2048)
  sram:       40960
  chipid:     0x464
  dev-type:   STM32L41x_L42x

Expected/description:
According to the list of supported boards STM32L4 should be supported (list-supported-mcus) for the st-flash tool, however the option bytes read as well as write operation is not working with the tool.

The stlink toolchain was installed following the compile-guide

Thank you for the help ❤️

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