From f237cecd2d39760083a778d605fc36262b36b9db Mon Sep 17 00:00:00 2001 From: Kuan-Wei Chiu Date: Fri, 17 Nov 2023 02:25:54 +0800 Subject: [PATCH 1/2] Replace type 'float32_t' with 'riscv_float_t' Replace the usage of the softfloat type 'float32_t' with the custom 'riscv_float_t' type defined within rv32emu. This modification ensures better integration and consistency within the rv32emu codebase. --- src/rv32_template.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/rv32_template.c b/src/rv32_template.c index c61c1a32..f69ea96d 100644 --- a/src/rv32_template.c +++ b/src/rv32_template.c @@ -627,7 +627,7 @@ RVOP(fmadds, { /* FMSUB.S */ RVOP(fmsubs, { set_rounding_mode(rv); - float32_t tmp = rv->F[ir->rs3]; + riscv_float_t tmp = rv->F[ir->rs3]; tmp.v ^= FMASK_SIGN; rv->F[ir->rd] = f32_mulAdd(rv->F[ir->rs1], rv->F[ir->rs2], tmp); set_fflag(rv); @@ -636,7 +636,7 @@ RVOP(fmsubs, { /* FNMSUB.S */ RVOP(fnmsubs, { set_rounding_mode(rv); - float32_t tmp = rv->F[ir->rs1]; + riscv_float_t tmp = rv->F[ir->rs1]; tmp.v ^= FMASK_SIGN; rv->F[ir->rd] = f32_mulAdd(tmp, rv->F[ir->rs2], rv->F[ir->rs3]); set_fflag(rv); @@ -645,8 +645,8 @@ RVOP(fnmsubs, { /* FNMADD.S */ RVOP(fnmadds, { set_rounding_mode(rv); - float32_t tmp1 = rv->F[ir->rs1]; - float32_t tmp2 = rv->F[ir->rs3]; + riscv_float_t tmp1 = rv->F[ir->rs1]; + riscv_float_t tmp2 = rv->F[ir->rs3]; tmp1.v ^= FMASK_SIGN; tmp2.v ^= FMASK_SIGN; rv->F[ir->rd] = f32_mulAdd(tmp1, rv->F[ir->rs2], tmp2); From 129aca275f5036b3cd4fda3a3cfdcac525c9de10 Mon Sep 17 00:00:00 2001 From: Kuan-Wei Chiu Date: Fri, 17 Nov 2023 02:28:11 +0800 Subject: [PATCH 2/2] Fix softfloat integration build failure on macOS/Arm64 Addressed compilation errors on macOS/Arm64 arising from conflicts between SoftFloat and SDL headers. The solution involves explicitly defining the conflicting types in SoftFloat to avoid clashes. --- src/riscv.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/riscv.h b/src/riscv.h index 70dcb57e..1d5e45a3 100644 --- a/src/riscv.h +++ b/src/riscv.h @@ -7,7 +7,15 @@ #include #include #if RV32_HAS(EXT_F) +#define float16_t softfloat_float16_t +#define bfloat16_t softfloat_bfloat16_t +#define float32_t softfloat_float32_t +#define float64_t softfloat_float64_t #include "softfloat/softfloat.h" +#undef float16_t +#undef bfloat16_t +#undef float32_t +#undef float64_t #endif #ifdef __cplusplus @@ -93,7 +101,7 @@ typedef uint16_t riscv_half_t; typedef uint8_t riscv_byte_t; typedef uint32_t riscv_exception_t; #if RV32_HAS(EXT_F) -typedef float32_t riscv_float_t; +typedef softfloat_float32_t riscv_float_t; #endif /* memory read handlers */