app: board: Change the soc from ace30_ptl to ace30

Renamed soc from ace30_ptl to ace30. We were previously using the wrong soc name. The correct name is ace30. There is only one ptl platform, but there can be several ace30 platforms. Signed-off-by: Grzegorz Bernat <grzegorzx.bernat@intel.com>
thesofproject · Sep 26, 2024 · 3304e6f · 3304e6f
1 parent f2efd4a
commit 3304e6f
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Showing 15 changed files with 16 additions and 16 deletions.
diff --git a/app/sample.yaml b/app/sample.yaml
@@ -14,8 +14,8 @@ tests:
  - intel_adsp/cavs25
  - intel_adsp/ace15_mtpm
  - intel_adsp/ace20_lnl
- - intel_adsp/ace30_ptl
- - intel_adsp/ace30_ptl_sim
+ - intel_adsp/ace30/ptl
+ - intel_adsp/ace30/ptl/sim
  - imx8qm_mek/mimx8qm6/adsp
  - imx8qxp_mek/mimx8qx6/adsp
  - imx8mp_evk/mimx8ml8/adsp
@@ -25,8 +25,8 @@ tests:
  - intel_adsp/cavs25 # TGL
  - intel_adsp/ace15_mtpm # MTL
  - intel_adsp/ace20_lnl
- - intel_adsp/ace30_ptl
- - intel_adsp/ace30_ptl_sim
+ - intel_adsp/ace30/ptl
+ - intel_adsp/ace30/ptl/sim
  - imx8qm_mek/mimx8qm6/adsp
  - imx8qxp_mek/mimx8qx6/adsp
  - imx8mp_evk/mimx8ml8/adsp

diff --git a/scripts/xtensa-build-zephyr.py b/scripts/xtensa-build-zephyr.py
@@ -92,13 +92,13 @@ class PlatformConfig:
 # For instance: there's no open-source toolchain available for them yet.
 extra_platform_configs = {
  "ptl" : PlatformConfig(
- "intel", "intel_adsp/ace30_ptl",
+ "intel", "intel_adsp/ace30/ptl",
  f"RI-2022.10{xtensa_tools_version_postfix}",
  "ace30_LX7HiFi4_PIF",
  ipc4 = True
  ),
  "ptl-sim" : PlatformConfig(
- "intel", "intel_adsp/ace30_ptl_sim",
+ "intel", "intel_adsp/ace30/ptl/sim",
  f"RI-2022.10{xtensa_tools_version_postfix}",
  "ace30_LX7HiFi4_PIF",
  ipc4 = True

diff --git a/src/audio/base_fw_intel.c b/src/audio/base_fw_intel.c
@@ -88,7 +88,7 @@ int basefw_vendor_hw_config(uint32_t *data_offset, char *data)
  tuple = tlv_next(tuple);
  tlv_value_uint32_set(tuple, IPC4_LP_EBB_COUNT_HW_CFG, PLATFORM_LPSRAM_EBB_COUNT);
 
-#ifdef CONFIG_SOC_INTEL_ACE30_PTL
+#ifdef CONFIG_SOC_INTEL_ACE30
  tuple = tlv_next(tuple);
  tlv_value_uint32_set(tuple, IPC4_I2S_CAPS_HW_CFG, I2S_VER_30_PTL);
 #endif

diff --git a/...rm/pantherlake/include/platform/lib/clk.h → ...platform/ace30/include/platform/lib/clk.h b/...rm/pantherlake/include/platform/lib/clk.h → ...platform/ace30/include/platform/lib/clk.h
diff --git a/...rm/pantherlake/include/platform/lib/cpu.h → ...platform/ace30/include/platform/lib/cpu.h b/...rm/pantherlake/include/platform/lib/cpu.h → ...platform/ace30/include/platform/lib/cpu.h
diff --git a/...rm/pantherlake/include/platform/lib/dai.h → ...platform/ace30/include/platform/lib/dai.h b/...rm/pantherlake/include/platform/lib/dai.h → ...platform/ace30/include/platform/lib/dai.h
diff --git a/...rm/pantherlake/include/platform/lib/dma.h → ...platform/ace30/include/platform/lib/dma.h b/...rm/pantherlake/include/platform/lib/dma.h → ...platform/ace30/include/platform/lib/dma.h
diff --git a/...antherlake/include/platform/lib/mailbox.h → ...form/ace30/include/platform/lib/mailbox.h b/...antherlake/include/platform/lib/mailbox.h → ...form/ace30/include/platform/lib/mailbox.h
diff --git a/...pantherlake/include/platform/lib/memory.h → ...tform/ace30/include/platform/lib/memory.h b/...pantherlake/include/platform/lib/memory.h → ...tform/ace30/include/platform/lib/memory.h
diff --git a/...m/pantherlake/include/platform/platform.h → ...latform/ace30/include/platform/platform.h b/...m/pantherlake/include/platform/platform.h → ...latform/ace30/include/platform/platform.h
diff --git a/...antherlake/include/platform/trace/trace.h → ...form/ace30/include/platform/trace/trace.h b/...antherlake/include/platform/trace/trace.h → ...form/ace30/include/platform/trace/trace.h
diff --git a/src/platform/pantherlake/lib/clk.c → src/platform/ace30/lib/clk.c b/src/platform/pantherlake/lib/clk.c → src/platform/ace30/lib/clk.c
diff --git a/west.yml b/west.yml
@@ -43,7 +43,7 @@ manifest:
 
  - name: zephyr
  repo-path: zephyr
- revision: 9d9089edd09919c90c4224222fc2c560410e6c85
+ revision: 99e6280d7e22552de9a94992b626acdcbde00fee
  remote: zephyrproject
 
  # Import some projects listed in zephyr/west.yml@revision

diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt
@@ -262,8 +262,8 @@ if (CONFIG_SOC_SERIES_INTEL_ADSP_ACE)
  ${SOF_PLATFORM_PATH}/lunarlake/lib/clk.c
  )
 
- zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_ACE30_PTL
- ${SOF_PLATFORM_PATH}/pantherlake/lib/clk.c
+ zephyr_library_sources_ifdef(CONFIG_SOC_INTEL_ACE30
+ ${SOF_PLATFORM_PATH}/ace30/lib/clk.c
  )
 
  # SOF core infrastructure - runs on top of Zephyr
@@ -292,8 +292,8 @@ if (CONFIG_SOC_SERIES_INTEL_ADSP_ACE)
  set(PLATFORM "meteorlake")
  elseif(CONFIG_SOC_INTEL_ACE20_LNL)
  set(PLATFORM "lunarlake")
- elseif(CONFIG_SOC_INTEL_ACE30_PTL)
- set(PLATFORM "pantherlake")
+ elseif(CONFIG_SOC_INTEL_ACE30)
+ set(PLATFORM "ace30")
  endif()
 
  zephyr_include_directories(${SOF_PLATFORM_PATH}/intel/ace/include)

diff --git a/zephyr/lib/dma.c b/zephyr/lib/dma.c
@@ -78,12 +78,12 @@ SHARED_DATA struct dma dma[] = {
  .plat_data = {
  .dir = DMA_DIR_DEV_TO_MEM,
  .caps = DMA_CAP_HDA,
-#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL)
+#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30)
  .devs = DMA_DEV_HDA | DMA_DEV_SSP |
  DMA_DEV_DMIC | DMA_DEV_ALH,
 #else
  .devs = DMA_DEV_HDA,
-#endif /* CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30_PTL */
+#endif /* CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30 */
  .channels = DT_PROP(DT_NODELABEL(hda_link_in), dma_channels),
  .period_count = HDA_DMA_BUFFER_PERIOD_COUNT,
  },
@@ -95,12 +95,12 @@ SHARED_DATA struct dma dma[] = {
  .plat_data = {
  .dir = DMA_DIR_MEM_TO_DEV,
  .caps = DMA_CAP_HDA,
-#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30_PTL)
+#if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30)
  .devs = DMA_DEV_HDA | DMA_DEV_SSP |
  DMA_DEV_DMIC | DMA_DEV_ALH,
 #else
  .devs = DMA_DEV_HDA,
-#endif /* CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30_PTL */
+#endif /* CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30 */
  .channels = DT_PROP(DT_NODELABEL(hda_link_out), dma_channels),
  .period_count = HDA_DMA_BUFFER_PERIOD_COUNT,
  },