From 9b973d3c1317e5a444854709f44047796b048e19 Mon Sep 17 00:00:00 2001 From: "Kalva, DineshKumar" Date: Wed, 13 Dec 2023 18:58:10 +0530 Subject: [PATCH] amd: add probe functionality in AMD/rembrandt platform. Add probe functionality in AMD/rembrandt platform. Signed-off-by: Kalva, DineshKumar --- src/arch/xtensa/configs/rembrandt_defconfig | 2 ++ src/drivers/amd/rembrandt/acp_dma.c | 5 ++++- .../amd/rembrandt/include/platform/chip_offset_byte.h | 1 + 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/arch/xtensa/configs/rembrandt_defconfig b/src/arch/xtensa/configs/rembrandt_defconfig index 665408b03b14..eafc3f2366e4 100644 --- a/src/arch/xtensa/configs/rembrandt_defconfig +++ b/src/arch/xtensa/configs/rembrandt_defconfig @@ -33,3 +33,5 @@ CONFIG_COMP_TDFB=n ##CONFIG_COMP_MUX=n CONFIG_COMP_SEL=n CONFIG_COMP_MIXER=n +CONFIG_PROBE=y +CONFIG_PROBE_POINTS_MAX=16 \ No newline at end of file diff --git a/src/drivers/amd/rembrandt/acp_dma.c b/src/drivers/amd/rembrandt/acp_dma.c index bd6530341ee6..ef94d92dcfd8 100644 --- a/src/drivers/amd/rembrandt/acp_dma.c +++ b/src/drivers/amd/rembrandt/acp_dma.c @@ -238,8 +238,11 @@ int dma_setup(struct dma_chan_data *channel, (dma_config_dscr[dscr_strt_idx].src_addr & ACP_DRAM_ADDRESS_MASK); dma_cfg->base = dma_config_dscr[dscr_strt_idx].src_addr | ACP_SRAM; - dma_cfg->wr_size = dma_cfg->size; dma_cfg->rd_size = 0; + if (channel->index == dma_cfg->probe_channel) + dma_cfg->wr_size = 0; + else + dma_cfg->wr_size = dma_cfg->size; } } } diff --git a/src/platform/amd/rembrandt/include/platform/chip_offset_byte.h b/src/platform/amd/rembrandt/include/platform/chip_offset_byte.h index f20152a11708..8c1043c96ac0 100644 --- a/src/platform/amd/rembrandt/include/platform/chip_offset_byte.h +++ b/src/platform/amd/rembrandt/include/platform/chip_offset_byte.h @@ -34,6 +34,7 @@ #define ACP_SW_INTR_TRIG 0x1241810 #define DSP_INTERRUPT_ROUTING_CTRL_0 0x1241814 #define DSP_INTERRUPT_ROUTING_CTRL_1 0x1241818 +#define ACP_FUTURE_REG_ACLK_0 0x1241854 #define ACP_AXI2DAGB_SEM_0 0x1241874 #define ACP_DSP0_INTR_CNTL1 0x1241920 #define ACP_DSP0_INTR_STAT1 0x1241924