From 3c67034e0938f2a7c91443500675de4a7ac9d710 Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Mon, 11 Mar 2024 13:22:32 +0200 Subject: [PATCH 1/6] nxp: imx8/imx8x: switch to Zephyr logging Switch to using Zephyr logging on imx8 and imx8x to prepare for using native Zephyr drivers. Signed-off-by: Laurentiu Mihalcea --- app/boards/imx8qm_mek_mimx8qm6_adsp.conf | 2 ++ app/boards/imx8qm_mek_mimx8qm6_adsp.overlay | 19 ++++++++++--------- app/boards/imx8qxp_mek_mimx8qx6_adsp.conf | 2 ++ app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay | 13 ------------- 4 files changed, 14 insertions(+), 22 deletions(-) diff --git a/app/boards/imx8qm_mek_mimx8qm6_adsp.conf b/app/boards/imx8qm_mek_mimx8qm6_adsp.conf index a245738a5d80..13a56ed952be 100644 --- a/app/boards/imx8qm_mek_mimx8qm6_adsp.conf +++ b/app/boards/imx8qm_mek_mimx8qm6_adsp.conf @@ -2,3 +2,5 @@ CONFIG_IMX8=y CONFIG_HAVE_AGENT=n CONFIG_FORMAT_CONVERT_HIFI3=n CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n +CONFIG_ZEPHYR_LOG=y +CONFIG_TRACE=n diff --git a/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay b/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay index c9b62545c2c8..d5af4896611b 100644 --- a/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay +++ b/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay @@ -4,15 +4,16 @@ * SPDX-License-Identifier: Apache-2.0 */ -/* TODO: this is a temporary workaround the fact that - * currently the Linux kernel doesn't enable MU2's power. - * As such, CCM (and all IPs that depend on Zephyr's - * clock management) are not usable. - */ &lpuart2 { - status = "disabled"; -}; - -&ccm { + /* note for developers: this is disabled + * because the firmware running on one of the M4 + * cores uses the same LPUART instance. As such, + * to debug you need to make sure that: + * 1) Your SOF DTS doesn't include the RPMSG + * DTS but instead the base DTS (which is + * "imx8qm-mek.dts") + * 2) Your u-boot doesn't include the M4 firmware + * images. + */ status = "disabled"; }; diff --git a/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf b/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf index a7766c19bb61..0584ccd9a255 100644 --- a/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf +++ b/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf @@ -2,3 +2,5 @@ CONFIG_IMX8X=y CONFIG_HAVE_AGENT=n CONFIG_FORMAT_CONVERT_HIFI3=n CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n +CONFIG_ZEPHYR_LOG=y +CONFIG_TRACE=n diff --git a/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay b/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay index c9b62545c2c8..1df9eb948988 100644 --- a/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay +++ b/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay @@ -3,16 +3,3 @@ * * SPDX-License-Identifier: Apache-2.0 */ - -/* TODO: this is a temporary workaround the fact that - * currently the Linux kernel doesn't enable MU2's power. - * As such, CCM (and all IPs that depend on Zephyr's - * clock management) are not usable. - */ -&lpuart2 { - status = "disabled"; -}; - -&ccm { - status = "disabled"; -}; From 2e4d404eac49c794b1fe55575114be9721d06e56 Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Mon, 11 Mar 2024 13:45:38 +0200 Subject: [PATCH 2/6] nxp: imx8/imx8x: add SAI, EDMA, ESAI and HOST_DMA nodes Add nodes for the following IPs: SAI, EDMA and ESAI. Also, add node for HOST_DMA. These are all required for switching to Zephyr native drivers. Signed-off-by: Laurentiu Mihalcea --- app/boards/imx8qm_mek_mimx8qm6_adsp.conf | 3 ++ app/boards/imx8qm_mek_mimx8qm6_adsp.overlay | 37 ++++++++++++++++++++ app/boards/imx8qxp_mek_mimx8qx6_adsp.conf | 3 ++ app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay | 37 ++++++++++++++++++++ 4 files changed, 80 insertions(+) diff --git a/app/boards/imx8qm_mek_mimx8qm6_adsp.conf b/app/boards/imx8qm_mek_mimx8qm6_adsp.conf index 13a56ed952be..5032588f3e0e 100644 --- a/app/boards/imx8qm_mek_mimx8qm6_adsp.conf +++ b/app/boards/imx8qm_mek_mimx8qm6_adsp.conf @@ -4,3 +4,6 @@ CONFIG_FORMAT_CONVERT_HIFI3=n CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n CONFIG_ZEPHYR_LOG=y CONFIG_TRACE=n +CONFIG_DMA=y +CONFIG_DMA_NXP_EDMA_ENABLE_HALFMAJOR_IRQ=y +CONFIG_SHARED_INTERRUPTS=y diff --git a/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay b/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay index d5af4896611b..87df0d8194da 100644 --- a/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay +++ b/app/boards/imx8qm_mek_mimx8qm6_adsp.overlay @@ -4,6 +4,14 @@ * SPDX-License-Identifier: Apache-2.0 */ +/ { + host_dma: dma { + compatible = "nxp,sof-host-dma"; + dma-channels = <32>; + #dma-cells = <0>; + }; +}; + &lpuart2 { /* note for developers: this is disabled * because the firmware running on one of the M4 @@ -17,3 +25,32 @@ */ status = "disabled"; }; + +&sai1 { + rx-fifo-watermark = <48>; + tx-fifo-watermark = <2>; + fifo-depth = <48>; + rx-sync-mode = <1>; + status = "okay"; +}; + +&esai0 { + fifo-depth = <96>; + /* note: not the same semantic as SAI TX watermark. For ESAI + * the DMA requests are generated when number of empty slots + * in the transmit FIFO reaches the chosen watermark value. + * In this case, DMA requests will be generated when transmit + * FIFO has 128 empty slots (equivalent to the FIFO having + * 2 words since the FIFO depth is 128 words). + */ + tx-fifo-watermark = <126>; + rx-fifo-watermark = <96>; + /* needed for internal CS42888 workaround. Remove when possible */ + esai-clock-configuration = , + ; + status = "okay"; +}; + +&edma0 { + status = "okay"; +}; diff --git a/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf b/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf index 0584ccd9a255..59940b9ddb1e 100644 --- a/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf +++ b/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf @@ -4,3 +4,6 @@ CONFIG_FORMAT_CONVERT_HIFI3=n CONFIG_KPB_FORCE_COPY_TYPE_NORMAL=n CONFIG_ZEPHYR_LOG=y CONFIG_TRACE=n +CONFIG_DMA=y +CONFIG_DMA_NXP_EDMA_ENABLE_HALFMAJOR_IRQ=y +CONFIG_SHARED_INTERRUPTS=y diff --git a/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay b/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay index 1df9eb948988..8011407417d8 100644 --- a/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay +++ b/app/boards/imx8qxp_mek_mimx8qx6_adsp.overlay @@ -3,3 +3,40 @@ * * SPDX-License-Identifier: Apache-2.0 */ + +/ { + host_dma: dma { + compatible = "nxp,sof-host-dma"; + dma-channels = <32>; + #dma-cells = <0>; + }; +}; + +&sai1 { + rx-fifo-watermark = <48>; + tx-fifo-watermark = <2>; + fifo-depth = <48>; + rx-sync-mode = <1>; + status = "okay"; +}; + +&esai0 { + fifo-depth = <96>; + /* note: not the same semantic as SAI TX watermark. For ESAI + * the DMA requests are generated when number of empty slots + * in transmit FIFO reaches the chosen watermark value. + * In this case, DMA requests will be generated when transmit + * FIFO has 126 empty slots (equivalent to the FIFO having + * 2 words since the FIFO depth is 128 words). + */ + tx-fifo-watermark = <126>; + rx-fifo-watermark = <96>; + /* needed for internal CS42888 workaround. Remove when possible */ + esai-clock-configuration = , + ; + status = "okay"; +}; + +&edma0 { + status = "okay"; +}; From f82ea451c4b70e090f68b2c42a95dd5a1b558b7f Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Wed, 14 Feb 2024 16:16:19 +0200 Subject: [PATCH 3/6] audio: dai-zephyr: add entry for NXP'S ESAI Add entry for NXP's ESAI IP in dai_set_config(). Signed-off-by: Laurentiu Mihalcea --- src/audio/dai-zephyr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/audio/dai-zephyr.c b/src/audio/dai-zephyr.c index b9b4e1f50f4a..872a1ee9bd61 100644 --- a/src/audio/dai-zephyr.c +++ b/src/audio/dai-zephyr.c @@ -173,6 +173,10 @@ int dai_set_config(struct dai *dai, struct ipc_config_dai *common_config, cfg.type = DAI_IMX_SAI; cfg_params = &sof_cfg->sai; break; + case SOF_DAI_IMX_ESAI: + cfg.type = DAI_IMX_ESAI; + cfg_params = &sof_cfg->esai; + break; default: return -EINVAL; } From a76448f72ec91deaa4953367a88b8e5e9ec2a5b5 Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Wed, 14 Feb 2024 16:18:13 +0200 Subject: [PATCH 4/6] lib: dai: add entry for NXP's ESAI Add entry for NXP's ESAI IP inside the "zephyr_dev" array. What the entry does is it fetches all "struct device"s for ESAI nodes marked as "okay". Signed-off-by: Laurentiu Mihalcea --- src/lib/dai.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/lib/dai.c b/src/lib/dai.c index e056c873a7f8..143047aebc4d 100644 --- a/src/lib/dai.c +++ b/src/lib/dai.c @@ -148,6 +148,9 @@ const struct device *zephyr_dev[] = { #if CONFIG_DAI_NXP_SAI DT_FOREACH_STATUS_OKAY(nxp_dai_sai, GET_DEVICE_LIST) #endif +#if CONFIG_DAI_NXP_ESAI + DT_FOREACH_STATUS_OKAY(nxp_dai_esai, GET_DEVICE_LIST) +#endif }; static const struct device *dai_get_zephyr_device(uint32_t type, uint32_t index) From 726061510e6d76f79c4e6e52c2aa6c81cdb2abf1 Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Wed, 14 Feb 2024 16:22:02 +0200 Subject: [PATCH 5/6] lib: dma: add entries for imx8/imx8x's EDMA0 and HOST_DMA nodes Add entries for EDMA0 and HOST_DMA nodes. Signed-off-by: Laurentiu Mihalcea --- zephyr/lib/dma.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/zephyr/lib/dma.c b/zephyr/lib/dma.c index b4ae8c7f76b5..57c42b65c566 100644 --- a/zephyr/lib/dma.c +++ b/zephyr/lib/dma.c @@ -130,6 +130,26 @@ SHARED_DATA struct dma dma[] = { .z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)), }, #endif /* CONFIG_SOC_MIMX9352_A55 */ +#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP) +{ + .plat_data = { + .dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM, + .devs = DMA_DEV_SAI | DMA_DEV_ESAI, + .channels = 32, + .period_count = 2, + }, + .z_dev = DEVICE_DT_GET(DT_NODELABEL(edma0)), +}, +{ + .plat_data = { + .dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM, + .devs = DMA_DEV_HOST, + .channels = DT_PROP(DT_NODELABEL(host_dma), dma_channels), + .period_count = 2, + }, + .z_dev = DEVICE_DT_GET(DT_NODELABEL(host_dma)), +}, +#endif }; const struct dma_info lib_dma = { From f0eb12b28fa4a8e42b79e3e5af475ad6b74e9879 Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Wed, 14 Feb 2024 16:44:37 +0200 Subject: [PATCH 6/6] nxp: imx8/imx8x: switch to native Zephyr drivers and timer domain This commit includes all necessary changes for switching to timer domain and Zephyr native drivers on imx8 and imx8x. This consists of: 1) Switching all imx8 topologies to timer domain. 2) Disabling Zephyr DMA domain 3) Various interrupt-related fixes via Kconfig-related ifdef logic. This commit includes all necessary changes for switching to native Zephyr drivers on imx8/imx8x. Signed-off-by: Laurentiu Mihalcea --- app/boards/imx8qm_mek_mimx8qm6_adsp.conf | 1 + app/boards/imx8qxp_mek_mimx8qx6_adsp.conf | 1 + src/drivers/imx/ipc.c | 2 +- src/platform/Kconfig | 2 -- src/platform/imx8/include/platform/platform.h | 2 +- src/platform/imx8/platform.c | 14 -------------- .../development/sof-imx8-compr-pcm-cap-wm8960.m4 | 2 +- .../development/sof-imx8-compr-pcm-wm8960.m4 | 2 +- .../topology1/development/sof-imx8-compr-wm8960.m4 | 2 +- .../topology1/development/sof-imx8-src-cs42888.m4 | 4 ++-- .../topology1/development/sof-imx8-src-wm8960.m4 | 4 ++-- .../topology1/sof-imx8-compr-wm8960-mixer.m4 | 8 ++++---- tools/topology/topology1/sof-imx8-cs42888-mixer.m4 | 8 ++++---- tools/topology/topology1/sof-imx8-cs42888.m4 | 4 ++-- tools/topology/topology1/sof-imx8-nocodec-sai.m4 | 2 +- tools/topology/topology1/sof-imx8-nocodec.m4 | 2 +- .../topology/topology1/sof-imx8-wm8960-cs42888.m4 | 8 ++++---- tools/topology/topology1/sof-imx8-wm8960-kwd.m4 | 2 +- tools/topology/topology1/sof-imx8-wm8960-mixer.m4 | 8 ++++---- tools/topology/topology1/sof-imx8-wm8960.m4 | 4 ++-- zephyr/CMakeLists.txt | 9 +-------- zephyr/Kconfig | 2 +- zephyr/include/rtos/interrupt.h | 8 ++++++-- zephyr/wrapper.c | 2 +- 24 files changed, 43 insertions(+), 60 deletions(-) diff --git a/app/boards/imx8qm_mek_mimx8qm6_adsp.conf b/app/boards/imx8qm_mek_mimx8qm6_adsp.conf index 5032588f3e0e..6e741fa7a270 100644 --- a/app/boards/imx8qm_mek_mimx8qm6_adsp.conf +++ b/app/boards/imx8qm_mek_mimx8qm6_adsp.conf @@ -7,3 +7,4 @@ CONFIG_TRACE=n CONFIG_DMA=y CONFIG_DMA_NXP_EDMA_ENABLE_HALFMAJOR_IRQ=y CONFIG_SHARED_INTERRUPTS=y +CONFIG_ZEPHYR_NATIVE_DRIVERS=y diff --git a/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf b/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf index 59940b9ddb1e..d3e3c3c8be79 100644 --- a/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf +++ b/app/boards/imx8qxp_mek_mimx8qx6_adsp.conf @@ -7,3 +7,4 @@ CONFIG_TRACE=n CONFIG_DMA=y CONFIG_DMA_NXP_EDMA_ENABLE_HALFMAJOR_IRQ=y CONFIG_SHARED_INTERRUPTS=y +CONFIG_ZEPHYR_NATIVE_DRIVERS=y diff --git a/src/drivers/imx/ipc.c b/src/drivers/imx/ipc.c index 44fd6d1e50b8..952c3a85ad0f 100644 --- a/src/drivers/imx/ipc.c +++ b/src/drivers/imx/ipc.c @@ -33,7 +33,7 @@ LOG_MODULE_REGISTER(ipc_task, CONFIG_SOF_LOG_LEVEL); -#ifdef CONFIG_ARM64 +#if defined(CONFIG_ARM64) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8X) /* thanks to the fact that ARM's GIC is supported * by Zephyr there's no need to clear interrupts * explicitly. This should already be done by Zephyr diff --git a/src/platform/Kconfig b/src/platform/Kconfig index 66dce8ea6f85..25d868429d37 100644 --- a/src/platform/Kconfig +++ b/src/platform/Kconfig @@ -67,7 +67,6 @@ config IMX8 select IMX select IMX_EDMA select IMX_ESAI - select SCHEDULE_DMA_MULTI_CHANNEL select IMX_INTERRUPT_IRQSTEER help Select if your target platform is imx8-compatible @@ -84,7 +83,6 @@ config IMX8X select IMX select IMX_EDMA select IMX_ESAI - select SCHEDULE_DMA_MULTI_CHANNEL select IMX_INTERRUPT_IRQSTEER help Select if your target platform is imx8x-compatible diff --git a/src/platform/imx8/include/platform/platform.h b/src/platform/imx8/include/platform/platform.h index 9b06f6e36491..a0a498d667d1 100644 --- a/src/platform/imx8/include/platform/platform.h +++ b/src/platform/imx8/include/platform/platform.h @@ -24,7 +24,7 @@ struct timer; #define LPSRAM_SIZE 16384 /* IPC Interrupt */ -#define PLATFORM_IPC_INTERRUPT IRQ_NUM_MU +#define PLATFORM_IPC_INTERRUPT 7 #define PLATFORM_IPC_INTERRUPT_NAME NULL /* Host page size */ diff --git a/src/platform/imx8/platform.c b/src/platform/imx8/platform.c index 079cdd6aab47..f1b57c3e386f 100644 --- a/src/platform/imx8/platform.c +++ b/src/platform/imx8/platform.c @@ -160,11 +160,6 @@ int platform_init(struct sof *sof) sof->cpu_timers = sof->platform_timer; #endif -#ifdef __ZEPHYR__ - /* initialize cascade interrupts before any usage */ - interrupt_init(sof); -#endif - platform_interrupt_init(); platform_clock_init(sof); scheduler_init_edf(); @@ -187,15 +182,6 @@ int platform_init(struct sof *sof) if (ret < 0) return -ENODEV; - /* Init EDMA platform domain */ - sof->platform_dma_domain = dma_multi_chan_domain_init - (&sof->dma_info->dma_array[0], 1, - PLATFORM_DEFAULT_CLOCK, false); - - /* i.MX platform DMA domain will be full synchronous, no time dependent */ - sof->platform_dma_domain->full_sync = true; - scheduler_init_ll(sof->platform_dma_domain); - /* initialize the host IPC mechanims */ ipc_init(sof); diff --git a/tools/topology/topology1/development/sof-imx8-compr-pcm-cap-wm8960.m4 b/tools/topology/topology1/development/sof-imx8-compr-pcm-cap-wm8960.m4 index c1f5db6eb6c1..9136f44712e6 100644 --- a/tools/topology/topology1/development/sof-imx8-compr-pcm-cap-wm8960.m4 +++ b/tools/topology/topology1/development/sof-imx8-compr-pcm-cap-wm8960.m4 @@ -75,7 +75,7 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-capture.m4, 1, SAI, 1, sai1-wm8960-hifi, PIPELINE_SINK_1, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM Low Latency, id 0 diff --git a/tools/topology/topology1/development/sof-imx8-compr-pcm-wm8960.m4 b/tools/topology/topology1/development/sof-imx8-compr-pcm-wm8960.m4 index 2aaea2434105..121d178ecbdc 100644 --- a/tools/topology/topology1/development/sof-imx8-compr-pcm-wm8960.m4 +++ b/tools/topology/topology1/development/sof-imx8-compr-pcm-wm8960.m4 @@ -75,7 +75,7 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-playback.m4, 1, SAI, 1, sai1-wm8960-hifi, PIPELINE_SOURCE_1, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM Low Latency, id 0 diff --git a/tools/topology/topology1/development/sof-imx8-compr-wm8960.m4 b/tools/topology/topology1/development/sof-imx8-compr-wm8960.m4 index 9c4e4d1c9701..597bb143feac 100644 --- a/tools/topology/topology1/development/sof-imx8-compr-wm8960.m4 +++ b/tools/topology/topology1/development/sof-imx8-compr-wm8960.m4 @@ -90,7 +90,7 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-playback.m4, 1, SAI, 1, DAI_BE_NAME, PIPELINE_SOURCE_1, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM Low Latency, id 0 diff --git a/tools/topology/topology1/development/sof-imx8-src-cs42888.m4 b/tools/topology/topology1/development/sof-imx8-src-cs42888.m4 index ddc16a80d632..f972da802a52 100644 --- a/tools/topology/topology1/development/sof-imx8-src-cs42888.m4 +++ b/tools/topology/topology1/development/sof-imx8-src-cs42888.m4 @@ -59,14 +59,14 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-playback.m4, 1, ESAI, 0, esai0-cs42888, PIPELINE_SOURCE_1, 2, s24le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # capture DAI is ESAI0 using 2 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, ESAI, 0, esai0-cs42888, PIPELINE_SINK_2, 2, s24le, - 1000, 0, 0) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM Low Latency, id 0 diff --git a/tools/topology/topology1/development/sof-imx8-src-wm8960.m4 b/tools/topology/topology1/development/sof-imx8-src-wm8960.m4 index e8a0f39a4939..664ed5420295 100644 --- a/tools/topology/topology1/development/sof-imx8-src-wm8960.m4 +++ b/tools/topology/topology1/development/sof-imx8-src-wm8960.m4 @@ -69,14 +69,14 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-playback.m4, 1, SAI, SAI_INDEX, DAI_BE_NAME, PIPELINE_SOURCE_1, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # capture DAI is SAI_SAI_INDEX using 2 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SAI, SAI_INDEX, DAI_BE_NAME, PIPELINE_SINK_2, 2, s32le, - 1000, 0, 0) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM Low Latency, id 0 diff --git a/tools/topology/topology1/sof-imx8-compr-wm8960-mixer.m4 b/tools/topology/topology1/sof-imx8-compr-wm8960-mixer.m4 index 2b1ad5977dcc..61e73d540c53 100644 --- a/tools/topology/topology1/sof-imx8-compr-wm8960-mixer.m4 +++ b/tools/topology/topology1/sof-imx8-compr-wm8960-mixer.m4 @@ -78,7 +78,7 @@ define(`DAI_BE_NAME', concat(concat(`sai', SAI_INDEX), STREAM_NAME)) DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4, 1, SAI, SAI_INDEX, DAI_BE_NAME, NOT_USED_IGNORED, 2, s32le, - 1000, 1, 0, SCHEDULE_TIME_DOMAIN_DMA, + 1000, 1, 0, SCHEDULE_TIME_DOMAIN_TIMER, 2, 48000) # PCM Playback pipeline 3 on PCM 0 using max 2 channels of s32le. @@ -88,7 +88,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4, 3, 0, 2, s32le, 1000, 0, 0, 48000, 48000, 48000, - SCHEDULE_TIME_DOMAIN_DMA, + SCHEDULE_TIME_DOMAIN_TIMER, PIPELINE_PLAYBACK_SCHED_COMP_1) # Compress Playback pipeline 4 on Compr 1 using max 2 channels of s32le. @@ -98,7 +98,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-codec-adapter-playback.m4, 4, 1, 2, s32le, 5000, 0, 0, 48000, 48000, 48000, - SCHEDULE_TIME_DOMAIN_DMA, + SCHEDULE_TIME_DOMAIN_TIMER, PIPELINE_PLAYBACK_SCHED_COMP_1) # Connect pipelines together @@ -120,7 +120,7 @@ SectionGraph."PIPE_NAME" { DAI_ADD(sof/pipe-dai-capture.m4, 2, SAI, SAI_INDEX, DAI_BE_NAME, PIPELINE_SINK_2, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM definitions diff --git a/tools/topology/topology1/sof-imx8-cs42888-mixer.m4 b/tools/topology/topology1/sof-imx8-cs42888-mixer.m4 index b3fcea341ab1..d896ef2819b4 100644 --- a/tools/topology/topology1/sof-imx8-cs42888-mixer.m4 +++ b/tools/topology/topology1/sof-imx8-cs42888-mixer.m4 @@ -46,7 +46,7 @@ PIPELINE_PCM_ADD(sof/pipe-low-latency-capture.m4, DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4, 1, ESAI, 0, esai0-cs42888, NOT_USED_IGNORED, 2, s24le, - 1000, 1, 0, SCHEDULE_TIME_DOMAIN_DMA, + 1000, 1, 0, SCHEDULE_TIME_DOMAIN_TIMER, 2, 48000) # PCM Playback pipeline 3 on PCM 0 using max 2 channels of s24le. @@ -56,7 +56,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4, 3, 0, 2, s24le, 1000, 0, 0, 48000, 48000, 48000, - SCHEDULE_TIME_DOMAIN_DMA, + SCHEDULE_TIME_DOMAIN_TIMER, PIPELINE_PLAYBACK_SCHED_COMP_1) # PCM Playback pipeline 4 on PCM 1 using max 2 channels of s24le. @@ -66,7 +66,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4, 4, 1, 2, s24le, 5000, 0, 0, 48000, 48000, 48000, - SCHEDULE_TIME_DOMAIN_DMA, + SCHEDULE_TIME_DOMAIN_TIMER, PIPELINE_PLAYBACK_SCHED_COMP_1) # Connect pipelines together @@ -88,7 +88,7 @@ SectionGraph."PIPE_NAME" { DAI_ADD(sof/pipe-dai-capture.m4, 2, ESAI, 0, esai0-cs42888, PIPELINE_SINK_2, 2, s24le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM definitions diff --git a/tools/topology/topology1/sof-imx8-cs42888.m4 b/tools/topology/topology1/sof-imx8-cs42888.m4 index 49d4de3324fb..1bf89135ab05 100644 --- a/tools/topology/topology1/sof-imx8-cs42888.m4 +++ b/tools/topology/topology1/sof-imx8-cs42888.m4 @@ -59,14 +59,14 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-playback.m4, 1, ESAI, 0, esai0-cs42888, PIPELINE_SOURCE_1, 2, s24le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # capture DAI is ESAI0 using 2 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, ESAI, 0, esai0-cs42888, PIPELINE_SINK_2, 2, s24le, - 1000, 0, 0) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM Low Latency, id 0 diff --git a/tools/topology/topology1/sof-imx8-nocodec-sai.m4 b/tools/topology/topology1/sof-imx8-nocodec-sai.m4 index b77fe0537975..150610477251 100644 --- a/tools/topology/topology1/sof-imx8-nocodec-sai.m4 +++ b/tools/topology/topology1/sof-imx8-nocodec-sai.m4 @@ -52,7 +52,7 @@ dnl deadline, priority, core) DAI_ADD(sof/pipe-dai-playback.m4, 1, SAI, 1, NoCodec-0, PIPELINE_SOURCE_1, 2, s24le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) dnl PCM_PLAYBACK_ADD(name, pcm_id, playback) diff --git a/tools/topology/topology1/sof-imx8-nocodec.m4 b/tools/topology/topology1/sof-imx8-nocodec.m4 index aa33e86d0f38..caf52acdf0e1 100644 --- a/tools/topology/topology1/sof-imx8-nocodec.m4 +++ b/tools/topology/topology1/sof-imx8-nocodec.m4 @@ -52,7 +52,7 @@ dnl deadline, priority, core) DAI_ADD(sof/pipe-dai-playback.m4, 1, ESAI, 0, NoCodec-0, PIPELINE_SOURCE_1, 2, s24le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) dnl PCM_PLAYBACK_ADD(name, pcm_id, playback) diff --git a/tools/topology/topology1/sof-imx8-wm8960-cs42888.m4 b/tools/topology/topology1/sof-imx8-wm8960-cs42888.m4 index 3864add58a46..8034dbefde8a 100644 --- a/tools/topology/topology1/sof-imx8-wm8960-cs42888.m4 +++ b/tools/topology/topology1/sof-imx8-wm8960-cs42888.m4 @@ -73,28 +73,28 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-playback.m4, 1, ESAI, 0, esai0-cs42888, PIPELINE_SOURCE_1, 2, s24le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # capture DAI is ESAI0 using 2 periods # Buffers use s24le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, ESAI, 0, esai0-cs42888, PIPELINE_SINK_2, 2, s24le, - 1000, 0, 0) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # playback DAI is SAI1 using 2 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-playback.m4, 3, SAI, 1, sai1-wm8960-hifi, PIPELINE_SOURCE_3, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # capture DAI is SAI1 using 2 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 4, SAI, 1, sai1-wm8960-hifi, PIPELINE_SINK_4, 2, s32le, - 1000, 0, 0) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture) diff --git a/tools/topology/topology1/sof-imx8-wm8960-kwd.m4 b/tools/topology/topology1/sof-imx8-wm8960-kwd.m4 index 44e2ecf8e83b..2203b5504ddf 100644 --- a/tools/topology/topology1/sof-imx8-wm8960-kwd.m4 +++ b/tools/topology/topology1/sof-imx8-wm8960-kwd.m4 @@ -56,7 +56,7 @@ DAI_ADD(sof/pipe-dai-capture.m4, 1, SAI, 1, sai1-wm8960-hifi, PIPELINE_SINK_1, 2, s32le, KWD_PIPE_SCH_DEADLINE_US, - 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # keyword detector pipe dnl PIPELINE_PCM_ADD(pipeline, diff --git a/tools/topology/topology1/sof-imx8-wm8960-mixer.m4 b/tools/topology/topology1/sof-imx8-wm8960-mixer.m4 index d95db75fe709..a89986d91ec7 100644 --- a/tools/topology/topology1/sof-imx8-wm8960-mixer.m4 +++ b/tools/topology/topology1/sof-imx8-wm8960-mixer.m4 @@ -57,7 +57,7 @@ define(`DAI_BE_NAME', concat(concat(`sai', SAI_INDEX), STREAM_NAME)) DAI_ADD(sof/pipe-mixer-volume-dai-playback.m4, 1, SAI, SAI_INDEX, DAI_BE_NAME, NOT_USED_IGNORED, 2, s32le, - 1000, 1, 0, SCHEDULE_TIME_DOMAIN_DMA, + 1000, 1, 0, SCHEDULE_TIME_DOMAIN_TIMER, 2, `RATE') # PCM Playback pipeline 3 on PCM 0 using max 2 channels of s32le. @@ -67,7 +67,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4, 3, 0, 2, s32le, 1000, 0, 0, `RATE', `RATE', `RATE', - SCHEDULE_TIME_DOMAIN_DMA, + SCHEDULE_TIME_DOMAIN_TIMER, PIPELINE_PLAYBACK_SCHED_COMP_1) # PCM Playback pipeline 4 on PCM 1 using max 2 channels of s32le. @@ -77,7 +77,7 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4, 4, 1, 2, s32le, 5000, 0, 0, `RATE', `RATE', `RATE', - SCHEDULE_TIME_DOMAIN_DMA, + SCHEDULE_TIME_DOMAIN_TIMER, PIPELINE_PLAYBACK_SCHED_COMP_1) # Connect pipelines together @@ -99,7 +99,7 @@ SectionGraph."PIPE_NAME" { DAI_ADD(sof/pipe-dai-capture.m4, 2, SAI, SAI_INDEX, DAI_BE_NAME, PIPELINE_SINK_2, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM definitions diff --git a/tools/topology/topology1/sof-imx8-wm8960.m4 b/tools/topology/topology1/sof-imx8-wm8960.m4 index 3628bc5392e9..1d5c3b9b02a2 100644 --- a/tools/topology/topology1/sof-imx8-wm8960.m4 +++ b/tools/topology/topology1/sof-imx8-wm8960.m4 @@ -70,14 +70,14 @@ dnl period, priority, core, time_domain) DAI_ADD(sof/pipe-dai-playback.m4, 1, SAI, SAI_INDEX, DAI_BE_NAME, PIPELINE_SOURCE_1, 2, s32le, - 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # capture DAI is SAI_SAI_INDEX using 2 periods # Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 DAI_ADD(sof/pipe-dai-capture.m4, 2, SAI, SAI_INDEX, DAI_BE_NAME, PIPELINE_SINK_2, 2, s32le, - 1000, 0, 0) + 1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER) # PCM Low Latency, id 0 diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 777f812939cc..e7f3eddcc118 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -234,26 +234,19 @@ endif() # NXP IMX8 platforms if (CONFIG_SOC_MIMX8QM6_ADSP OR CONFIG_SOC_MIMX8QX6_ADSP) zephyr_library_sources( - ${SOF_DRIVERS_PATH}/generic/dummy-dma.c - ${SOF_DRIVERS_PATH}/imx/edma.c - ${SOF_DRIVERS_PATH}/imx/sai.c ${SOF_DRIVERS_PATH}/imx/ipc.c - ${SOF_DRIVERS_PATH}/imx/esai.c - ${SOF_DRIVERS_PATH}/imx/interrupt-irqsteer.c ) # Platform sources zephyr_library_sources( ${SOF_PLATFORM_PATH}/imx8/platform.c ${SOF_PLATFORM_PATH}/imx8/lib/clk.c - ${SOF_PLATFORM_PATH}/imx8/lib/dai.c - ${SOF_PLATFORM_PATH}/imx8/lib/dma.c ${SOF_PLATFORM_PATH}/imx8/lib/memory.c ) # SOF core infrastructure - runs on top of Zephyr zephyr_library_sources( - ${SOF_SRC_PATH}/drivers/interrupt.c + lib/dma.c ) zephyr_library_sources(${SOF_SRC_PATH}/schedule/zephyr_ll.c) diff --git a/zephyr/Kconfig b/zephyr/Kconfig index 3d9a0b841231..8de6f2b152f9 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -30,7 +30,7 @@ config SOF_ZEPHYR_STRICT_HEADERS config DMA_DOMAIN bool "Enable the usage of DMA domain." - default y if IMX + default y if IMX8M || IMX8ULP help This enables the usage of the DMA domain in scheduling. diff --git a/zephyr/include/rtos/interrupt.h b/zephyr/include/rtos/interrupt.h index b9559c89b431..cbf7f69e43fb 100644 --- a/zephyr/include/rtos/interrupt.h +++ b/zephyr/include/rtos/interrupt.h @@ -8,7 +8,10 @@ #ifndef __ZEPHYR_RTOS_INTERRUPT_H__ #define __ZEPHYR_RTOS_INTERRUPT_H__ -#if defined(CONFIG_IMX) +/* TODO: to be removed completely when the following platforms are switched + * to native drivers. + */ +#if defined(CONFIG_IMX8M) || defined(CONFIG_IMX8ULP) /* imx currently has no IRQ driver in Zephyr so we force to xtos IRQ */ #include "../../../xtos/include/rtos/interrupt.h" #else @@ -55,7 +58,8 @@ static inline void interrupt_unregister(uint32_t irq, const void *arg) static inline int interrupt_get_irq(unsigned int irq, const char *cascade) { #if defined(CONFIG_LIBRARY) || defined(CONFIG_ACE) || \ - defined(CONFIG_ZEPHYR_POSIX) || defined(CONFIG_ARM64) + defined(CONFIG_ZEPHYR_POSIX) || defined(CONFIG_ARM64) ||\ + defined(CONFIG_IMX8) || defined(CONFIG_IMX8X) return irq; #else if (cascade == irq_name_level2) diff --git a/zephyr/wrapper.c b/zephyr/wrapper.c index 27e9a16c5b73..e18fe175c2c3 100644 --- a/zephyr/wrapper.c +++ b/zephyr/wrapper.c @@ -55,7 +55,7 @@ const char irq_name_level2[] = "level2"; const char irq_name_level5[] = "level5"; /* imx currently has no IRQ driver in Zephyr so we force to xtos IRQ */ -#if defined(CONFIG_IMX) +#if defined(CONFIG_IMX8M) || defined(CONFIG_IMX8ULP) int interrupt_register(uint32_t irq, void(*handler)(void *arg), void *arg) { #ifdef CONFIG_DYNAMIC_INTERRUPTS