From 71f1457b8ba26ee811c68a137333473bb0c4875d Mon Sep 17 00:00:00 2001 From: Kai Vehmanen Date: Wed, 4 Sep 2024 11:28:21 +0300 Subject: [PATCH] boards: ace30: enable SOF log level at INF level Re-enable normal INFO level log output for ace30_ptl target. Move the limited log level setting to FPGA overlay. Signed-off-by: Kai Vehmanen --- app/boards/intel_adsp_ace30_ptl.conf | 1 - app/overlays/ptl/fpga_overlay.conf | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/app/boards/intel_adsp_ace30_ptl.conf b/app/boards/intel_adsp_ace30_ptl.conf index 2d5df6056f89..1aa392bc5714 100644 --- a/app/boards/intel_adsp_ace30_ptl.conf +++ b/app/boards/intel_adsp_ace30_ptl.conf @@ -67,7 +67,6 @@ CONFIG_MM_DRV_INTEL_ADSP_TLB_REMAP_UNUSED_RAM=y CONFIG_LOG_BACKEND_ADSP_MTRACE=y CONFIG_SOF_LOG_LEVEL_INF=y -CONFIG_SOF_LOG_LEVEL_OFF=y CONFIG_ZEPHYR_LOG=y CONFIG_INTEL_ADSP_IPC=y diff --git a/app/overlays/ptl/fpga_overlay.conf b/app/overlays/ptl/fpga_overlay.conf index 1d09ecb6bd99..3fdf9d658c3c 100644 --- a/app/overlays/ptl/fpga_overlay.conf +++ b/app/overlays/ptl/fpga_overlay.conf @@ -1,3 +1,5 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=19200000 CONFIG_DAI_DMIC_HW_IOCLK=19200000 +# limit logs to minimize runtime overhead of logging +CONFIG_SOF_LOG_LEVEL_ERR=y