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.travis.yml
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.travis.yml
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language:
- c
compiler:
- gcc
sudo: false
addons:
apt:
update: true
packages:
- build-essential
- gnupg
- realpath
- util-linux
- device-tree-compiler
git:
submodules: false
install:
- export CPUS="$C" && echo "CPUS='$CPUS'"
- export PLATFORMS="$P" && echo "PLATFORMS='$PLATFORMS'"
- export TARGETS="$T" && echo "TARGETS='$TARGETS'"
- export FIRMWARE="$F" && echo "FIRMWARE='$FIRMWARE'"
- $PWD/.travis/setup.sh
script:
- $PWD/.travis/build.sh
after_success:
- $PWD/.travis/update-prebuilt-list.sh
env:
global:
- HDMI2USB_UDEV_IGNORE=1
- CLEAN_CHECK=1
- PREBUILT_DIR="/tmp/HDMI2USB-firmware-prebuilt"
# Travis reports incorrect the hosts number of processors, override to 2
# cores.
- JOBS=2
matrix:
# C=cpu.variant TC="toolchain" P=platform T="target1 t2" F=firmware
#--------------------------------------------
# Bare-metal firmware, base targets
#--------------------------------------------
# LatticeMico32
- C=lm32 TC="vivado" P=arty T="base net"
- C=lm32 TC="vivado" P=basys3 T="base"
- C=lm32 TC="vivado" P=cmod_a7 T="base"
- C=lm32 TC="vivado" P=mimas_a7 T="base net"
- C=lm32 TC="vivado" P=neso T="base"
- C=lm32 TC="vivado" P=nexys_video T="base net"
- C=lm32 TC="ise" P=atlys T="base net"
- C=lm32 TC="ise" P=galatea T="base"
- C=lm32 TC="ise" P=matrix_voice T="base"
- C=lm32 TC="ise" P=mimasv2 T="base"
- C=lm32 TC="ise" P=minispartan6 T="base"
- C=lm32 TC="ise" P=opsis T="base net"
- C=lm32 TC="ise" P=pipistrello T="base"
- C=lm32 TC="ise" P=saturn T="base"
- C=lm32 TC="ise" P=waxwing T="base"
- C=lm32.lite TC="icestorm" P=ice40_hx8k_b_evn T="base" F=stub
- C=lm32.lite TC="icestorm" P=ice40_up5k_b_evn T="base" F=stub
- C=lm32.lite TC="icestorm" P=icebreaker T="base" F=stub
- C=lm32.lite TC="icestorm" P=tinyfpga_bx T="base" F=stub
- C=lm32.lite TC="icestorm" P=upduino_v1 T="base" F=stub
- C=lm32.lite TC="icestorm" P=icefun T="base" F=stub
- C=lm32.lite TC="vivado" P=arty T="base net"
- C=lm32.lite P=opsis T="base net"
- C=lm32.minimal TC="icestorm" P=ice40_hx8k_b_evn T="base" F=stub
- C=lm32.minimal TC="icestorm" P=ice40_up5k_b_evn T="base" F=stub
- C=lm32.minimal TC="icestorm" P=icebreaker T="base" F=stub
- C=lm32.minimal TC="icestorm" P=tinyfpga_bx T="base" F=stub
- C=lm32.minimal TC="icestorm" P=upduino_v1 T="base" F=stub
- C=lm32.minimal TC="icestorm" P=icefun T="base" F=stub
- C=lm32.minimal TC="vivado" P=arty T="base net"
- C=lm32.minimal TC="ise" P=opsis T="base net"
# OpenRISC1000
- C=mor1kx TC="vivado" P=arty T="base net"
- C=mor1kx TC="vivado" P=mimas_a7 T="base net"
- C=mor1kx TC="vivado" P=atlys T="base net"
- C=mor1kx TC="ise" P=mimasv2 T="base"
- C=mor1kx TC="ise" P=opsis T="base net"
- C=mor1kx TC="ise" P=pipistrello T="base"
# VexRISCV
- C=vexriscv TC="vivado" P=netv2 T="base net"
- C=vexriscv TC="vivado" P=arty T="base net"
- C=vexriscv TC="vivado" P=mimas_a7 T="base net"
- C=vexriscv TC="ise" P=mimasv2 T="base"
- C=vexriscv TC="ise" P=opsis T="base net"
- C=vexriscv.lite TC="icestorm" P=ice40_hx8k_b_evn T="base" F=stub
- C=vexriscv.lite TC="icestorm" P=ice40_up5k_b_evn T="base" F=stub
- C=vexriscv.lite TC="icestorm" P=icebreaker T="base" F=stub
- C=vexriscv.lite TC="icestorm" P=tinyfpga_bx T="base" F=stub
- C=vexriscv.lite TC="icestorm" P=upduino_v1 T="base" F=stub
- C=vexriscv.lite TC="icestorm" P=icefun T="base" F=stub
- C=vexriscv.lite TC="vivado" P=arty T="base net"
- C=vexriscv.lite TC="ise" P=matrix_voice T="base"
- C=vexriscv.lite TC="ise" P=opsis T="base net"
- C=vexriscv.lite TC="ise" P=pano_logic_g2 T="base"
# PicoRV32
- C=picorv32 TC="vivado" P=arty T="base net"
- C=picorv32 TC="vivado" P=mimas_a7 T="base net"
- C=picorv32 TC="ise" P=opsis T="base net"
- C=picorv32.minimal TC="icestorm" P=icebreaker T="base" F=stub
- C=picorv32.minimal TC="vivado" P=arty T="base net"
- C=picorv32.minimal TC="ise" P=matrix_voice T="base"
- C=picorv32.minimal TC="ise" P=opsis T="base net"
- C=picorv32.minimal TC="icestorm" P=fomu T="base" F=stub
# minerva target
- C=minerva TC="vivado" P=arty T="base net"
- C=minerva TC="ise" P=opsis T="base net"
#--------------------------------------------
# Video Targets
#--------------------------------------------
- C=lm32 TC="vivado" P=nexys_video T="video"
- C=lm32 TC="ise" P=atlys T="video"
- C=lm32 TC="ise" P=opsis T="video"
#--------------------------------------------
# HDMI2USB Targets
#--------------------------------------------
- C=lm32 TC="ise" P=atlys T="hdmi2usb"
- C=lm32 TC="ise" P=opsis T="hdmi2usb"
#--------------------------------------------
# HDMI2USB Targets
#--------------------------------------------
- C=vexriscv TC="vivado" P=netv2 T="hdmi2pcie"
#--------------------------------------------
# MicroPython Targets
#--------------------------------------------
# FIXME: Add some here
- C=vexriscv TC="vivado" P=arty T="base" F=micropython
#--------------------------------------------
# Linux Targets
#--------------------------------------------
- C=mor1kx.linux TC="vivado" P=arty T="net" F=linux
- C=mor1kx.linux TC="vivado" P=nexys_video T="net" F=linux
- C=mor1kx.linux TC="ise" P=atlys T="net" F=linux
- C=mor1kx.linux TC="ise" P=opsis T="net" F=linux
# FIXME: Add vexriscv.linux
- C=vexriscv.linux TC="vivado" P=arty T="net" F=linux
- C=vexriscv.linux TC="ise" P=opsis T="net" F=linux
# FIXME: Add rocket.linux
#--------------------------------------------
# Zephyr Targets
#--------------------------------------------
- C=vexriscv.lite TC="icestorm" P=icebreaker T="base" F=zephyr
- C=vexriscv.lite TC="vivado" P=arty T="net" F=zephyr
- C=vexriscv.lite TC="ise" P=atlys T="net" F=zephyr
jobs:
allow_failures:
- env: C=mor1kx.linux TC="vivado" P=nexys_video T="net" F=linux
# Need to rebuilt Xilinx toolchain to add NeTV2 FPGA Part (Artix 7 35T+50T parts)
- env: C=vexriscv TC="vivado" P=netv2 T="base net"
- env: C=vexriscv TC="vivado" P=netv2 T="hdmi2pcie"
# Occasionally these builds take longer than 50minute limit on Travis.
- env: C=lm32 TC="ise" P=atlys T="hdmi2usb"
- env: C=lm32 TC="ise" P=opsis T="hdmi2usb"
notifications:
email:
- hdmi2usb-spam@googlegroups.com
irc:
channels:
- "chat.freenode.net#hdmi2usb"
template:
- "[%{repository_slug}/%{branch}#%{build_number}] (%{commit}): %{message} (%{build_url})"