vivado_7036.backup.log

#-----------------------------------------------------------
# Vivado v2014.1 (64-bit)
# SW Build 881834 on Fri Apr  4 14:15:54 MDT 2014
# IP Build 877625 on Fri Mar 28 16:29:15 MDT 2014
# Start of session at: Sat Sep 06 21:59:53 2014
# Process ID: 12248
# Log file: C:/Users/Daniel/Desktop/XADC/vivado.log
# Journal file: C:/Users/Daniel/Desktop/XADC\vivado.jou
#-----------------------------------------------------------
start_gui
open_project {C:\Users\Daniel\Desktop\XADC\XADC.xpr}
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kc705:part0:0.9 available at R:/Vivado20141/Vivado/2014.1/data/boards/board_parts/kintex7/kc705/0.9/board_part.xml as part xc7k325tffg900-2 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:kc705:part0:1.0 available at R:/Vivado20141/Vivado/2014.1/data/boards/board_parts/kintex7/kc705/1.0/board_part.xml as part xc7k325tffg900-2 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zc706:part0:0.9 available at R:/Vivado20141/Vivado/2014.1/data/boards/board_parts/zynq/zc706/0.9/board_part.xml as part xc7z045ffg900-2 specified in board_part file is either invalid or not available
WARNING: [Board 49-26] cannot add Board Part xilinx.com:zc706:part0:1.0 available at R:/Vivado20141/Vivado/2014.1/data/boards/board_parts/zynq/zc706/1.0/board_part.xml as part xc7z045ffg900-2 specified in board_part file is either invalid or not available
Scanning sources...
Finished scanning sources
WARNING: [Project 1-231] Project 'XADC.xpr' was created with a future version and may or may not perform reliably with this version of Vivado. It has been opened in read-only mode for the protection of unrecognized data. Use 'File | Save Project As...' if you wish to alter a copy of the project.
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'R:/Vivado20141/Vivado/2014.1/data/ip'.
WARNING: [IP_Flow 19-3549] Detected incompatibility between IP System_processing_system7_0_0 and its definition xilinx.com:ip:processing_system7:5.4
WARNING: [IP_Flow 19-3549] Detected incompatibility between IP System_xadc_wiz_0_0 and its definition xilinx.com:ip:xadc_wiz:3.0
WARNING: [IP_Flow 19-3549] Detected incompatibility between IP System_processing_system7_0_axi_periph_0 and its definition xilinx.com:ip:axi_interconnect:2.1
WARNING: [IP_Flow 19-3549] Detected incompatibility between IP System_rst_processing_system7_0_100M_0 and its definition xilinx.com:ip:proc_sys_reset:5.0
WARNING: [IP_Flow 19-3549] Detected incompatibility between IP System_xbar_0 and its definition xilinx.com:ip:axi_crossbar:2.1
WARNING: [IP_Flow 19-3549] Detected incompatibility between IP System_auto_pc_0 and its definition xilinx.com:ip:axi_protocol_converter:2.1
WARNING: [BD 41-1303] One or more IPs have been locked in the design 'System.bd'. Please run report_ip_status for more details and recommendations on how to fix this issue.
open_project: Time (s): cpu = 00:00:17 ; elapsed = 00:00:15 . Memory (MB): peak = 862.387 ; gain = 110.191
open_bd_design {C:/Users/Daniel/Desktop/XADC/XADC.srcs/sources_1/bd/System/System.bd}
Adding component instance block -- xilinx.com:ip:processing_system7:5.4 - processing_system7_0
Adding component instance block -- xilinx.com:ip:xadc_wiz:3.0 - xadc_wiz_0
Adding component instance block -- xilinx.com:ip:proc_sys_reset:5.0 - rst_processing_system7_0_100M
Adding component instance block -- xilinx.com:ip:axi_crossbar:2.1 - xbar
Adding component instance block -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Successfully read diagram <System> from BD file <C:/Users/Daniel/Desktop/XADC/XADC.srcs/sources_1/bd/System/System.bd>
open_bd_design: Time (s): cpu = 00:00:20 ; elapsed = 00:00:21 . Memory (MB): peak = 1100.449 ; gain = 232.547
exit
INFO: [Common 17-206] Exiting Vivado at Sat Sep 06 22:01:04 2014...