10GbE XGMII TCP/IPv4 packet generator for Verilog
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Updated
Nov 17, 2024 - C++
10GbE XGMII TCP/IPv4 packet generator for Verilog
Third project of 2023-2024 year which aims creating our own assembly language, with an interpreter to be able to read and run our programs. 📎
[ABANDONED] A small product of boredom. Incomplete and abandoned.
TAYLOR: TernArY virtuaL prOcessoR
This is virtual machine named Ameer Virtual Processor to which languages can be compiled to, and be ran on. This runs well with either Nuitka or PyPy
[ABANDONED] Just another product of boredom.
A new EPU, completely virtual, in the browser
Stack-based virtual processor and code assembler/disassembler to it.
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