-
Notifications
You must be signed in to change notification settings - Fork 52
/
spi.c
260 lines (225 loc) · 8.01 KB
/
spi.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
/*****************************************************************************
* *
* DFU/SD/SDHC Bootloader for LPC17xx *
* *
* by Triffid Hunter *
* *
* *
* This firmware is Copyright (C) 2009-2010 Michael Moon aka Triffid_Hunter *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the Free Software *
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA *
* *
*****************************************************************************/
#include "spi.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#include "lpc17xx_ssp.h"
#include "lpc17xx_gpio.h"
#include <stdio.h>
// #define SOFT_SPI
uint32_t delay;
Pin_t miso;
Pin_t mosi;
Pin_t sclk;
SPI_REG *sspr;
void SPI_init(PinName mosi, PinName miso, PinName sclk)
{
FIO_SetDir((mosi >> 5) & 7, 1UL << (mosi & 0x1F), 1);
FIO_SetDir((miso >> 5) & 7, 1UL << (miso & 0x1F), 0);
FIO_SetDir((sclk >> 5) & 7, 1UL << (sclk & 0x1F), 1);
if (mosi == P0_9 && miso == P0_8 && sclk == P0_7)
{
// SSP1 on 0.7,0.8,0.9
sspr = LPC_SSP1;
// isr_dispatch[1] = this;
// printf("SPI:Using SSP1\n");
LPC_PINCON->PINSEL0 &= ~((3 << (7*2)) | (3 << (8*2)) | (3 << (9*2)));
LPC_PINCON->PINSEL0 |= ((2 << (7*2)) | (2 << (8*2)) | (2 << (9*2)));
LPC_SC->PCLKSEL0 &= 0xFFCFFFFF;
LPC_SC->PCLKSEL0 |= 0x00100000;
LPC_SC->PCONP |= CLKPWR_PCONP_PCSSP1;
}
else if (mosi == P0_18 && miso == P0_17 && sclk == P0_15)
{
// SSP0 on 0.15,0.16,0.17,0.18
sspr = LPC_SSP0;
// isr_dispatch[0] = this;
LPC_PINCON->PINSEL0 &= ~(3 << (15*2));
LPC_PINCON->PINSEL0 |= (2 << (15*2));
LPC_PINCON->PINSEL1 &= ~( (3 << ((17*2)&30)) | (3 << ((18*2)&30)) );
LPC_PINCON->PINSEL1 |= ( (2 << ((17*2)&30)) | (2 << ((18*2)&30)) );
LPC_SC->PCLKSEL1 &= 0xFFFFF3FF;
LPC_SC->PCLKSEL1 |= 0x00000400;
LPC_SC->PCONP |= CLKPWR_PCONP_PCSSP0;
}
else if (mosi == P1_24 && miso == P1_23 && sclk == P1_20)
{
// SSP0 on 1.20,1.23,1.24
sspr = LPC_SSP0;
// isr_dispatch[0] = this;
// // LPC_PINCON->PINSEL3 &= 0xFFFC3CFF;
// LPC_PINCON->PINSEL3 |= 0x0003C300;
// LPC_PINCON->PINSEL3 &= ~( (3 << ((20*2)&30)) | (3 << ((23*2)&30)) | (3 << ((24*2)&30)) );
LPC_PINCON->PINSEL3 |= ( (3 << ((20*2)&30)) | (3 << ((23*2)&30)) | (3 << ((24*2)&30)) );
LPC_SC->PCLKSEL1 &= 0xFFFFF3FF;
LPC_SC->PCLKSEL1 |= 0x00000400;
LPC_SC->PCONP |= CLKPWR_PCONP_PCSSP0;
}
else
{
sspr = (LPC_SSP_TypeDef *) 0;
}
if (sspr) {
// simple assignment does not work with gcc 6.3.1,
// this results in register being zero (compiler problem?)
sspr->CR0 &= ~SSP_CR0_BITMASK;
sspr->CR0 |= SSP_DATABIT_8 |
SSP_FRAME_SPI ;
sspr->CR1 &= ~SSP_CR1_BITMASK;
sspr->CR1 |= SSP_MASTER_MODE;
SPI_frequency(10000);
sspr->CR1 |= SSP_CR1_SSP_EN;
}
}
void SPI_frequency(uint32_t f)
{
// CCLK = 25MHz
// CPSR = 2 to 254, even only
// CR0[8:15] (SCR, 0..255) is a further prescale
// iprintf("SPI: frequency %lu:", f);
delay = 25000000 / f;
// f = 25MHz / (CPSR . [SCR + 1])
// CPSR . (SCR + 1) = 25MHz / f
// min freq is 25MHz / (254 * 256)
if (sspr) {
if (f < 385) {
sspr->CPSR = 254;
sspr->CR0 &= 0x00FF;
sspr->CR0 |= 255 << 8;
}
// max freq is 25MHz / (2 * 1)
else if (f > 12500000) {
sspr->CPSR = 2;
sspr->CR0 &= 0x00FF;
}
else {
sspr->CPSR = delay & 0xFE;
// CPSR . (SCR + 1) = f;
// (SCR + 1) = f / CPSR;
// SCR = (f / CPSR) - 1
sspr->CR0 &= 0x00FF;
sspr->CR0 |= (((delay / sspr->CPSR) - 1) & 0xFF) << 8;
}
// iprintf(" CPSR=%lu, CR0=%lu", sspr->CPSR, sspr->CR0);
}
// iprintf("\n");
}
void _delay(uint32_t ticks) {
for (;ticks;ticks--)
asm volatile("nop\n\t");
}
uint8_t SPI_write(uint8_t data)
{
// _cs = 1;
uint8_t r = 0;
// printf("SPI: >0x%x", data);
if (sspr) {
while ((sspr->SR & SSP_SR_TNF) == 0);
sspr->DR = data;
while ((sspr->SR & SSP_SR_RNE) == 0);
r = sspr->DR & 255;
}
#ifdef SOFT_SPI
else {
for (int i = 0; i < 8; i++) {
FIO_ClearValue(sclk.port, 1UL << sclk.pin); // clock LOW
if (data & 0x80) // WRITE
FIO_SetValue(mosi.port, 1UL << mosi.pin);
else
FIO_ClearValue(mosi.port, 1UL << mosi.pin);
data <<= 1;
_delay(delay >> 1); // DELAY
FIO_SetValue(sclk.port, 1UL << sclk.pin); // clock HIGH
_delay(delay >> 1); // DELAY
r <<= 1;
if (FIO_ReadValue(miso.port) & (1UL << miso.pin)) // READ
r |= 1;
}
FIO_ClearValue(sclk.port, 1UL << sclk.pin);
}
#endif
// printf(" <0x%x\n", r);
return r;
}
// TODO: timer feeds DMA feeds 0xFFs to card then we listen for responses using our interrupt
// allow me to do something like:
// disk.start_multi_write(int blocks, int blocksize, void *buffer);
// enable_usb_isr();
// [...]
// usb_isr() {
// if (disk.buffer_in_use(void *buffer))
// return;
// usb_ep_read(buffer);
// if (buffer_full)
// disk.validate_buffer(buffer);
// if (disk.finished_transfer())
// disk.end_multi_write();
// };
// bool SPI_can_DMA()
// {
// return (sspr != NULL);
// }
// int SPI::setup_DMA_rx(DMA_REG *dma)
// {
// if (!sspr)
// return -1;
//
// dma->DMACCControl = 0;
// dma->DMACCConfiguration = 0;
// if (sspr == LPC_SSP0)
// dma->DMACCConfiguration |= (GPDMA_CONN_SSP0_Rx << 6);
// if (sspr == LPC_SSP1)
// dma->DMACCConfiguration |= (GPDMA_CONN_SSP1_Rx << 6);
//
// dma->DMACCConfiguration |= GPDMA_TRANSFERTYPE_M2P << 11;
// return 0;
// }
//
// int SPI::start_DMA_rx(DMA_REG *dma)
// {
// dma->DMACCConfiguration |=
// }
// int SPI_writeblock(uint8_t *block, int blocklen)
// {
// static DMA *d = new DMA();
// d.sourceaddr(block);
// d.transferlength(blocklen);
// d.destinationperipheral(sspr);
// d.start();
// while (d.active());
// return blocklen;
// return 0;
// }
// void SPI_irq()
// {
// }
// void SSP0_IRQHandler(void) {
// if (isr_dispatch[0])
// isr_dispatch[0]();
// }
// void SSP1_IRQHandler(void) {
// if (isr_dispatch[1])
// isr_dispatch[1]();
// }