Verilator 4.218 2022-01-17 released

[wsnyder]

Verilator 4.218 2022-01-17

Major:

• Primary inputs and outputs (VL_INW/VL_OUTW) now use VlWide type. In general this should be backward compatible, but may lead to some wrapper code needing changes.
• Option --cdc is deprecated and is planned for removal, file a bug if this is still being used.

Minor:

• Support class static members (Support class static members verilator#2233).
• Support force/release (Any way to get round use of force/release? verilator#2431) (Unsupported: Verilog 1995 release verilator#2593). [Shunyao CAD]
• Add 'forceable' attribute to allow forcing from C++. (Force/Release merge + forceable directive verilator#3272). [Geza Lore, Shunyao CAD]
• Support lower dimension looping in foreach loops (Support foreach looping through lower array dimension verilator#3172). [Ehab Ibrahim]
• Support up to 64 bit enums for .next/.prev/.name (Support enum next/prev method on enum with > 10 bits verilator#3244). [Alexander Grobman]
• Reduce .rodata footprint of trace initialization (Reduce .rodata footprint of trace initialization verilator#3250). [Geza Lore, Shunyao CAD]
• Support FST tracing in hierarchical Verilation (Support FST tracing in hierarchical verilation verilator#3251). [Yutetsu TAKATSUKASA]
• Use C++11 standard types for MacOS portability (Compilation error on macOS Monterey with M1 Mac verilator#3254) (macOS simulation build errors due to recent type changes verilator#3257). [Adrien Le Masle]
• Fix make support for BSD ar (Non-GNU implementation of the ar command does not read command-line options from file verilator#2999) (Fix make support for BSD ar verilator#3256). [Julie Schwartz]
• Fix bad ending address on $readmem (Error when readmem file does not end at the final address (regardless of whether the file has address specifications) verilator#3205). [Julie Schwartz]
• Fix MSWIN compile error (CI: add Windows/MSYS2 package build/test verilator#2681). [Unai Martinez-Corral]
• Fix break under foreach loop (Inconsistent break in foreach verilator#3230).
• Fix VL_STREAML_FAST_QQI with 64 bit left-hand-side (Wrong behaviour of VL_STREAML_FAST_QQI when lbits=64 verilator#3232) (Fix VL_STREAML_FAST_QQI when lbits=64 verilator#3235). [Adrien Le Masle]
• Fix $sformat of inputs/outputs (Call to data() function on non class type (WData) verilator#3236). [Adrien Le Masle]
• Fix associative array first method as statement (Associate arrays: call to first() generates invalid C++ code verilator#3228). [Adrien Le Masle]
• Fix associative array foreach loop (Support foreach on associative arrays, etc verilator#3229).
• Fix $fclose not accepting expressions (Argument to $close can't be an expression verilator#3237). [Julie Schwartz]
• Fix $random not updating seed ($random doesn't update seed verilator#3238). [Julie Schwartz]
• Fix top level param overwrite when package has same param (Parameter not properly overwritten by -G option if an imported package contains a parameter with the same name verilator#3241) (Fix for top level parameter overwrite when a package has the same parameter name (#3241) verilator#3247). [Adrien Le Masle]
• Fix spurious UNUSED by ignoring inout pin connections (UNUSED is mistakenly reported on signal connected to inout port of two submodules verilator#3242). [Julie Schwartz]
• Fix splitting of _eval and other top level functions. [Geza Lore, Shunyao CAD]
• Fix internal error by inout port (Verilator shows an internal error if a module that has inout ports is not inlined verilator#3258). [Yutetsu TAKATSUKASA]
• Fix GCC 11 compile error (Compile error at GCC 11 verilator#3273). [HungMingWu]

[umarcor]

@wsnyder can you please tag v4.218 in https://github.com/verilator/verilator/tags?

[wsnyder]

Tag pushed.