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ttb.vvp
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#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "D:\iverilog\lib\ivl\system.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "D:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "D:\iverilog\lib\ivl\va_math.vpi";
S_00000200476fc7f0 .scope module, "tb_lottery" "tb_lottery" 2 4;
.timescale 0 0;
v0000020047755490_0 .var "clk", 0 0;
v0000020047755670_0 .net "full", 0 0, v00000200476fcb10_0; 1 drivers
v0000020047755210_0 .net "id", 4 0, v00000200476fcbb0_0; 1 drivers
v00000200477558f0_0 .var "luckybit", 0 0;
v00000200477552b0_0 .var "reset", 0 0;
v0000020047755a30_0 .var "stop", 0 0;
v0000020047755f30_0 .net "winner", 4 0, v00000200476f41f0_0; 1 drivers
v00000200477555d0_0 .var "write", 0 0;
S_00000200476fc980 .scope begin, "$ivl_for_loop0" "$ivl_for_loop0" 2 31, 2 31 0, S_00000200476fc7f0;
.timescale 0 0;
v00000200476a86a0_0 .var/i "k", 31 0;
S_00000200476f3de0 .scope module, "dut" "lottery" 2 13, 3 1 0, S_00000200476fc7f0;
.timescale 0 0;
.port_info 0 /INPUT 1 "clk";
.port_info 1 /INPUT 1 "reset";
.port_info 2 /INPUT 1 "luckybit";
.port_info 3 /INPUT 1 "write";
.port_info 4 /INPUT 1 "stop";
.port_info 5 /OUTPUT 5 "winner";
.port_info 6 /OUTPUT 5 "id";
.port_info 7 /OUTPUT 1 "full";
v00000200476a6920_0 .net "clk", 0 0, v0000020047755490_0; 1 drivers
v00000200476ab3d0_0 .var "data", 4 0;
v00000200476ab470_0 .var "data_next", 4 0;
v00000200476fcb10_0 .var "full", 0 0;
v00000200476fcbb0_0 .var "id", 4 0;
v00000200476f3f70_0 .var "lucky_queue", 31 0;
v00000200476f4010_0 .net "luckybit", 0 0, v00000200477558f0_0; 1 drivers
v00000200476f40b0_0 .net "reset", 0 0, v00000200477552b0_0; 1 drivers
v00000200476f4150_0 .net "stop", 0 0, v0000020047755a30_0; 1 drivers
v00000200476f41f0_0 .var "winner", 4 0;
v00000200476f4290_0 .net "write", 0 0, v00000200477555d0_0; 1 drivers
E_00000200476ebbe0/0 .event anyedge, v00000200476f40b0_0;
E_00000200476ebbe0/1 .event posedge, v00000200476a6920_0;
E_00000200476ebbe0 .event/or E_00000200476ebbe0/0, E_00000200476ebbe0/1;
E_00000200476ebf20 .event anyedge, v00000200476ab3d0_0, v00000200476ab470_0;
E_00000200476ec160/0 .event anyedge, v00000200476f40b0_0;
E_00000200476ec160/1 .event posedge, v00000200476f4290_0;
E_00000200476ec160 .event/or E_00000200476ec160/0, E_00000200476ec160/1;
.scope S_00000200476f3de0;
T_0 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000200476fcb10_0, 0, 1;
%pushi/vec4 0, 0, 5;
%store/vec4 v00000200476fcbb0_0, 0, 5;
%pushi/vec4 31, 31, 5;
%store/vec4 v00000200476f41f0_0, 0, 5;
%end;
.thread T_0;
.scope S_00000200476f3de0;
T_1 ;
%wait E_00000200476ec160;
%load/vec4 v00000200476f40b0_0;
%pad/u 32;
%cmpi/e 1, 0, 32;
%jmp/0xz T_1.0, 4;
%pushi/vec4 0, 0, 32;
%store/vec4 v00000200476f3f70_0, 0, 32;
%pushi/vec4 0, 0, 5;
%store/vec4 v00000200476fcbb0_0, 0, 5;
%jmp T_1.1;
T_1.0 ;
%load/vec4 v00000200476fcbb0_0;
%pad/u 32;
%cmpi/u 31, 0, 32;
%jmp/0xz T_1.2, 5;
%load/vec4 v00000200476f4010_0;
%ix/getv 4, v00000200476fcbb0_0;
%store/vec4 v00000200476f3f70_0, 4, 1;
%load/vec4 v00000200476fcbb0_0;
%addi 1, 0, 5;
%store/vec4 v00000200476fcbb0_0, 0, 5;
%jmp T_1.3;
T_1.2 ;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000200476fcb10_0, 0, 1;
T_1.3 ;
T_1.1 ;
%jmp T_1;
.thread T_1;
.scope S_00000200476f3de0;
T_2 ;
%wait E_00000200476ebbe0;
%load/vec4 v00000200476f40b0_0;
%pad/u 32;
%cmpi/e 1, 0, 32;
%jmp/0xz T_2.0, 4;
%pushi/vec4 31, 31, 5;
%store/vec4 v00000200476f41f0_0, 0, 5;
%jmp T_2.1;
T_2.0 ;
%load/vec4 v00000200476ab3d0_0;
%cmpi/ne 0, 0, 5;
%flag_get/vec4 4;
%jmp/0 T_2.4, 4;
%load/vec4 v00000200476f4150_0;
%flag_set/vec4 9;
%flag_get/vec4 9;
%jmp/1 T_2.5, 9;
%load/vec4 v00000200476fcb10_0;
%or;
T_2.5;
%and;
T_2.4;
%flag_set/vec4 8;
%jmp/0xz T_2.2, 8;
%load/vec4 v00000200476ab3d0_0;
%store/vec4 v00000200476f41f0_0, 0, 5;
T_2.2 ;
T_2.1 ;
%jmp T_2;
.thread T_2;
.scope S_00000200476f3de0;
T_3 ;
%wait E_00000200476ebf20;
%load/vec4 v00000200476ab3d0_0;
%parti/s 1, 4, 4;
%load/vec4 v00000200476ab3d0_0;
%parti/s 1, 1, 2;
%xor;
%ix/load 4, 4, 0;
%flag_set/imm 4, 0;
%store/vec4 v00000200476ab470_0, 4, 1;
%load/vec4 v00000200476ab3d0_0;
%parti/s 1, 3, 3;
%load/vec4 v00000200476ab3d0_0;
%parti/s 1, 0, 2;
%xor;
%ix/load 4, 3, 0;
%flag_set/imm 4, 0;
%store/vec4 v00000200476ab470_0, 4, 1;
%load/vec4 v00000200476ab3d0_0;
%parti/s 1, 2, 3;
%load/vec4 v00000200476ab470_0;
%parti/s 1, 4, 4;
%xor;
%ix/load 4, 2, 0;
%flag_set/imm 4, 0;
%store/vec4 v00000200476ab470_0, 4, 1;
%load/vec4 v00000200476ab3d0_0;
%parti/s 1, 1, 2;
%load/vec4 v00000200476ab470_0;
%parti/s 1, 3, 3;
%xor;
%ix/load 4, 1, 0;
%flag_set/imm 4, 0;
%store/vec4 v00000200476ab470_0, 4, 1;
%load/vec4 v00000200476ab3d0_0;
%parti/s 1, 0, 2;
%load/vec4 v00000200476ab470_0;
%parti/s 1, 2, 3;
%xor;
%ix/load 4, 0, 0;
%flag_set/imm 4, 0;
%store/vec4 v00000200476ab470_0, 4, 1;
%jmp T_3;
.thread T_3, $push;
.scope S_00000200476f3de0;
T_4 ;
%wait E_00000200476ebbe0;
%load/vec4 v00000200476f40b0_0;
%flag_set/vec4 8;
%jmp/1 T_4.3, 8;
%load/vec4 v00000200476fcbb0_0;
%pad/u 32;
%cmpi/u 5, 0, 32;
%flag_or 8, 5;
T_4.3;
%jmp/1 T_4.2, 8;
%load/vec4 v00000200476ab3d0_0;
%cmpi/e 0, 0, 5;
%flag_or 8, 4;
T_4.2;
%jmp/0xz T_4.0, 8;
%load/vec4 v00000200476f3f70_0;
%vpi_func 3 48 "$random" 32 {0 0 0};
%load/vec4 v00000200476fcbb0_0;
%pad/u 32;
%mod;
%part/u 1;
%load/vec4 v00000200476f3f70_0;
%vpi_func 3 48 "$random" 32 {0 0 0};
%load/vec4 v00000200476fcbb0_0;
%pad/u 32;
%mod;
%part/u 1;
%concat/vec4; draw_concat_vec4
%load/vec4 v00000200476f3f70_0;
%vpi_func 3 48 "$random" 32 {0 0 0};
%load/vec4 v00000200476fcbb0_0;
%pad/u 32;
%mod;
%part/u 1;
%concat/vec4; draw_concat_vec4
%load/vec4 v00000200476f3f70_0;
%vpi_func 3 48 "$random" 32 {0 0 0};
%load/vec4 v00000200476fcbb0_0;
%pad/u 32;
%mod;
%part/u 1;
%concat/vec4; draw_concat_vec4
%load/vec4 v00000200476f3f70_0;
%vpi_func 3 48 "$random" 32 {0 0 0};
%load/vec4 v00000200476fcbb0_0;
%pad/u 32;
%mod;
%part/u 1;
%concat/vec4; draw_concat_vec4
%assign/vec4 v00000200476ab3d0_0, 0;
%jmp T_4.1;
T_4.0 ;
%load/vec4 v00000200476f4150_0;
%flag_set/vec4 9;
%flag_get/vec4 9;
%jmp/1 T_4.6, 9;
%load/vec4 v00000200476fcb10_0;
%or;
T_4.6;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_4.4, 8;
%load/vec4 v00000200476ab470_0;
%assign/vec4 v00000200476ab3d0_0, 0;
T_4.4 ;
T_4.1 ;
%jmp T_4;
.thread T_4;
.scope S_00000200476fc7f0;
T_5 ;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000020047755490_0, 0, 1;
T_5.0 ;
%delay 5, 0;
%load/vec4 v0000020047755490_0;
%inv;
%store/vec4 v0000020047755490_0, 0, 1;
%jmp T_5.0;
%end;
.thread T_5;
.scope S_00000200476fc7f0;
T_6 ;
%vpi_call 2 21 "$dumpfile", "test.vcd" {0 0 0};
%vpi_call 2 22 "$dumpvars", 32'sb00000000000000000000000000000000, S_00000200476fc7f0 {0 0 0};
%end;
.thread T_6;
.scope S_00000200476fc7f0;
T_7 ;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000200477552b0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000020047755a30_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000200477555d0_0, 0, 1;
%delay 10, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000200477552b0_0, 0, 1;
%fork t_1, S_00000200476fc980;
%jmp t_0;
.scope S_00000200476fc980;
t_1 ;
%pushi/vec4 0, 0, 32;
%store/vec4 v00000200476a86a0_0, 0, 32;
T_7.0 ;
%load/vec4 v00000200476a86a0_0;
%cmpi/s 36, 0, 32;
%jmp/0xz T_7.1, 5;
%vpi_func 2 32 "$random" 32 {0 0 0};
%pushi/vec4 2, 0, 32;
%mod/s;
%pad/s 1;
%store/vec4 v00000200477558f0_0, 0, 1;
%delay 5, 0;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000200477555d0_0, 0, 1;
%delay 7, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000200477555d0_0, 0, 1;
%load/vec4 v00000200476a86a0_0;
%addi 1, 0, 32;
%store/vec4 v00000200476a86a0_0, 0, 32;
%jmp T_7.0;
T_7.1 ;
%end;
.scope S_00000200476fc7f0;
t_0 %join;
%delay 5, 0;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000020047755a30_0, 0, 1;
%delay 5, 0;
%vpi_call 2 38 "$finish" {0 0 0};
%end;
.thread T_7;
# The file index is used to find the file name in the following table.
:file_names 4;
"N/A";
"<interactive>";
"ttb.v";
"./test.v";