From 74036a3a445029c9d445200659ee2260ebdaf717 Mon Sep 17 00:00:00 2001
From: David Garske <david@wolfssl.com>
Date: Fri, 24 May 2024 15:37:56 -0700
Subject: [PATCH] QSPI fixes.

---
 hal/rx65n.c |  9 +++++++++
 hal/rx72n.c | 29 ++++++++++++++++++++---------
 2 files changed, 29 insertions(+), 9 deletions(-)

diff --git a/hal/rx65n.c b/hal/rx65n.c
index 00157d629..94c4bcf87 100644
--- a/hal/rx65n.c
+++ b/hal/rx65n.c
@@ -238,6 +238,10 @@
 #define RSPI_SPDCR2_BYSW    (1 << 0) /* Byte Swap: 0=Byte swapping of SPDR data disabled, 1=Byte swapping of SPDR data enabled */
 
 
+#if defined(EXT_FLASH) && defined(TEST_FLASH)
+static int test_flash(void);
+#endif
+
 static void hal_delay_us(uint32_t us)
 {
     uint32_t delay;
@@ -586,6 +590,11 @@ void hal_init(void)
 #ifdef DEBUG_UART
     uart_init();
     uart_write("wolfBoot HAL Init\n", 18);
+#endif
+#if defined(EXT_FLASH) && defined(TEST_FLASH)
+    if (test_flash() != 0) {
+        wolfBoot_printf("Flash Test Failed!\n");
+    }
 #endif
     return;
 }
diff --git a/hal/rx72n.c b/hal/rx72n.c
index 6495c1d52..5e0a44223 100644
--- a/hal/rx72n.c
+++ b/hal/rx72n.c
@@ -20,10 +20,11 @@
  */
 
 /* HAL for Renesas RX72N */
-/* Default configuration:
+/* Tested with:
  *   RX72N Envision Kit (HMI IoT)
  *   R5F572NNHDFB 144-pin LFQFP (PLQP0144KA-B)
  * 4MB Flash, 1MB RAM, 32KB Data Flash, 240MHz, TSIP
+ * QSPI: Macronix MX25L3233FM2I-08G: 4MB QSPI Serial Flash
  */
 
 #include <stdio.h>
@@ -302,6 +303,11 @@
 
 #define QSPI_FIFO_SIZE 32 /* bytes */
 
+
+#if defined(EXT_FLASH) && defined(TEST_FLASH)
+static int test_flash(void);
+#endif
+
 static void hal_delay_us(uint32_t us)
 {
     uint32_t delay;
@@ -312,15 +318,11 @@ static void hal_delay_us(uint32_t us)
 
 #if defined(SPI_FLASH) || defined(QSPI_FLASH)
 
-/* Macronix MX25L3233FM2I-08G: 4MB QSPI Serial Flash */
 /* RSPI1: P27/RSPCKB-A, P26/MOSIB-A, P30/MISOB-A, P31/SSLB0-A */
 /* QSPI:  PD2/QIO2-B, PD3/QIO3-B, PD4/QSSL-B, PD5/QSPCLK-B, PD6/QIO0-B, PD7/QIO1-B */
 #ifndef FLASH_RSPI_PORT
 #define FLASH_RSPI_PORT 1 /* RSPI1 */
 #endif
-#ifndef FLASH_CLK_HZ
-#define FLASH_CLK_HZ 15000000
-#endif
 #define FLASH_SPI_USE_HW_CS
 void spi_init(int polarity, int phase)
 {
@@ -577,9 +579,6 @@ static int qspi_data(const uint32_t* txData, uint32_t* rxData, uint32_t dataSz)
             tmp = QSPI_SPDR8;
     }
 
-    /* Clear flags */
-    QSPI_SPSR |= (QSPI_SPSR_SPTEF | QSPI_SPSR_SPRFF | QSPI_SPSR_SPSSLF);
-
     return 0;
 }
 
@@ -653,11 +652,17 @@ int qspi_transfer(uint8_t fmode, const uint8_t cmd,
     if (dummySz > 0) {
         qspi_data(NULL, NULL, dummySz);
     }
-    qspi_data(&alt, NULL, altSz);
+    if (fmode == QSPI_MODE_READ)
+        qspi_data(NULL, (uint32_t*)data, dataSz);
+    else
+        qspi_data((const uint32_t*)data, NULL, dataSz);
 
     /* Wait for QSSL negation */
     while ((QSPI_SPSR & QSPI_SPSR_SPSSLF) == 0);
 
+    /* Clear flags */
+    QSPI_SPSR |= (QSPI_SPSR_SPTEF | QSPI_SPSR_SPRFF | QSPI_SPSR_SPSSLF);
+
     /* Disable QSPI */
     QSPI_SPCR &= ~QSPI_SPCR_SPE;
 
@@ -892,6 +897,12 @@ void hal_init(void)
     uart_init();
     uart_write("wolfBoot HAL Init\n", 18);
 #endif
+#if defined(EXT_FLASH) && defined(TEST_FLASH)
+    if (test_flash() != 0) {
+        wolfBoot_printf("Flash Test Failed!\n");
+    }
+#endif
+
     return;
 }
 int hal_flash_write(uint32_t address, const uint8_t *data, int len)