{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":225671970,"defaultBranch":"master","name":"hal_xtensa","ownerLogin":"zephyrproject-rtos","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2019-12-03T16:56:57.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/19595895?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1651265705.8150961","currentOid":""},"activityList":{"items":[{"before":"a1558624512e3a636d181ef3e31cfcd4fe4f9dab","after":"baa56aa3e119b5aae43d16f9b2d2c8112e052871","ref":"refs/heads/master","pushedAt":"2024-08-14T17:55:42.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"nashif","name":"Anas Nashif","path":"/nashif","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/180017?s=80&v=4"},"commit":{"message":"zephyr: add SoC layer for intel_ace30_ptl\n\nThis adds the SoC layer for used with intel_adsp/ace30_ptl\nboard.\n\nSigned-off-by: Daniel Leung ","shortMessageHtmlLink":"zephyr: add SoC layer for intel_ace30_ptl"}},{"before":"a2d658525b16c57bea8dd565f5bd5167e4b9f1ee","after":"a1558624512e3a636d181ef3e31cfcd4fe4f9dab","ref":"refs/heads/master","pushedAt":"2024-06-11T17:44:09.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"nashif","name":"Anas Nashif","path":"/nashif","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/180017?s=80&v=4"},"commit":{"message":"zephyr: adding sample_controller32 for MPU\n\nThe overlay comes from:\n\n https://github.com/jcmvbkbc/xtensa-toolchain-build\n commit 435c5e8b108de520565886f3f2349cc6be3fe712\n under directory overlays/\n\nThis would allow us to use QEMU to test the Xtensa MPU code\non main Zephyr repo.\n\nSigned-off-by: Daniel Leung ","shortMessageHtmlLink":"zephyr: adding sample_controller32 for MPU"}},{"before":"4f3293cbb79b9d210c0fe0a4b238417043c5438b","after":"a2d658525b16c57bea8dd565f5bd5167e4b9f1ee","ref":"refs/heads/master","pushedAt":"2024-03-01T14:48:09.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"carlescufi","name":"Carles Cufí","path":"/carlescufi","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/12450381?s=80&v=4"},"commit":{"message":"zephyr: rename SoC overlay for NXP i.MX8ULP\n\nRename SoC overlay for NXP i.MX8ULP from nxp_imx8ulp\nto nxp_imx8ulp_adsp.\n\nThis is needed in order to match the SOC_TOOLCHAIN_NAME\ndefined in Zephyr.\nUntil now the overlay was matching the SOC name, but,\nfor HWMv2, this has changed.\n\nTherefore, we need this rename for Zephyr's HWMv2.\n\nSigned-off-by: Iuliana Prodan ","shortMessageHtmlLink":"zephyr: rename SoC overlay for NXP i.MX8ULP"}},{"before":"08325d6fb7190a105f5382d35e64ed2812c57cf4","after":"4f3293cbb79b9d210c0fe0a4b238417043c5438b","ref":"refs/heads/master","pushedAt":"2023-12-11T16:52:48.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"mmahadevan108","name":"Mahesh Mahadevan","path":"/mmahadevan108","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/16884721?s=80&v=4"},"commit":{"message":"zephyr: Add SoC overlay for MIMXRT685 HiFi4 DSP\n\nFiles were copied from nxp_rt600_RI23_11_newlib_linux.tgz available at\nhttps://tensilicatools.com.\n\nSigned-off-by: Vit Stanicek ","shortMessageHtmlLink":"zephyr: Add SoC overlay for MIMXRT685 HiFi4 DSP"}},{"before":"4dfd2d4731367f52c4ba07e91f76be5642834705","after":"08325d6fb7190a105f5382d35e64ed2812c57cf4","ref":"refs/heads/master","pushedAt":"2023-10-26T17:14:53.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"dcpleung","name":"Daniel Leung","path":"/dcpleung","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/38592223?s=80&v=4"},"commit":{"message":"zephyr: change SoC overlay name from nxp_imx8 to nxp_imx_adsp\n\nSince the i.MX8 SoC will be split into 2 different SoCs:\nmimx8qm6 and mimx8qx6, the nxp_imx8 name can no longer be\nused. This is because the new SoCs will have different CONFIG_SOC\nvalues such that CONFIG_SOC != nxp_imx8. Despite this, we can take\nadvantage of the fact that the 2 SoCs use the same toolchain.\nAs such, rename nxp_imx8 to nxp_imx_adsp. This works because\nZephyr looks for an overlay with the same name as the toolchain\nif one with the same name as the SoC doesn't exist.\n\nThis won't break the current state of things because the i.MX8\nSoC will also fallback to the nxp_imx_adsp overlay.\n\nSigned-off-by: Laurentiu Mihalcea ","shortMessageHtmlLink":"zephyr: change SoC overlay name from nxp_imx8 to nxp_imx_adsp"}},{"before":"e6da34fc07dfe96161ab8743f5dbeb6e6307ab93","after":"4dfd2d4731367f52c4ba07e91f76be5642834705","ref":"refs/heads/master","pushedAt":"2023-10-26T04:57:08.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"dcpleung","name":"Daniel Leung","path":"/dcpleung","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/38592223?s=80&v=4"},"commit":{"message":"zephyr: add SoC overlay for NXP i.MX8ULP\n\nThese files are from SOF project to support i.MX8ULP platform.\n\nSigned-off-by: Zhang Peng ","shortMessageHtmlLink":"zephyr: add SoC overlay for NXP i.MX8ULP"}},{"before":"e7964ddb26d441726a4b84f094042e58b6e7d0c1","after":"e6da34fc07dfe96161ab8743f5dbeb6e6307ab93","ref":"refs/heads/master","pushedAt":"2023-09-21T11:56:21.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"mmahadevan108","name":"Mahesh Mahadevan","path":"/mmahadevan108","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/16884721?s=80&v=4"},"commit":{"message":"soc/nxp_rt500_adsp: Fix assembly for older toolchain\n\nSimilar with\ncommit 8dd7640d4b112 (\"soc/mt8195_adsp: Fix assembly for older toolchain\").\n\nThe \"addi.a\" instruction referenced in this file doesn't build with\nnon-Cadence assemblers. By name, it would seem to be a \"add immediate\nsingle precision floating point\", but the way it's used is clearly\nas an integer counter in a regular GPR. Use an addi, which seems to\nbe the intent, to make this build. In practice this code won't ever\nbe executed by Zephyr apps anyway.\n\nSigned-off-by: Daniel Baluta ","shortMessageHtmlLink":"soc/nxp_rt500_adsp: Fix assembly for older toolchain"}},{"before":"86b7ddf984d54f34b79f52b328a4fecdae307956","after":"e7964ddb26d441726a4b84f094042e58b6e7d0c1","ref":"refs/heads/master","pushedAt":"2023-08-29T01:04:00.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"nashif","name":"Anas Nashif","path":"/nashif","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/180017?s=80&v=4"},"commit":{"message":"soc/mt8195_adsp: Fix assembly for older toolchain\n\nThe \"addi.a\" instruction referenced in this file doesn't build with\nnon-Cadence assemblers. By name, it would seem to be a \"add immediate\nsingle precision floating point\", but the way it's used is clearly\nas an integer counter in a regular GPR. Use an addi, which seems to\nbe the intent, to make this build. In practice this code won't ever\nbe executed by Zephyr apps anyway.\n\nSigned-off-by: Andy Ross ","shortMessageHtmlLink":"soc/mt8195_adsp: Fix assembly for older toolchain"}},{"before":"41a631d4aeeeaedc0daece21eecc338807296ad7","after":"86b7ddf984d54f34b79f52b328a4fecdae307956","ref":"refs/heads/master","pushedAt":"2023-08-26T15:04:19.000Z","pushType":"pr_merge","commitsCount":3,"pusher":{"login":"nashif","name":"Anas Nashif","path":"/nashif","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/180017?s=80&v=4"},"commit":{"message":"xtensa: add config and overlay for dc233c core\n\nThis adds the config and overlay files for dc233c core which\ncan be used with QEMU to test MMU.\n\nSigned-off-by: Daniel Leung ","shortMessageHtmlLink":"xtensa: add config and overlay for dc233c core"}},{"before":"bce25bd242fb07c4cfd13ccb1ed29bc8bc12b0b8","after":"41a631d4aeeeaedc0daece21eecc338807296ad7","ref":"refs/heads/master","pushedAt":"2023-05-13T15:30:34.777Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"stephanosio","name":"Stephanos Ioannidis","path":"/stephanosio","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/11345418?s=80&v=4"},"commit":{"message":"cmake: enable using SOC_TOOLCHAIN_NAME for SoC overlay\n\nSometimes, incremental changes in SoC families may enable using\nthe same toolchain of older SoC family. This commit enables using\nSOC_TOOLCHAIN_NAME (in addition to SOC_NAME) to indicate which\nSoC overlay can be used (but only when zephyr/soc/${SOC_NAME}\ndoes not exist). This allows bringing up new boards while\nwe sort out the toolchain in Zephyr SDK.\n\nSigned-off-by: Daniel Leung ","shortMessageHtmlLink":"cmake: enable using SOC_TOOLCHAIN_NAME for SoC overlay"}},{"before":"e636ce8fdf334addaae37fb2417dc2cb8bf7b50a","after":"bce25bd242fb07c4cfd13ccb1ed29bc8bc12b0b8","ref":"refs/heads/master","pushedAt":"2023-05-02T16:25:40.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"nashif","name":"Anas Nashif","path":"/nashif","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/180017?s=80&v=4"},"commit":{"message":"zephyr: rename SoC overlay for NXP i.MX8MP\n\nRename SoC overlay for NXP i.MX8MP from nxp_imx8m\nto mimx8ml8.\n\nThis is needed in order to enable, for DSP, for now,\nthe UART console and use the driver from NXP hal.\nWith this name, the driver is added directly from\nhal/nxp/mcux/mcux-sdk/devices/MIMX8ML8.\n\nSigned-off-by: Iuliana Prodan ","shortMessageHtmlLink":"zephyr: rename SoC overlay for NXP i.MX8MP"}},{"before":"63f655362423aa49507da7977a2d37142e8debeb","after":"e636ce8fdf334addaae37fb2417dc2cb8bf7b50a","ref":"refs/heads/master","pushedAt":"2023-03-16T16:32:37.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"galak","name":"Kumar Gala","path":"/galak","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/16417047?s=80&v=4"},"commit":{"message":"zephyr: update SoC overlay intel_ace15_mtpm\n\nUpdate the overlay files of intel_ace15_mtpm. The previous\nones contained assembly for floating-point coprocessor\nthat cannot be processed correctly by GCC built from\nthe same overlay.\n\nSigned-off-by: Daniel Leung ","shortMessageHtmlLink":"zephyr: update SoC overlay intel_ace15_mtpm"}}],"hasNextPage":false,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"startCursor":"Y3Vyc29yOnYyOpK7MjAyNC0wOC0xNFQxNzo1NTo0Mi4wMDAwMDBazwAAAASaiWB4","endCursor":"Y3Vyc29yOnYyOpK7MjAyMy0wMy0xNlQxNjozMjozNy4wMDAwMDBazwAAAAMFB4c3"}},"title":"Activity · zephyrproject-rtos/hal_xtensa"}